[LLVMdev] Instruction Constraints Question

dag at cray.com dag at cray.com
Wed Jan 23 14:40:29 PST 2013

Cameron McInally <cameron.mcinally at nyu.edu> writes:

>> How would that (or any early clobbering) enforce $src1 != $mask? Or is
>> it a fortuitous side-effect of implementation?
> In this case, $src1 is also the destination register. A masked gather will
> merge the conditionally selected elements into the input vector.

Oh yes, that's right.  Thanks for the reminder, Cameron.  :)


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