[LLVMdev] SelectionDAG legality: isel creating cycles

David Greene dag at cray.com
Mon Feb 22 08:45:32 PST 2010

On Monday 22 February 2010 10:41:04 David Greene wrote:

> Actually, it looked like this:
>   LOAD B
>     Chain from PREFETCH
>       Chain from LOAD A
>     NULL
>   LOAD A
>     Chain from ENTRY
>     Some Addressing
> LOAD B is from NULL because this is a bugpoint-reduced testcase, so that's
> not an issue.

I suppose one solution would be to not have LOAD B carry the chain from the 
prefetch.  But SelectionDAGBuilder "automatically" gives the node it 
constructs an input from the current root of the DAG.  At some point the 
prefetch is the root and the next thing to be built is LOAD B, so it gets an
operand pointing to the prefetch.

I'll look at this angle some more.  It seems we should be able to break the
cycle here.

Let me know if I'm on the completely wrong track.  :)


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