[LLVMdev] SelectionDAG legality: isel creating cycles
clattner at apple.com
Mon Feb 22 11:06:39 PST 2010
On Feb 22, 2010, at 8:41 AM, David Greene wrote:
> On Monday 22 February 2010 10:31:24 David Greene wrote:
>> The fundamental issue is that the DAG originally looked like this:
>> LOAD B
>> Chain from LOAD A
>> LOAD A
> Actually, it looked like this:
> LOAD B
> Chain from PREFETCH
> Chain from LOAD A
> LOAD A
> Chain from ENTRY
> Some Addressing
> LOAD B is from NULL because this is a bugpoint-reduced testcase, so that's not
> an issue.
> Just wanted to clarify in case someone was wondering about this.
I'm currently working in this area. What pattern is causing the cycle? Can I get a testcase?
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