[LLVMdev] New to LLVM, Help needed

[Alireza.Moshtaghi at microchip.com]

Hi,

I have started to write an llvm backend for one of our microcontrollers
(PICxx). I started studying the framework of PowerPc backend of llvm and
decided to start by following that framework. Now I have most of the
classes and Tblgen files written for a very basic hypothetical
microcontroller with very few instructions.

The project builds and the llc recognizes the new processor, however,
when it reaches the point where it wants to lower llvm IR to PICxx DAG,
it asserts in LegalizeDAG.cpp in ExpandOp() function after it hits the
default case of switch(Node->getOpcode())

Can someone please help me understand how am I ending up in the default
case?

 

Thanks,

A.

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