[PATCH] D73179: [IR] masked gather/scatter alignment should be set

Elena Demikhovsky via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 23 01:07:16 PST 2020


delena added inline comments.


================
Comment at: llvm/test/CodeGen/X86/avx2-masked-gather.ll:54
   %ld  = load <2 x i32*>, <2 x i32*>* %ptr
-  %res = call <2 x i32> @llvm.masked.gather.v2i32(<2 x i32*> %ld, i32 0, <2 x i1> %masks, <2 x i32> %passthro)
+  %res = call <2 x i32> @llvm.masked.gather.v2i32(<2 x i32*> %ld, i32 1, <2 x i1> %masks, <2 x i32> %passthro)
   ret <2 x i32> %res
----------------
I think 0 is also good. You can put alignment 0 in load/store.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D73179/new/

https://reviews.llvm.org/D73179





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