[PATCH] D73179: [IR] masked gather/scatter alignment should be set

Guillaume Chatelet via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 22 05:38:00 PST 2020


gchatelet created this revision.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

masked_load and masked_store instructions require the alignment to be specified and a power of two. It seems to me that this requirement applies to masked_gather and masked_scatter as well.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D73179

Files:
  llvm/docs/LangRef.rst
  llvm/lib/IR/Verifier.cpp
  llvm/test/Assembler/auto_upgrade_intrinsics.ll
  llvm/test/CodeGen/X86/avx2-masked-gather.ll
  llvm/test/Transforms/InstCombine/masked_intrinsics.ll

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