[PATCH] D52833: [RISCV] Add codegen test for RV64 ALU operations

[Lewis Revill via Phabricator via llvm-commits]

lewis-revill added a comment.

Now that I've read the RFC on the mailing lists I think it is best to keep this patch as it is, because selecting the *w instructions would require adding tablegen patterns. I think on my end it would be better to be an extra pair of eyes on the patches from Alex and others.


Repository:
  rL LLVM

https://reviews.llvm.org/D52833