[PATCH] D52833: [RISCV] Add codegen test for RV64 ALU operations

Lewis Revill via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 3 12:35:36 PDT 2018

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lewis-revill added a comment.

Yes I could look into that. I think there is currently problems with selecting SIGN_EXTEND_INREG for rv64 (I may be misremembering), so it would be good to investigate that at the same time.


Repository:
  rL LLVM

https://reviews.llvm.org/D52833

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