[PATCH] [AArch64] Codegen VMAX/VMIN for safe math cases

[Artyom Skrobov]

Hello,

The attached patch copies PerformSELECT_CCCombine from ARMISelLowering into
AArch64ISelLowering, in order to enable emitting VMIN/VMAX for safe math
cases.
The previous code in AArch64TargetLowering::LowerSELECT_CC only emitted
VMIN/VMAX in NoNaNsFPMath mode.

After James' patch with MIN/MAX intrinsics goes in, they can be extended to
support floating-point min/max, and therefore to factor out this common code
from ARM and AArch64 backends into somewhere shared and reusable.

OK to commit?

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