[PATCH] [LLVM - ARM/AArch64] Add ACLE special register intrinsics (10.1)

[Renato Golin]

Sorry for the delay. The changes you did are good. Some minor comments inline.


================
Comment at: lib/Target/ARM/ARMISelDAGToDAG.cpp:3618
@@ +3617,3 @@
+  // If an opcode was found then we can lower the read to a VFP instruction.
+  if (Subtarget->hasVFP3() && Opcode) {
+    Ops = { getAL(CurDAG, DL), CurDAG->getRegister(0, MVT::i32) };
----------------
Shouldn't it be an error if (Opcode && !Subtarget->hasVFP3()) ?

Maybe something like:

    if (Opcode) {
      if (!Subtarget->hasVFP3())
        return nullptr;
      Ops ...
    }


================
Comment at: lib/Target/ARM/ARMISelDAGToDAG.cpp:3711
@@ +3710,3 @@
+
+  if (Subtarget->hasVFP3() && Opcode) {
+    Ops = { N->getOperand(2), getAL(CurDAG, DL),
----------------
Same comment about hasVFP3()

================
Comment at: lib/Target/ARM/ARMISelDAGToDAG.cpp:3740
@@ +3739,3 @@
+
+  // At this point must be considering register values for an A or R class core,
+  // so check if a valid mask can be constructed from the register and flags.
----------------
What about ARMv6 and older?

http://reviews.llvm.org/D9699

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