[llvm-bugs] [Bug 46616] New: ARMDisassembler.cpp: DecodeThumbTableBranch improperly marks "tbb/w [pc, rx]" as SoftFailure

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https://bugs.llvm.org/show_bug.cgi?id=46616

            Bug ID: 46616
           Summary: ARMDisassembler.cpp: DecodeThumbTableBranch improperly
                    marks "tbb/w [pc, rx]" as SoftFailure
           Product: libraries
           Version: 10.0
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: ARM
          Assignee: unassignedbugs at nondot.org
          Reporter: getcho.getchev at gmail.com
                CC: llvm-bugs at lists.llvm.org, smithp352 at googlemail.com,
                    Ties.Stuij at arm.com

Symptom:
In DecodeThumbTableBranch there is an improper check:

if (Rn == ARM::SP) S = MCDisassembler::SoftFail;

Since ARM::SP is an internal representation of the registers, it is not related
in any way with the instruction encoding. Thus, when we have "tbb [pc, rx]"
instruction, the value of Rn is 15, the value of ARM::SP is also 15 and the
instruction is improperly marked as SoftFail.

Solution:
Since the SP in ARM is R13, and according to the encoding of the tbb
instruction, the above line should be:

if (Rn == 13) S = MCDisassembler::SoftFail;

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