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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - ARMDisassembler.cpp: DecodeThumbTableBranch improperly marks "tbb/w [pc, rx]" as SoftFailure"
href="https://bugs.llvm.org/show_bug.cgi?id=46616">46616</a>
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<th>Summary</th>
<td>ARMDisassembler.cpp: DecodeThumbTableBranch improperly marks "tbb/w [pc, rx]" as SoftFailure
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>10.0
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: ARM
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>getcho.getchev@gmail.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org, smithp352@googlemail.com, Ties.Stuij@arm.com
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<pre>Symptom:
In DecodeThumbTableBranch there is an improper check:
if (Rn == ARM::SP) S = MCDisassembler::SoftFail;
Since ARM::SP is an internal representation of the registers, it is not related
in any way with the instruction encoding. Thus, when we have "tbb [pc, rx]"
instruction, the value of Rn is 15, the value of ARM::SP is also 15 and the
instruction is improperly marked as SoftFail.
Solution:
Since the SP in ARM is R13, and according to the encoding of the tbb
instruction, the above line should be:
if (Rn == 13) S = MCDisassembler::SoftFail;</pre>
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