[llvm-bugs] [Bug 44254] New: SystemZ target - Incorrect code generated for accessing thread_local variables when high-word feature is available

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https://bugs.llvm.org/show_bug.cgi?id=44254

            Bug ID: 44254
           Summary: SystemZ target - Incorrect code generated for
                    accessing thread_local variables when high-word
                    feature is available
           Product: new-bugs
           Version: 9.0
          Hardware: Other
                OS: other
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: slavomir.kucera at broadcom.com
                CC: htmldeveloper at gmail.com, llvm-bugs at lists.llvm.org

I came across a bug in the generated code for SystemZ target when accessing
thread_local variables in functions that have 7 or more parameters.

The problem can be seen here
https://godbolt.org/z/v77J_p

while extracting the values from AR0 and AR1

        ear     %r0, %a0                 ; copy AR0 to GR0L
        risblg  %r14, %r0, 0, 159, 32    <<<<<<<< copy GR0H to GR14L
        sllg    %r14, %r14, 32
        ear     %r0, %a1              
        risblg  %r14, %r0, 0, 159, 32    <<<<<<<< the same issue here

I think I managed to track down the problem to the following pieces of code:

in SystemZTargetLowering::lowerThreadPointer:

  SDValue TPHi = DAG.getCopyFromReg(Chain, DL, SystemZ::A0, MVT::i32);

combined with the 'high-word' feature dependent part in
SystemZTargetLowering::SystemZTargetLowering:

  if (Subtarget.hasHighWord())
    addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass);
  else
    addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass);

the compiler thinks there is an option to copy the content of access registers
into high half of the general purpose register, which is not available on the
platform.

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