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      <base href="https://bugs.llvm.org/">
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - SystemZ target - Incorrect code generated for accessing thread_local variables when high-word feature is available"
   href="https://bugs.llvm.org/show_bug.cgi?id=44254">44254</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>SystemZ target - Incorrect code generated for accessing thread_local variables when high-word feature is available
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>new-bugs
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>9.0
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>Other
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>other
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>new bugs
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>slavomir.kucera@broadcom.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>htmldeveloper@gmail.com, llvm-bugs@lists.llvm.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>I came across a bug in the generated code for SystemZ target when accessing
thread_local variables in functions that have 7 or more parameters.

The problem can be seen here
<a href="https://godbolt.org/z/v77J_p">https://godbolt.org/z/v77J_p</a>

while extracting the values from AR0 and AR1

        ear     %r0, %a0                 ; copy AR0 to GR0L
        risblg  %r14, %r0, 0, 159, 32    <<<<<<<< copy GR0H to GR14L
        sllg    %r14, %r14, 32
        ear     %r0, %a1              
        risblg  %r14, %r0, 0, 159, 32    <<<<<<<< the same issue here

I think I managed to track down the problem to the following pieces of code:

in SystemZTargetLowering::lowerThreadPointer:

  SDValue TPHi = DAG.getCopyFromReg(Chain, DL, SystemZ::A0, MVT::i32);

combined with the 'high-word' feature dependent part in
SystemZTargetLowering::SystemZTargetLowering:

  if (Subtarget.hasHighWord())
    addRegisterClass(MVT::i32, &SystemZ::GRX32BitRegClass);
  else
    addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass);

the compiler thinks there is an option to copy the content of access registers
into high half of the general purpose register, which is not available on the
platform.</pre>
        </div>
      </p>


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