[Openmp-commits] [PATCH] D130030: [OpenMP][DeviceRTL] Use `__atomic_exchange_n` to implement atomicStore

[Shilei Tian via Phabricator via Openmp-commits]

tianshilei1992 updated this revision to Diff 445590.
tianshilei1992 added a comment.
This revision is now accepted and ready to land.

refine it


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130030/new/

https://reviews.llvm.org/D130030

Files:
  openmp/libomptarget/DeviceRTL/include/Synchronization.h
  openmp/libomptarget/DeviceRTL/src/Synchronization.cpp


Index: openmp/libomptarget/DeviceRTL/src/Synchronization.cpp
===================================================================
--- openmp/libomptarget/DeviceRTL/src/Synchronization.cpp
+++ openmp/libomptarget/DeviceRTL/src/Synchronization.cpp
@@ -35,10 +35,6 @@
   return __atomic_fetch_add(Address, 0U, __ATOMIC_SEQ_CST);
 }
 
-void atomicStore(uint32_t *Address, uint32_t Val, int Ordering) {
-  __atomic_store_n(Address, Val, Ordering);
-}
-
 uint32_t atomicAdd(uint32_t *Address, uint32_t Val, int Ordering) {
   return __atomic_fetch_add(Address, Val, Ordering);
 }
@@ -107,7 +103,10 @@
 
 void namedBarrierInit() {
   // Don't have global ctors, and shared memory is not zero init
-  atomic::store(&namedBarrierTracker, 0u, __ATOMIC_RELEASE);
+  // FIXME: Using __atomic_store_n here is a workaround because NVPTX backend
+  // doesn't support that, which could cause `llc` to crash because of
+  // instruction selection failure.
+  __atomic_store_n(&namedBarrierTracker, 0u, __ATOMIC_RELEASE);
 }
 
 void namedBarrier() {
@@ -145,7 +144,10 @@
       load &= 0xffff0000u; // because bits zeroed second
 
       // Reset the wave counter and release the waiting waves
-      atomic::store(&namedBarrierTracker, load, __ATOMIC_RELAXED);
+      // FIXME: Using __atomic_store_n here is a workaround because NVPTX
+      // backend doesn't support that, which could cause `llc` to crash because
+      // of instruction selection failure.
+      __atomic_store_n(&namedBarrierTracker, load, __ATOMIC_RELAXED);
     } else {
       // more waves still to go, spin until generation counter changes
       do {
@@ -320,10 +322,6 @@
   return impl::atomicLoad(Addr, Ordering);
 }
 
-void atomic::store(uint32_t *Addr, uint32_t V, int Ordering) {
-  impl::atomicStore(Addr, V, Ordering);
-}
-
 uint32_t atomic::inc(uint32_t *Addr, uint32_t V, int Ordering) {
   return impl::atomicInc(Addr, V, Ordering);
 }
Index: openmp/libomptarget/DeviceRTL/include/Synchronization.h
===================================================================
--- openmp/libomptarget/DeviceRTL/include/Synchronization.h
+++ openmp/libomptarget/DeviceRTL/include/Synchronization.h
@@ -62,9 +62,6 @@
 /// Atomically load \p Addr with \p Ordering semantics.
 uint32_t load(uint32_t *Addr, int Ordering);
 
-/// Atomically store \p V to \p Addr with \p Ordering semantics.
-void store(uint32_t *Addr, uint32_t V, int Ordering);
-
 /// Atomically increment \p *Addr and wrap at \p V with \p Ordering semantics.
 uint32_t inc(uint32_t *Addr, uint32_t V, int Ordering);
 


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