[Openmp-commits] [PATCH] D120519: [OpenMP][libomp] Fix register constraint for tpause and umwait

Jonathan Peyton via Phabricator via Openmp-commits openmp-commits at lists.llvm.org
Thu Feb 24 14:16:11 PST 2022


jlpeyton created this revision.
jlpeyton added reviewers: AndreyChurbanov, tlwilmar, hbae.
jlpeyton added a project: OpenMP.
Herald added subscribers: guansong, yaxunl.
jlpeyton requested review of this revision.
Herald added a reviewer: jdoerfert.
Herald added a subscriber: sstefan1.

Register constraint switched to `"=q"` which means very specifically (from https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints)

> Any register accessible as rl. In 32-bit mode, a, b, c, and d; in 64-bit mode, any integer register."

Older gcc versions  (8.x and below) were trying to use `esi` or `edi` for the 8 bit `flag` variable, but it wound up displaying this error in the end:

  kmp_lock.cpp: In function ‘void __kmp_spin_backoff(kmp_backoff_t*)’:
  kmp_lock.cpp:2684:1: error: unsupported size for integer register

Hence the correct restriction is `"=q"` instead of `"=r"`.

Fixes: https://github.com/llvm/llvm-project/issues/53309


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D120519

Files:
  openmp/runtime/src/kmp.h


Index: openmp/runtime/src/kmp.h
===================================================================
--- openmp/runtime/src/kmp.h
+++ openmp/runtime/src/kmp.h
@@ -1334,7 +1334,10 @@
   char flag;
   __asm__ volatile("#tpause\n.byte 0x66, 0x0F, 0xAE, 0xF1\n"
                    "setb   %0"
-                   : "=r"(flag)
+                   // The "=q" restraint means any register accessible as rl
+                   //   in 32-bit mode: a, b, c, and d;
+                   //   in 64-bit mode: any integer register
+                   : "=q"(flag)
                    : "a"(timeLo), "d"(timeHi), "c"(hint)
                    :);
   return flag;
@@ -1361,7 +1364,10 @@
   char flag;
   __asm__ volatile("#umwait\n.byte 0xF2, 0x0F, 0xAE, 0xF1\n"
                    "setb   %0"
-                   : "=r"(flag)
+                   // The "=q" restraint means any register accessible as rl
+                   //   in 32-bit mode: a, b, c, and d;
+                   //   in 64-bit mode: any integer register
+                   : "=q"(flag)
                    : "a"(timeLo), "d"(timeHi), "c"(hint)
                    :);
   return flag;


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