[Openmp-commits] [openmp] ef717f3 - Revert "[clang][openmp][NFC] Remove arch-specific CGOpenMPRuntimeGPU files"
Atmn Patel via Openmp-commits
openmp-commits at lists.llvm.org
Mon Nov 8 23:11:08 PST 2021
Author: Atmn Patel
Date: 2021-11-09T02:10:42-05:00
New Revision: ef717f385232562047acdc25ad355c3f29dfbe7d
URL: https://github.com/llvm/llvm-project/commit/ef717f385232562047acdc25ad355c3f29dfbe7d
DIFF: https://github.com/llvm/llvm-project/commit/ef717f385232562047acdc25ad355c3f29dfbe7d.diff
LOG: Revert "[clang][openmp][NFC] Remove arch-specific CGOpenMPRuntimeGPU files"
This reverts commit 81a7cad2ffc18f15b732f69d991c8398c979c5ca.
Added:
clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.cpp
clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.h
clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h
Modified:
clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
clang/lib/CodeGen/CMakeLists.txt
clang/lib/CodeGen/CodeGenModule.cpp
clang/test/OpenMP/nvptx_parallel_codegen.cpp
clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp
clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
openmp/libomptarget/DeviceRTL/src/Mapping.cpp
openmp/libomptarget/DeviceRTL/src/Utils.cpp
openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
openmp/libomptarget/deviceRTLs/common/include/target/shuffle.h
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
Removed:
################################################################################
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.cpp b/clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.cpp
new file mode 100644
index 0000000000000..cf6f6bc3654c0
--- /dev/null
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.cpp
@@ -0,0 +1,48 @@
+//===-- CGOpenMPRuntimeAMDGCN.cpp - Interface to OpenMP AMDGCN Runtimes --===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This provides a class for OpenMP runtime code generation specialized to
+// AMDGCN targets from generalized CGOpenMPRuntimeGPU class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "CGOpenMPRuntimeAMDGCN.h"
+#include "CGOpenMPRuntimeGPU.h"
+#include "CodeGenFunction.h"
+#include "clang/AST/Attr.h"
+#include "clang/AST/DeclOpenMP.h"
+#include "clang/AST/StmtOpenMP.h"
+#include "clang/AST/StmtVisitor.h"
+#include "clang/Basic/Cuda.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/Frontend/OpenMP/OMPGridValues.h"
+#include "llvm/IR/IntrinsicsAMDGPU.h"
+
+using namespace clang;
+using namespace CodeGen;
+using namespace llvm::omp;
+
+CGOpenMPRuntimeAMDGCN::CGOpenMPRuntimeAMDGCN(CodeGenModule &CGM)
+ : CGOpenMPRuntimeGPU(CGM) {
+ if (!CGM.getLangOpts().OpenMPIsDevice)
+ llvm_unreachable("OpenMP AMDGCN can only handle device code.");
+}
+
+llvm::Value *CGOpenMPRuntimeAMDGCN::getGPUWarpSize(CodeGenFunction &CGF) {
+ CGBuilderTy &Bld = CGF.Builder;
+ // return constant compile-time target-specific warp size
+ unsigned WarpSize = CGF.getTarget().getGridValue().GV_Warp_Size;
+ return Bld.getInt32(WarpSize);
+}
+
+llvm::Value *CGOpenMPRuntimeAMDGCN::getGPUThreadID(CodeGenFunction &CGF) {
+ CGBuilderTy &Bld = CGF.Builder;
+ llvm::Function *F =
+ CGF.CGM.getIntrinsic(llvm::Intrinsic::amdgcn_workitem_id_x);
+ return Bld.CreateCall(F, llvm::None, "nvptx_tid");
+}
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.h b/clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.h
new file mode 100644
index 0000000000000..cecbcaf3c3d36
--- /dev/null
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.h
@@ -0,0 +1,40 @@
+//===--- CGOpenMPRuntimeAMDGCN.h - Interface to OpenMP AMDGCN Runtimes ---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This provides a class for OpenMP runtime code generation specialized to
+// AMDGCN targets from generalized CGOpenMPRuntimeGPU class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CLANG_LIB_CODEGEN_CGOPENMPRUNTIMEAMDGCN_H
+#define LLVM_CLANG_LIB_CODEGEN_CGOPENMPRUNTIMEAMDGCN_H
+
+#include "CGOpenMPRuntime.h"
+#include "CGOpenMPRuntimeGPU.h"
+#include "CodeGenFunction.h"
+#include "clang/AST/StmtOpenMP.h"
+
+namespace clang {
+namespace CodeGen {
+
+class CGOpenMPRuntimeAMDGCN final : public CGOpenMPRuntimeGPU {
+
+public:
+ explicit CGOpenMPRuntimeAMDGCN(CodeGenModule &CGM);
+
+ /// Get the GPU warp size.
+ llvm::Value *getGPUWarpSize(CodeGenFunction &CGF) override;
+
+ /// Get the id of the current thread on the GPU.
+ llvm::Value *getGPUThreadID(CodeGenFunction &CGF) override;
+};
+
+} // namespace CodeGen
+} // namespace clang
+
+#endif // LLVM_CLANG_LIB_CODEGEN_CGOPENMPRUNTIMEAMDGCN_H
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
index dcb224f331561..56428cacfe7c1 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
@@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "CGOpenMPRuntimeGPU.h"
+#include "CGOpenMPRuntimeNVPTX.h"
#include "CodeGenFunction.h"
#include "clang/AST/Attr.h"
#include "clang/AST/DeclOpenMP.h"
@@ -20,6 +21,7 @@
#include "clang/Basic/Cuda.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Frontend/OpenMP/OMPGridValues.h"
+#include "llvm/IR/IntrinsicsNVPTX.h"
#include "llvm/Support/MathExtras.h"
using namespace clang;
@@ -1195,7 +1197,7 @@ unsigned CGOpenMPRuntimeGPU::getDefaultLocationReserved2Flags() const {
CGOpenMPRuntimeGPU::CGOpenMPRuntimeGPU(CodeGenModule &CGM)
: CGOpenMPRuntime(CGM, "_", "$") {
if (!CGM.getLangOpts().OpenMPIsDevice)
- llvm_unreachable("OpenMP can only handle device code.");
+ llvm_unreachable("OpenMP NVPTX can only handle device code.");
llvm::OpenMPIRBuilder &OMPBuilder = getOMPBuilder();
if (CGM.getLangOpts().OpenMPTargetNewRuntime) {
@@ -3958,18 +3960,3 @@ llvm::Value *CGOpenMPRuntimeGPU::getGPUNumThreads(CodeGenFunction &CGF) {
}
return Bld.CreateCall(F, llvm::None, "nvptx_num_threads");
}
-
-llvm::Value *CGOpenMPRuntimeGPU::getGPUThreadID(CodeGenFunction &CGF) {
- ArrayRef<llvm::Value *> Args{};
- return CGF.EmitRuntimeCall(
- OMPBuilder.getOrCreateRuntimeFunction(
- CGM.getModule(), OMPRTL___kmpc_get_hardware_thread_id_in_block),
- Args);
-}
-
-llvm::Value *CGOpenMPRuntimeGPU::getGPUWarpSize(CodeGenFunction &CGF) {
- ArrayRef<llvm::Value *> Args{};
- return CGF.EmitRuntimeCall(OMPBuilder.getOrCreateRuntimeFunction(
- CGM.getModule(), OMPRTL___kmpc_get_warp_size),
- Args);
-}
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.h b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
index ac51264d7685b..cc069844660b4 100644
--- a/clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
@@ -176,10 +176,10 @@ class CGOpenMPRuntimeGPU : public CGOpenMPRuntime {
/// and NVPTX.
/// Get the GPU warp size.
- llvm::Value *getGPUWarpSize(CodeGenFunction &CGF);
+ virtual llvm::Value *getGPUWarpSize(CodeGenFunction &CGF) = 0;
/// Get the id of the current thread on the GPU.
- llvm::Value *getGPUThreadID(CodeGenFunction &CGF);
+ virtual llvm::Value *getGPUThreadID(CodeGenFunction &CGF) = 0;
/// Get the maximum number of threads in a block of the GPU.
llvm::Value *getGPUNumThreads(CodeGenFunction &CGF);
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp b/clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
new file mode 100644
index 0000000000000..ae07ffd3c93fb
--- /dev/null
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
@@ -0,0 +1,48 @@
+//===---- CGOpenMPRuntimeNVPTX.cpp - Interface to OpenMP NVPTX Runtimes ---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This provides a class for OpenMP runtime code generation specialized to NVPTX
+// targets from generalized CGOpenMPRuntimeGPU class.
+//
+//===----------------------------------------------------------------------===//
+
+#include "CGOpenMPRuntimeNVPTX.h"
+#include "CGOpenMPRuntimeGPU.h"
+#include "CodeGenFunction.h"
+#include "clang/AST/Attr.h"
+#include "clang/AST/DeclOpenMP.h"
+#include "clang/AST/StmtOpenMP.h"
+#include "clang/AST/StmtVisitor.h"
+#include "clang/Basic/Cuda.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/IR/IntrinsicsNVPTX.h"
+
+using namespace clang;
+using namespace CodeGen;
+using namespace llvm::omp;
+
+CGOpenMPRuntimeNVPTX::CGOpenMPRuntimeNVPTX(CodeGenModule &CGM)
+ : CGOpenMPRuntimeGPU(CGM) {
+ if (!CGM.getLangOpts().OpenMPIsDevice)
+ llvm_unreachable("OpenMP NVPTX can only handle device code.");
+}
+
+llvm::Value *CGOpenMPRuntimeNVPTX::getGPUWarpSize(CodeGenFunction &CGF) {
+ return CGF.EmitRuntimeCall(
+ llvm::Intrinsic::getDeclaration(
+ &CGF.CGM.getModule(), llvm::Intrinsic::nvvm_read_ptx_sreg_warpsize),
+ "nvptx_warp_size");
+}
+
+llvm::Value *CGOpenMPRuntimeNVPTX::getGPUThreadID(CodeGenFunction &CGF) {
+ CGBuilderTy &Bld = CGF.Builder;
+ llvm::Function *F;
+ F = llvm::Intrinsic::getDeclaration(
+ &CGF.CGM.getModule(), llvm::Intrinsic::nvvm_read_ptx_sreg_tid_x);
+ return Bld.CreateCall(F, llvm::None, "nvptx_tid");
+}
diff --git a/clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h b/clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h
new file mode 100644
index 0000000000000..ddb4fc2c59b2c
--- /dev/null
+++ b/clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h
@@ -0,0 +1,40 @@
+//===----- CGOpenMPRuntimeNVPTX.h - Interface to OpenMP NVPTX Runtimes ----===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This provides a class for OpenMP runtime code generation specialized to NVPTX
+// targets from generalized CGOpenMPRuntimeGPU class.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CLANG_LIB_CODEGEN_CGOPENMPRUNTIMENVPTX_H
+#define LLVM_CLANG_LIB_CODEGEN_CGOPENMPRUNTIMENVPTX_H
+
+#include "CGOpenMPRuntime.h"
+#include "CGOpenMPRuntimeGPU.h"
+#include "CodeGenFunction.h"
+#include "clang/AST/StmtOpenMP.h"
+
+namespace clang {
+namespace CodeGen {
+
+class CGOpenMPRuntimeNVPTX final : public CGOpenMPRuntimeGPU {
+
+public:
+ explicit CGOpenMPRuntimeNVPTX(CodeGenModule &CGM);
+
+ /// Get the GPU warp size.
+ llvm::Value *getGPUWarpSize(CodeGenFunction &CGF) override;
+
+ /// Get the id of the current thread on the GPU.
+ llvm::Value *getGPUThreadID(CodeGenFunction &CGF) override;
+};
+
+} // CodeGen namespace.
+} // clang namespace.
+
+#endif // LLVM_CLANG_LIB_CODEGEN_CGOPENMPRUNTIMENVPTX_H
diff --git a/clang/lib/CodeGen/CMakeLists.txt b/clang/lib/CodeGen/CMakeLists.txt
index c0b486daae3ab..5d493595dcd51 100644
--- a/clang/lib/CodeGen/CMakeLists.txt
+++ b/clang/lib/CodeGen/CMakeLists.txt
@@ -59,7 +59,9 @@ add_clang_library(clangCodeGen
CGObjCRuntime.cpp
CGOpenCLRuntime.cpp
CGOpenMPRuntime.cpp
+ CGOpenMPRuntimeAMDGCN.cpp
CGOpenMPRuntimeGPU.cpp
+ CGOpenMPRuntimeNVPTX.cpp
CGRecordLayoutBuilder.cpp
CGStmt.cpp
CGStmtOpenMP.cpp
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index df5e02e9812f7..3d11da2956546 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -19,7 +19,8 @@
#include "CGObjCRuntime.h"
#include "CGOpenCLRuntime.h"
#include "CGOpenMPRuntime.h"
-#include "CGOpenMPRuntimeGPU.h"
+#include "CGOpenMPRuntimeAMDGCN.h"
+#include "CGOpenMPRuntimeNVPTX.h"
#include "CodeGenFunction.h"
#include "CodeGenPGO.h"
#include "ConstantEmitter.h"
@@ -243,10 +244,14 @@ void CodeGenModule::createOpenMPRuntime() {
switch (getTriple().getArch()) {
case llvm::Triple::nvptx:
case llvm::Triple::nvptx64:
+ assert(getLangOpts().OpenMPIsDevice &&
+ "OpenMP NVPTX is only prepared to deal with device code.");
+ OpenMPRuntime.reset(new CGOpenMPRuntimeNVPTX(*this));
+ break;
case llvm::Triple::amdgcn:
assert(getLangOpts().OpenMPIsDevice &&
- "OpenMP AMDGPU/NVPTX is only prepared to deal with device code.");
- OpenMPRuntime.reset(new CGOpenMPRuntimeGPU(*this));
+ "OpenMP AMDGCN is only prepared to deal with device code.");
+ OpenMPRuntime.reset(new CGOpenMPRuntimeAMDGCN(*this));
break;
default:
if (LangOpts.OpenMPSimd)
diff --git a/clang/test/OpenMP/nvptx_parallel_codegen.cpp b/clang/test/OpenMP/nvptx_parallel_codegen.cpp
index 15379282e853c..48fb62f9f2c89 100644
--- a/clang/test/OpenMP/nvptx_parallel_codegen.cpp
+++ b/clang/test/OpenMP/nvptx_parallel_codegen.cpp
@@ -1664,31 +1664,31 @@ int bar(int n){
// CHECK1-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = call i64 @__kmpc_warp_active_thread_mask()
-// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK1-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
// CHECK1-NEXT: store i32 0, i32* [[CRITICAL_COUNTER]], align 4
// CHECK1-NEXT: br label [[OMP_CRITICAL_LOOP:%.*]]
// CHECK1: omp.critical.loop:
-// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[CRITICAL_COUNTER]], align 4
-// CHECK1-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP3]], [[NVPTX_NUM_THREADS]]
-// CHECK1-NEXT: br i1 [[TMP4]], label [[OMP_CRITICAL_TEST:%.*]], label [[OMP_CRITICAL_EXIT:%.*]]
+// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CRITICAL_COUNTER]], align 4
+// CHECK1-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], [[NVPTX_NUM_THREADS]]
+// CHECK1-NEXT: br i1 [[TMP3]], label [[OMP_CRITICAL_TEST:%.*]], label [[OMP_CRITICAL_EXIT:%.*]]
// CHECK1: omp.critical.test:
-// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[CRITICAL_COUNTER]], align 4
-// CHECK1-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP2]], [[TMP5]]
-// CHECK1-NEXT: br i1 [[TMP6]], label [[OMP_CRITICAL_BODY:%.*]], label [[OMP_CRITICAL_SYNC:%.*]]
+// CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[CRITICAL_COUNTER]], align 4
+// CHECK1-NEXT: [[TMP5:%.*]] = icmp eq i32 [[NVPTX_TID]], [[TMP4]]
+// CHECK1-NEXT: br i1 [[TMP5]], label [[OMP_CRITICAL_BODY:%.*]], label [[OMP_CRITICAL_SYNC:%.*]]
// CHECK1: omp.critical.body:
-// CHECK1-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
-// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], [8 x i32]* @"_gomp_critical_user_$var")
-// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4
-// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1
+// CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
+// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
+// CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], [8 x i32]* @"_gomp_critical_user_$var")
+// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP0]], align 4
+// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK1-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
-// CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], [8 x i32]* @"_gomp_critical_user_$var")
+// CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], [8 x i32]* @"_gomp_critical_user_$var")
// CHECK1-NEXT: br label [[OMP_CRITICAL_SYNC]]
// CHECK1: omp.critical.sync:
// CHECK1-NEXT: call void @__kmpc_syncwarp(i64 [[TMP1]])
-// CHECK1-NEXT: [[TMP10:%.*]] = add nsw i32 [[TMP5]], 1
-// CHECK1-NEXT: store i32 [[TMP10]], i32* [[CRITICAL_COUNTER]], align 4
+// CHECK1-NEXT: [[TMP9:%.*]] = add nsw i32 [[TMP4]], 1
+// CHECK1-NEXT: store i32 [[TMP9]], i32* [[CRITICAL_COUNTER]], align 4
// CHECK1-NEXT: br label [[OMP_CRITICAL_LOOP]]
// CHECK1: omp.critical.exit:
// CHECK1-NEXT: ret void
@@ -1936,31 +1936,31 @@ int bar(int n){
// CHECK2-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
// CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[A_ADDR]], align 4
// CHECK2-NEXT: [[TMP1:%.*]] = call i64 @__kmpc_warp_active_thread_mask()
-// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK2-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block()
// CHECK2-NEXT: store i32 0, i32* [[CRITICAL_COUNTER]], align 4
// CHECK2-NEXT: br label [[OMP_CRITICAL_LOOP:%.*]]
// CHECK2: omp.critical.loop:
-// CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[CRITICAL_COUNTER]], align 4
-// CHECK2-NEXT: [[TMP4:%.*]] = icmp slt i32 [[TMP3]], [[NVPTX_NUM_THREADS]]
-// CHECK2-NEXT: br i1 [[TMP4]], label [[OMP_CRITICAL_TEST:%.*]], label [[OMP_CRITICAL_EXIT:%.*]]
+// CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[CRITICAL_COUNTER]], align 4
+// CHECK2-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], [[NVPTX_NUM_THREADS]]
+// CHECK2-NEXT: br i1 [[TMP3]], label [[OMP_CRITICAL_TEST:%.*]], label [[OMP_CRITICAL_EXIT:%.*]]
// CHECK2: omp.critical.test:
-// CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[CRITICAL_COUNTER]], align 4
-// CHECK2-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP2]], [[TMP5]]
-// CHECK2-NEXT: br i1 [[TMP6]], label [[OMP_CRITICAL_BODY:%.*]], label [[OMP_CRITICAL_SYNC:%.*]]
+// CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[CRITICAL_COUNTER]], align 4
+// CHECK2-NEXT: [[TMP5:%.*]] = icmp eq i32 [[NVPTX_TID]], [[TMP4]]
+// CHECK2-NEXT: br i1 [[TMP5]], label [[OMP_CRITICAL_BODY:%.*]], label [[OMP_CRITICAL_SYNC:%.*]]
// CHECK2: omp.critical.body:
-// CHECK2-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
-// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
-// CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], [8 x i32]* @"_gomp_critical_user_$var")
-// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP0]], align 4
-// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP9]], 1
+// CHECK2-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
+// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
+// CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], [8 x i32]* @"_gomp_critical_user_$var")
+// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP0]], align 4
+// CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP8]], 1
// CHECK2-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
-// CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], [8 x i32]* @"_gomp_critical_user_$var")
+// CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP7]], [8 x i32]* @"_gomp_critical_user_$var")
// CHECK2-NEXT: br label [[OMP_CRITICAL_SYNC]]
// CHECK2: omp.critical.sync:
// CHECK2-NEXT: call void @__kmpc_syncwarp(i64 [[TMP1]])
-// CHECK2-NEXT: [[TMP10:%.*]] = add nsw i32 [[TMP5]], 1
-// CHECK2-NEXT: store i32 [[TMP10]], i32* [[CRITICAL_COUNTER]], align 4
+// CHECK2-NEXT: [[TMP9:%.*]] = add nsw i32 [[TMP4]], 1
+// CHECK2-NEXT: store i32 [[TMP9]], i32* [[CRITICAL_COUNTER]], align 4
// CHECK2-NEXT: br label [[OMP_CRITICAL_LOOP]]
// CHECK2: omp.critical.exit:
// CHECK2-NEXT: ret void
diff --git a/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp b/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp
index 18009ba3562e7..9bb6b15536d7e 100644
--- a/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp
+++ b/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen.cpp
@@ -115,7 +115,7 @@ int bar(int n){
// CHECK: [[ELT_CAST:%.+]] = bitcast double* [[ELT]] to i64*
// CHECK: [[REMOTE_ELT_CAST:%.+]] = bitcast double* [[REMOTE_ELT]] to i64*
// CHECK: [[ELT_VAL:%.+]] = load i64, i64* [[ELT_CAST]], align
-// CHECK: [[WS32:%.+]] = call i32 @__kmpc_get_warp_size()
+// CHECK: [[WS32:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK: [[WS:%.+]] = trunc i32 [[WS32]] to i16
// CHECK: [[REMOTE_ELT_VAL64:%.+]] = call i64 @__kmpc_shuffle_int64(i64 [[ELT_VAL]], i16 [[LANEOFFSET]], i16 [[WS]])
//
@@ -320,7 +320,7 @@ int bar(int n){
// CHECK: [[ELT_VAL:%.+]] = load i8, i8* [[ELT_VOID]], align
//
// CHECK: [[ELT_CAST:%.+]] = sext i8 [[ELT_VAL]] to i32
-// CHECK: [[WS32:%.+]] = call i32 @__kmpc_get_warp_size()
+// CHECK: [[WS32:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK: [[WS:%.+]] = trunc i32 [[WS32]] to i16
// CHECK: [[REMOTE_ELT1_VAL32:%.+]] = call i32 @__kmpc_shuffle_int32(i32 [[ELT_CAST]], i16 [[LANEOFFSET]], i16 [[WS]])
// CHECK: [[REMOTE_ELT1_VAL:%.+]] = trunc i32 [[REMOTE_ELT1_VAL32]] to i8
@@ -336,7 +336,7 @@ int bar(int n){
// CHECK: [[ELT_CAST:%.+]] = bitcast float* [[ELT]] to i32*
// CHECK: [[REMOTE_ELT2_CAST:%.+]] = bitcast float* [[REMOTE_ELT2]] to i32*
// CHECK: [[ELT_VAL:%.+]] = load i32, i32* [[ELT_CAST]], align
-// CHECK: [[WS32:%.+]] = call i32 @__kmpc_get_warp_size()
+// CHECK: [[WS32:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK: [[WS:%.+]] = trunc i32 [[WS32]] to i16
// CHECK: [[REMOTE_ELT2_VAL32:%.+]] = call i32 @__kmpc_shuffle_int32(i32 [[ELT_VAL]], i16 [[LANEOFFSET]], i16 [[WS]])
//
@@ -617,7 +617,7 @@ int bar(int n){
// CHECK: [[ELT:%.+]] = bitcast i8* [[ELT_VOID]] to i32*
// CHECK: [[ELT_VAL:%.+]] = load i32, i32* [[ELT]], align
//
-// CHECK: [[WS32:%.+]] = call i32 @__kmpc_get_warp_size()
+// CHECK: [[WS32:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK: [[WS:%.+]] = trunc i32 [[WS32]] to i16
// CHECK: [[REMOTE_ELT1_VAL:%.+]] = call i32 @__kmpc_shuffle_int32(i32 [[ELT_VAL]], i16 [[LANEOFFSET]], i16 [[WS]])
//
@@ -632,7 +632,7 @@ int bar(int n){
// CHECK: [[ELT_VAL:%.+]] = load i16, i16* [[ELT]], align
//
// CHECK: [[ELT_CAST:%.+]] = sext i16 [[ELT_VAL]] to i32
-// CHECK: [[WS32:%.+]] = call i32 @__kmpc_get_warp_size()
+// CHECK: [[WS32:%.+]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK: [[WS:%.+]] = trunc i32 [[WS32]] to i16
// CHECK: [[REMOTE_ELT2_VAL32:%.+]] = call i32 @__kmpc_shuffle_int32(i32 [[ELT_CAST]], i16 [[LANEOFFSET]], i16 [[WS]])
// CHECK: [[REMOTE_ELT2_VAL:%.+]] = trunc i32 [[REMOTE_ELT2_VAL32]] to i16
diff --git a/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp b/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
index 90229cae452f2..207068081b661 100644
--- a/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
+++ b/clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
@@ -461,7 +461,7 @@ void test() {
// CHECK1-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64*
// CHECK1-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4
-// CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK1-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
// CHECK1-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]])
// CHECK1-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4
@@ -520,10 +520,10 @@ void test() {
// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA12]]
// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
-// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
-// CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
// CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
@@ -553,7 +553,7 @@ void test() {
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
-// CHECK1: then2:
+// CHECK1: then4:
// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0
// CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA12]]
@@ -562,9 +562,9 @@ void test() {
// CHECK1-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA8]]
// CHECK1-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA8]]
// CHECK1-NEXT: br label [[IFCONT6:%.*]]
-// CHECK1: else3:
+// CHECK1: else5:
// CHECK1-NEXT: br label [[IFCONT6]]
-// CHECK1: ifcont4:
+// CHECK1: ifcont6:
// CHECK1-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK1-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA8]]
// CHECK1-NEXT: br label [[PRECOND]]
@@ -1040,7 +1040,7 @@ void test() {
// CHECK1-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]]
// CHECK1: .shuffle.then:
// CHECK1-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8
-// CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK1-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
// CHECK1-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]])
// CHECK1-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8
@@ -1101,10 +1101,10 @@ void test() {
// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA12]]
// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
-// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
-// CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
// CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
@@ -1134,7 +1134,7 @@ void test() {
// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
-// CHECK1: then2:
+// CHECK1: then4:
// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0
// CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA12]]
@@ -1143,9 +1143,9 @@ void test() {
// CHECK1-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA8]]
// CHECK1-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA8]]
// CHECK1-NEXT: br label [[IFCONT6:%.*]]
-// CHECK1: else3:
+// CHECK1: else5:
// CHECK1-NEXT: br label [[IFCONT6]]
-// CHECK1: ifcont4:
+// CHECK1: ifcont6:
// CHECK1-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK1-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA8]]
// CHECK1-NEXT: br label [[PRECOND]]
@@ -1695,7 +1695,7 @@ void test() {
// CHECK2-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64*
// CHECK2-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4
-// CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK2-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
// CHECK2-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]])
// CHECK2-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4
@@ -1754,10 +1754,10 @@ void test() {
// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA12]]
// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
-// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
-// CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
// CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
// CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
@@ -1787,7 +1787,7 @@ void test() {
// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
-// CHECK2: then2:
+// CHECK2: then4:
// CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
// CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0
// CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA12]]
@@ -1796,9 +1796,9 @@ void test() {
// CHECK2-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA8]]
// CHECK2-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA8]]
// CHECK2-NEXT: br label [[IFCONT6:%.*]]
-// CHECK2: else3:
+// CHECK2: else5:
// CHECK2-NEXT: br label [[IFCONT6]]
-// CHECK2: ifcont4:
+// CHECK2: ifcont6:
// CHECK2-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK2-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA8]]
// CHECK2-NEXT: br label [[PRECOND]]
@@ -2274,7 +2274,7 @@ void test() {
// CHECK2-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]]
// CHECK2: .shuffle.then:
// CHECK2-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8
-// CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK2-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
// CHECK2-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]])
// CHECK2-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8
@@ -2335,10 +2335,10 @@ void test() {
// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA12]]
// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
-// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
-// CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
// CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
// CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
@@ -2368,7 +2368,7 @@ void test() {
// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
-// CHECK2: then2:
+// CHECK2: then4:
// CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
// CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0
// CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA12]]
@@ -2377,9 +2377,9 @@ void test() {
// CHECK2-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA8]]
// CHECK2-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA8]]
// CHECK2-NEXT: br label [[IFCONT6:%.*]]
-// CHECK2: else3:
+// CHECK2: else5:
// CHECK2-NEXT: br label [[IFCONT6]]
-// CHECK2: ifcont4:
+// CHECK2: ifcont6:
// CHECK2-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK2-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA8]]
// CHECK2-NEXT: br label [[PRECOND]]
@@ -2929,7 +2929,7 @@ void test() {
// CHECK3-NEXT: [[TMP15:%.*]] = bitcast %"class.std::complex"* [[TMP12]] to i64*
// CHECK3-NEXT: [[TMP16:%.*]] = bitcast %"class.std::complex"* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 4
-// CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK3-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
// CHECK3-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]])
// CHECK3-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 4
@@ -2988,10 +2988,10 @@ void test() {
// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA12]]
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
-// CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
-// CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
// CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
// CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
@@ -3021,7 +3021,7 @@ void test() {
// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
-// CHECK3: then2:
+// CHECK3: then4:
// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0
// CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA12]]
@@ -3030,9 +3030,9 @@ void test() {
// CHECK3-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA8]]
// CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA8]]
// CHECK3-NEXT: br label [[IFCONT6:%.*]]
-// CHECK3: else3:
+// CHECK3: else5:
// CHECK3-NEXT: br label [[IFCONT6]]
-// CHECK3: ifcont4:
+// CHECK3: ifcont6:
// CHECK3-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK3-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA8]]
// CHECK3-NEXT: br label [[PRECOND]]
@@ -3508,7 +3508,7 @@ void test() {
// CHECK3-NEXT: br i1 [[TMP24]], label [[DOTSHUFFLE_THEN]], label [[DOTSHUFFLE_EXIT:%.*]]
// CHECK3: .shuffle.then:
// CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[TMP17]], align 8
-// CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
// CHECK3-NEXT: [[TMP26:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
// CHECK3-NEXT: [[TMP27:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP25]], i16 [[TMP7]], i16 [[TMP26]])
// CHECK3-NEXT: store i64 [[TMP27]], i64* [[TMP18]], align 8
@@ -3569,10 +3569,10 @@ void test() {
// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8, !tbaa [[TBAA12]]
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
-// CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
-// CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
+// CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
// CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
// CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
@@ -3602,7 +3602,7 @@ void test() {
// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4, !tbaa [[TBAA8]]
// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
-// CHECK3: then2:
+// CHECK3: then4:
// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0
// CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8, !tbaa [[TBAA12]]
@@ -3611,9 +3611,9 @@ void test() {
// CHECK3-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4, !tbaa [[TBAA8]]
// CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4, !tbaa [[TBAA8]]
// CHECK3-NEXT: br label [[IFCONT6:%.*]]
-// CHECK3: else3:
+// CHECK3: else5:
// CHECK3-NEXT: br label [[IFCONT6]]
-// CHECK3: ifcont4:
+// CHECK3: ifcont6:
// CHECK3-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
// CHECK3-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4, !tbaa [[TBAA8]]
// CHECK3-NEXT: br label [[PRECOND]]
diff --git a/clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp b/clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
index d0a19bdb43964..4d5863f81b825 100644
--- a/clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
+++ b/clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
@@ -4225,7 +4225,7 @@ int bar(int n){
// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK1-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK1-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], double* [[E_ON_STACK]]) #[[ATTR3:[0-9]+]]
+// CHECK1-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], double* [[E_ON_STACK]]) #[[ATTR4:[0-9]+]]
// CHECK1-NEXT: call void @__kmpc_free_shared(i8* [[E1]], i64 8)
// CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
// CHECK1-NEXT: ret void
@@ -4299,48 +4299,48 @@ int bar(int n){
// CHECK1-NEXT: [[TMP15:%.*]] = bitcast double* [[TMP12]] to i64*
// CHECK1-NEXT: [[TMP16:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK1-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 8
-// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK1-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16
-// CHECK1-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]])
-// CHECK1-NEXT: store i64 [[TMP20]], i64* [[TMP16]], align 8
-// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1
-// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1
-// CHECK1-NEXT: [[TMP23:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP11]], align 8
-// CHECK1-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK1-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK1-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]]
-// CHECK1-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK1-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1
-// CHECK1-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0
-// CHECK1-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]]
-// CHECK1-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK1-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]]
-// CHECK1-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]]
-// CHECK1-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]]
-// CHECK1-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK1-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK1-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]])
+// CHECK1-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 8
+// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i64 1
+// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i64 1
+// CHECK1-NEXT: [[TMP22:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK1-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 8
+// CHECK1-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK1-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK1-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK1-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]]
+// CHECK1-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK1-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1
+// CHECK1-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0
+// CHECK1-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]]
+// CHECK1-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK1-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]]
+// CHECK1-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]]
+// CHECK1-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]]
+// CHECK1-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK1: then:
-// CHECK1-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8*
-// CHECK1-NEXT: [[TMP37:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP36]], i8* [[TMP37]]) #[[ATTR3]]
+// CHECK1-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8*
+// CHECK1-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR4]]
// CHECK1-NEXT: br label [[IFCONT:%.*]]
// CHECK1: else:
// CHECK1-NEXT: br label [[IFCONT]]
// CHECK1: ifcont:
-// CHECK1-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK1-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK1-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK1-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK1-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK1-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
+// CHECK1-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
// CHECK1: then4:
-// CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 8
-// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP44:%.*]] = load i8*, i8** [[TMP43]], align 8
-// CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to double*
-// CHECK1-NEXT: [[TMP46:%.*]] = bitcast i8* [[TMP44]] to double*
-// CHECK1-NEXT: [[TMP47:%.*]] = load double, double* [[TMP45]], align 8
-// CHECK1-NEXT: store double [[TMP47]], double* [[TMP46]], align 8
+// CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 8
+// CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 8
+// CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to double*
+// CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to double*
+// CHECK1-NEXT: [[TMP46:%.*]] = load double, double* [[TMP44]], align 8
+// CHECK1-NEXT: store double [[TMP46]], double* [[TMP45]], align 8
// CHECK1-NEXT: br label [[IFCONT6:%.*]]
// CHECK1: else5:
// CHECK1-NEXT: br label [[IFCONT6]]
@@ -4357,53 +4357,53 @@ int bar(int n){
// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [1 x i8*]*
+// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
+// CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
// CHECK1-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4
// CHECK1-NEXT: br label [[PRECOND:%.*]]
// CHECK1: precond:
-// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4
-// CHECK1-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2
-// CHECK1-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]]
+// CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4
+// CHECK1-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2
+// CHECK1-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]]
// CHECK1: body:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]])
// CHECK1-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK1-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK1: then:
-// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP10]], align 8
-// CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*
-// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 [[TMP8]]
-// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]], align 4
-// CHECK1-NEXT: store volatile i32 [[TMP15]], i32 addrspace(3)* [[TMP14]], align 4
+// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 8
+// CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32*
+// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]]
+// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
+// CHECK1-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
// CHECK1-NEXT: br label [[IFCONT:%.*]]
// CHECK1: else:
// CHECK1-NEXT: br label [[IFCONT]]
// CHECK1: ifcont:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]]
-// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK1: then2:
-// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 8
-// CHECK1-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
-// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr i32, i32* [[TMP20]], i32 [[TMP8]]
-// CHECK1-NEXT: [[TMP22:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP17]], align 4
-// CHECK1-NEXT: store i32 [[TMP22]], i32* [[TMP21]], align 4
-// CHECK1-NEXT: br label [[IFCONT4:%.*]]
-// CHECK1: else3:
-// CHECK1-NEXT: br label [[IFCONT4]]
-// CHECK1: ifcont4:
-// CHECK1-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1
-// CHECK1-NEXT: store i32 [[TMP23]], i32* [[DOTCNT_ADDR]], align 4
+// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
+// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK1: then4:
+// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
+// CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
+// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]]
+// CHECK1-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
+// CHECK1-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4
+// CHECK1-NEXT: br label [[IFCONT6:%.*]]
+// CHECK1: else5:
+// CHECK1-NEXT: br label [[IFCONT6]]
+// CHECK1: ifcont6:
+// CHECK1-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
+// CHECK1-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4
// CHECK1-NEXT: br label [[PRECOND]]
// CHECK1: exit:
// CHECK1-NEXT: ret void
@@ -4453,7 +4453,7 @@ int bar(int n){
// CHECK1-NEXT: store i8* [[TMP8]], i8** [[TMP6]], align 8
// CHECK1-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[DOTADDR2]], align 8
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP9]], i8* [[TMP10]]) #[[ATTR3]]
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP9]], i8* [[TMP10]]) #[[ATTR4]]
// CHECK1-NEXT: ret void
//
//
@@ -4501,7 +4501,7 @@ int bar(int n){
// CHECK1-NEXT: store i8* [[TMP8]], i8** [[TMP6]], align 8
// CHECK1-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[DOTADDR2]], align 8
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP10]], i8* [[TMP9]]) #[[ATTR3]]
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP10]], i8* [[TMP9]]) #[[ATTR4]]
// CHECK1-NEXT: ret void
//
//
@@ -4530,7 +4530,7 @@ int bar(int n){
// CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK1-NEXT: store i32 [[TMP3]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK1-NEXT: call void @__omp_outlined__1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i8* [[C2]], float* [[D_ON_STACK]]) #[[ATTR3]]
+// CHECK1-NEXT: call void @__omp_outlined__1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i8* [[C2]], float* [[D_ON_STACK]]) #[[ATTR4]]
// CHECK1-NEXT: call void @__kmpc_free_shared(i8* [[D3]], i64 4)
// CHECK1-NEXT: call void @__kmpc_free_shared(i8* [[C2]], i64 1)
// CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
@@ -4623,75 +4623,75 @@ int bar(int n){
// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[TMP10]], i64 1
// CHECK1-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP10]], align 1
// CHECK1-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32
-// CHECK1-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK1-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16
-// CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]])
-// CHECK1-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8
-// CHECK1-NEXT: store i8 [[TMP18]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1
-// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[TMP10]], i64 1
-// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i64 1
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK1-NEXT: [[TMP15:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP15]])
+// CHECK1-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i8
+// CHECK1-NEXT: store i8 [[TMP17]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1
+// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP10]], i64 1
+// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i64 1
// CHECK1-NEXT: store i8* [[DOTOMP_REDUCTION_ELEMENT]], i8** [[TMP11]], align 8
-// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
-// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to float*
-// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr float, float* [[TMP24]], i64 1
-// CHECK1-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP25]] to i8*
-// CHECK1-NEXT: [[TMP27:%.*]] = bitcast float* [[TMP24]] to i32*
-// CHECK1-NEXT: [[TMP28:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
-// CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK1-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK1-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK1-NEXT: store i32 [[TMP32]], i32* [[TMP28]], align 4
-// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr i32, i32* [[TMP27]], i64 1
-// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr i32, i32* [[TMP28]], i64 1
-// CHECK1-NEXT: [[TMP35:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK1-NEXT: store i8* [[TMP35]], i8** [[TMP23]], align 8
-// CHECK1-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK1-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK1-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
-// CHECK1-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK1-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1
-// CHECK1-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0
-// CHECK1-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]]
-// CHECK1-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK1-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]]
-// CHECK1-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]]
-// CHECK1-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]]
-// CHECK1-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 8
+// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP21]] to float*
+// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr float, float* [[TMP23]], i64 1
+// CHECK1-NEXT: [[TMP25:%.*]] = bitcast float* [[TMP24]] to i8*
+// CHECK1-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP23]] to i32*
+// CHECK1-NEXT: [[TMP27:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
+// CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP26]], align 4
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK1-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK1-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
+// CHECK1-NEXT: store i32 [[TMP30]], i32* [[TMP27]], align 4
+// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr i32, i32* [[TMP26]], i64 1
+// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr i32, i32* [[TMP27]], i64 1
+// CHECK1-NEXT: [[TMP33:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK1-NEXT: store i8* [[TMP33]], i8** [[TMP22]], align 8
+// CHECK1-NEXT: [[TMP34:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK1-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK1-NEXT: [[TMP36:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK1-NEXT: [[TMP37:%.*]] = and i1 [[TMP35]], [[TMP36]]
+// CHECK1-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK1-NEXT: [[TMP39:%.*]] = and i16 [[TMP6]], 1
+// CHECK1-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP39]], 0
+// CHECK1-NEXT: [[TMP41:%.*]] = and i1 [[TMP38]], [[TMP40]]
+// CHECK1-NEXT: [[TMP42:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK1-NEXT: [[TMP43:%.*]] = and i1 [[TMP41]], [[TMP42]]
+// CHECK1-NEXT: [[TMP44:%.*]] = or i1 [[TMP34]], [[TMP37]]
+// CHECK1-NEXT: [[TMP45:%.*]] = or i1 [[TMP44]], [[TMP43]]
+// CHECK1-NEXT: br i1 [[TMP45]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK1: then:
-// CHECK1-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK1-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP48]], i8* [[TMP49]]) #[[ATTR3]]
+// CHECK1-NEXT: [[TMP46:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK1-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP46]], i8* [[TMP47]]) #[[ATTR4]]
// CHECK1-NEXT: br label [[IFCONT:%.*]]
// CHECK1: else:
// CHECK1-NEXT: br label [[IFCONT]]
// CHECK1: ifcont:
-// CHECK1-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK1-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]]
-// CHECK1-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK1: then5:
-// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP48:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK1-NEXT: [[TMP49:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK1-NEXT: [[TMP50:%.*]] = and i1 [[TMP48]], [[TMP49]]
+// CHECK1-NEXT: br i1 [[TMP50]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK1: then6:
+// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP52:%.*]] = load i8*, i8** [[TMP51]], align 8
+// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
// CHECK1-NEXT: [[TMP54:%.*]] = load i8*, i8** [[TMP53]], align 8
-// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP56:%.*]] = load i8*, i8** [[TMP55]], align 8
-// CHECK1-NEXT: [[TMP57:%.*]] = load i8, i8* [[TMP54]], align 1
-// CHECK1-NEXT: store i8 [[TMP57]], i8* [[TMP56]], align 1
-// CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP55:%.*]] = load i8, i8* [[TMP52]], align 1
+// CHECK1-NEXT: store i8 [[TMP55]], i8* [[TMP54]], align 1
+// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 8
+// CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
// CHECK1-NEXT: [[TMP59:%.*]] = load i8*, i8** [[TMP58]], align 8
-// CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP61:%.*]] = load i8*, i8** [[TMP60]], align 8
-// CHECK1-NEXT: [[TMP62:%.*]] = bitcast i8* [[TMP59]] to float*
-// CHECK1-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP61]] to float*
-// CHECK1-NEXT: [[TMP64:%.*]] = load float, float* [[TMP62]], align 4
-// CHECK1-NEXT: store float [[TMP64]], float* [[TMP63]], align 4
-// CHECK1-NEXT: br label [[IFCONT7:%.*]]
-// CHECK1: else6:
-// CHECK1-NEXT: br label [[IFCONT7]]
-// CHECK1: ifcont7:
+// CHECK1-NEXT: [[TMP60:%.*]] = bitcast i8* [[TMP57]] to float*
+// CHECK1-NEXT: [[TMP61:%.*]] = bitcast i8* [[TMP59]] to float*
+// CHECK1-NEXT: [[TMP62:%.*]] = load float, float* [[TMP60]], align 4
+// CHECK1-NEXT: store float [[TMP62]], float* [[TMP61]], align 4
+// CHECK1-NEXT: br label [[IFCONT8:%.*]]
+// CHECK1: else7:
+// CHECK1-NEXT: br label [[IFCONT8]]
+// CHECK1: ifcont8:
// CHECK1-NEXT: ret void
//
//
@@ -4703,71 +4703,71 @@ int bar(int n){
// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
+// CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK1-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK1-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK1: then:
-// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 8
-// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK1-NEXT: [[TMP11:%.*]] = bitcast i32 addrspace(3)* [[TMP10]] to i8 addrspace(3)*
-// CHECK1-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP9]], align 1
-// CHECK1-NEXT: store volatile i8 [[TMP12]], i8 addrspace(3)* [[TMP11]], align 1
+// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 8
+// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK1-NEXT: [[TMP8:%.*]] = bitcast i32 addrspace(3)* [[TMP7]] to i8 addrspace(3)*
+// CHECK1-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP6]], align 1
+// CHECK1-NEXT: store volatile i8 [[TMP9]], i8 addrspace(3)* [[TMP8]], align 1
// CHECK1-NEXT: br label [[IFCONT:%.*]]
// CHECK1: else:
// CHECK1-NEXT: br label [[IFCONT]]
// CHECK1: ifcont:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK1: then2:
-// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32 addrspace(3)* [[TMP14]] to i8 addrspace(3)*
-// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8
-// CHECK1-NEXT: [[TMP18:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP15]], align 1
-// CHECK1-NEXT: store i8 [[TMP18]], i8* [[TMP17]], align 1
-// CHECK1-NEXT: br label [[IFCONT4:%.*]]
-// CHECK1: else3:
-// CHECK1-NEXT: br label [[IFCONT4]]
-// CHECK1: ifcont4:
+// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK1: then4:
+// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK1-NEXT: [[TMP12:%.*]] = bitcast i32 addrspace(3)* [[TMP11]] to i8 addrspace(3)*
+// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP14:%.*]] = load i8*, i8** [[TMP13]], align 8
+// CHECK1-NEXT: [[TMP15:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP12]], align 1
+// CHECK1-NEXT: store i8 [[TMP15]], i8* [[TMP14]], align 1
+// CHECK1-NEXT: br label [[IFCONT6:%.*]]
+// CHECK1: else5:
+// CHECK1-NEXT: br label [[IFCONT6]]
+// CHECK1: ifcont6:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK1-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK1-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK1: then6:
-// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 8
-// CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i32*
-// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP21]], align 4
-// CHECK1-NEXT: store volatile i32 [[TMP23]], i32 addrspace(3)* [[TMP22]], align 4
-// CHECK1-NEXT: br label [[IFCONT8:%.*]]
-// CHECK1: else7:
-// CHECK1-NEXT: br label [[IFCONT8]]
-// CHECK1: ifcont8:
+// CHECK1-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK1-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK1: then8:
+// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8
+// CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i32*
+// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP18]], align 4
+// CHECK1-NEXT: store volatile i32 [[TMP20]], i32 addrspace(3)* [[TMP19]], align 4
+// CHECK1-NEXT: br label [[IFCONT10:%.*]]
+// CHECK1: else9:
+// CHECK1-NEXT: br label [[IFCONT10]]
+// CHECK1: ifcont10:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]]
-// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK1: then10:
-// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP27:%.*]] = load i8*, i8** [[TMP26]], align 8
-// CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8* [[TMP27]] to i32*
-// CHECK1-NEXT: [[TMP29:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP25]], align 4
-// CHECK1-NEXT: store i32 [[TMP29]], i32* [[TMP28]], align 4
-// CHECK1-NEXT: br label [[IFCONT12:%.*]]
-// CHECK1: else11:
-// CHECK1-NEXT: br label [[IFCONT12]]
-// CHECK1: ifcont12:
+// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK1-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP21]]
+// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK1: then12:
+// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP24:%.*]] = load i8*, i8** [[TMP23]], align 8
+// CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to i32*
+// CHECK1-NEXT: [[TMP26:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP22]], align 4
+// CHECK1-NEXT: store i32 [[TMP26]], i32* [[TMP25]], align 4
+// CHECK1-NEXT: br label [[IFCONT14:%.*]]
+// CHECK1: else13:
+// CHECK1-NEXT: br label [[IFCONT14]]
+// CHECK1: ifcont14:
// CHECK1-NEXT: ret void
//
//
@@ -4825,7 +4825,7 @@ int bar(int n){
// CHECK1-NEXT: store i8* [[TMP10]], i8** [[TMP8]], align 8
// CHECK1-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK1-NEXT: [[TMP12:%.*]] = load i8*, i8** [[DOTADDR2]], align 8
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP11]], i8* [[TMP12]]) #[[ATTR3]]
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP11]], i8* [[TMP12]]) #[[ATTR4]]
// CHECK1-NEXT: ret void
//
//
@@ -4883,7 +4883,7 @@ int bar(int n){
// CHECK1-NEXT: store i8* [[TMP10]], i8** [[TMP8]], align 8
// CHECK1-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK1-NEXT: [[TMP12:%.*]] = load i8*, i8** [[DOTADDR2]], align 8
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP12]], i8* [[TMP11]]) #[[ATTR3]]
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP12]], i8* [[TMP11]]) #[[ATTR4]]
// CHECK1-NEXT: ret void
//
//
@@ -4905,7 +4905,7 @@ int bar(int n){
// CHECK1-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
// CHECK1-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK1-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32* [[CONV]], i16* [[CONV1]]) #[[ATTR3]]
+// CHECK1-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32* [[CONV]], i16* [[CONV1]]) #[[ATTR4]]
// CHECK1-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 true)
// CHECK1-NEXT: ret void
// CHECK1: worker.exit:
@@ -5077,77 +5077,77 @@ int bar(int n){
// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i64 1
// CHECK1-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]], align 4
-// CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK1-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
-// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
-// CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
-// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP12]], i64 1
-// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i64 1
-// CHECK1-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP11]], align 8
-// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP23:%.*]] = load i8*, i8** [[TMP22]], align 8
-// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP23]] to i16*
-// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP25]], i64 1
-// CHECK1-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
-// CHECK1-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP25]], align 2
-// CHECK1-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
-// CHECK1-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK1-NEXT: [[TMP16:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP16]])
+// CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
+// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP12]], i64 1
+// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i64 1
+// CHECK1-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK1-NEXT: store i8* [[TMP20]], i8** [[TMP11]], align 8
+// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
+// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to i16*
+// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr i16, i16* [[TMP24]], i64 1
+// CHECK1-NEXT: [[TMP26:%.*]] = bitcast i16* [[TMP25]] to i8*
+// CHECK1-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP24]], align 2
+// CHECK1-NEXT: [[TMP28:%.*]] = sext i16 [[TMP27]] to i32
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK1-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK1-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
// CHECK1-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK1-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
-// CHECK1-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
-// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP25]], i64 1
-// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i64 1
-// CHECK1-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK1-NEXT: store i8* [[TMP36]], i8** [[TMP24]], align 8
-// CHECK1-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK1-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK1-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK1-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK1-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
-// CHECK1-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
-// CHECK1-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
-// CHECK1-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK1-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
-// CHECK1-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
-// CHECK1-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
-// CHECK1-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK1-NEXT: store i16 [[TMP31]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
+// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr i16, i16* [[TMP24]], i64 1
+// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i64 1
+// CHECK1-NEXT: [[TMP34:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK1-NEXT: store i8* [[TMP34]], i8** [[TMP23]], align 8
+// CHECK1-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK1-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK1-NEXT: [[TMP37:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK1-NEXT: [[TMP38:%.*]] = and i1 [[TMP36]], [[TMP37]]
+// CHECK1-NEXT: [[TMP39:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK1-NEXT: [[TMP40:%.*]] = and i16 [[TMP6]], 1
+// CHECK1-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP40]], 0
+// CHECK1-NEXT: [[TMP42:%.*]] = and i1 [[TMP39]], [[TMP41]]
+// CHECK1-NEXT: [[TMP43:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK1-NEXT: [[TMP44:%.*]] = and i1 [[TMP42]], [[TMP43]]
+// CHECK1-NEXT: [[TMP45:%.*]] = or i1 [[TMP35]], [[TMP38]]
+// CHECK1-NEXT: [[TMP46:%.*]] = or i1 [[TMP45]], [[TMP44]]
+// CHECK1-NEXT: br i1 [[TMP46]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK1: then:
-// CHECK1-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK1-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func11"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
+// CHECK1-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK1-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func11"(i8* [[TMP47]], i8* [[TMP48]]) #[[ATTR4]]
// CHECK1-NEXT: br label [[IFCONT:%.*]]
// CHECK1: else:
// CHECK1-NEXT: br label [[IFCONT]]
// CHECK1: ifcont:
-// CHECK1-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK1-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
-// CHECK1-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK1: then5:
-// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP49:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK1-NEXT: [[TMP50:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK1-NEXT: [[TMP51:%.*]] = and i1 [[TMP49]], [[TMP50]]
+// CHECK1-NEXT: br i1 [[TMP51]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK1: then6:
+// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP53:%.*]] = load i8*, i8** [[TMP52]], align 8
+// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
// CHECK1-NEXT: [[TMP55:%.*]] = load i8*, i8** [[TMP54]], align 8
-// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 8
-// CHECK1-NEXT: [[TMP58:%.*]] = bitcast i8* [[TMP55]] to i32*
-// CHECK1-NEXT: [[TMP59:%.*]] = bitcast i8* [[TMP57]] to i32*
-// CHECK1-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP58]], align 4
-// CHECK1-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4
-// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP56:%.*]] = bitcast i8* [[TMP53]] to i32*
+// CHECK1-NEXT: [[TMP57:%.*]] = bitcast i8* [[TMP55]] to i32*
+// CHECK1-NEXT: [[TMP58:%.*]] = load i32, i32* [[TMP56]], align 4
+// CHECK1-NEXT: store i32 [[TMP58]], i32* [[TMP57]], align 4
+// CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP60:%.*]] = load i8*, i8** [[TMP59]], align 8
+// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
// CHECK1-NEXT: [[TMP62:%.*]] = load i8*, i8** [[TMP61]], align 8
-// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP64:%.*]] = load i8*, i8** [[TMP63]], align 8
-// CHECK1-NEXT: [[TMP65:%.*]] = bitcast i8* [[TMP62]] to i16*
-// CHECK1-NEXT: [[TMP66:%.*]] = bitcast i8* [[TMP64]] to i16*
-// CHECK1-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP65]], align 2
-// CHECK1-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
-// CHECK1-NEXT: br label [[IFCONT7:%.*]]
-// CHECK1: else6:
-// CHECK1-NEXT: br label [[IFCONT7]]
-// CHECK1: ifcont7:
+// CHECK1-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP60]] to i16*
+// CHECK1-NEXT: [[TMP64:%.*]] = bitcast i8* [[TMP62]] to i16*
+// CHECK1-NEXT: [[TMP65:%.*]] = load i16, i16* [[TMP63]], align 2
+// CHECK1-NEXT: store i16 [[TMP65]], i16* [[TMP64]], align 2
+// CHECK1-NEXT: br label [[IFCONT8:%.*]]
+// CHECK1: else7:
+// CHECK1-NEXT: br label [[IFCONT8]]
+// CHECK1: ifcont8:
// CHECK1-NEXT: ret void
//
//
@@ -5159,73 +5159,73 @@ int bar(int n){
// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
// CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
+// CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]])
// CHECK1-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK1-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK1: then:
-// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 8
-// CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
-// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK1-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
+// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 8
+// CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i32*
+// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP7]], align 4
+// CHECK1-NEXT: store volatile i32 [[TMP9]], i32 addrspace(3)* [[TMP8]], align 4
// CHECK1-NEXT: br label [[IFCONT:%.*]]
// CHECK1: else:
// CHECK1-NEXT: br label [[IFCONT]]
// CHECK1: ifcont:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK1: then2:
-// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
-// CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
-// CHECK1-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
-// CHECK1-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
-// CHECK1-NEXT: br label [[IFCONT4:%.*]]
-// CHECK1: else3:
-// CHECK1-NEXT: br label [[IFCONT4]]
-// CHECK1: ifcont4:
+// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK1: then4:
+// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
+// CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
+// CHECK1-NEXT: [[TMP15:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP11]], align 4
+// CHECK1-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4
+// CHECK1-NEXT: br label [[IFCONT6:%.*]]
+// CHECK1: else5:
+// CHECK1-NEXT: br label [[IFCONT6]]
+// CHECK1: ifcont6:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK1-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK1-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK1: then6:
-// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 8
-// CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16*
-// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK1-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)*
-// CHECK1-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
-// CHECK1-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
-// CHECK1-NEXT: br label [[IFCONT8:%.*]]
-// CHECK1: else7:
-// CHECK1-NEXT: br label [[IFCONT8]]
-// CHECK1: ifcont8:
+// CHECK1-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK1-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK1: then8:
+// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8
+// CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i16*
+// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK1-NEXT: [[TMP20:%.*]] = bitcast i32 addrspace(3)* [[TMP19]] to i16 addrspace(3)*
+// CHECK1-NEXT: [[TMP21:%.*]] = load i16, i16* [[TMP18]], align 2
+// CHECK1-NEXT: store volatile i16 [[TMP21]], i16 addrspace(3)* [[TMP20]], align 2
+// CHECK1-NEXT: br label [[IFCONT10:%.*]]
+// CHECK1: else9:
+// CHECK1-NEXT: br label [[IFCONT10]]
+// CHECK1: ifcont10:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
-// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK1: then10:
-// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK1-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)*
-// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 8
-// CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16*
-// CHECK1-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
-// CHECK1-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
-// CHECK1-NEXT: br label [[IFCONT12:%.*]]
-// CHECK1: else11:
-// CHECK1-NEXT: br label [[IFCONT12]]
-// CHECK1: ifcont12:
+// CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK1-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP22]]
+// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK1: then12:
+// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK1-NEXT: [[TMP24:%.*]] = bitcast i32 addrspace(3)* [[TMP23]] to i16 addrspace(3)*
+// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP26:%.*]] = load i8*, i8** [[TMP25]], align 8
+// CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to i16*
+// CHECK1-NEXT: [[TMP28:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP24]], align 2
+// CHECK1-NEXT: store i16 [[TMP28]], i16* [[TMP27]], align 2
+// CHECK1-NEXT: br label [[IFCONT14:%.*]]
+// CHECK1: else13:
+// CHECK1-NEXT: br label [[IFCONT14]]
+// CHECK1: ifcont14:
// CHECK1-NEXT: ret void
//
//
@@ -5255,77 +5255,77 @@ int bar(int n){
// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i64 1
// CHECK1-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]], align 4
-// CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK1-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
-// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
-// CHECK1-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
-// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP12]], i64 1
-// CHECK1-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i64 1
-// CHECK1-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP11]], align 8
-// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP23:%.*]] = load i8*, i8** [[TMP22]], align 8
-// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP23]] to i16*
-// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP25]], i64 1
-// CHECK1-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
-// CHECK1-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP25]], align 2
-// CHECK1-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
-// CHECK1-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK1-NEXT: [[TMP16:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP16]])
+// CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
+// CHECK1-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP12]], i64 1
+// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i64 1
+// CHECK1-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK1-NEXT: store i8* [[TMP20]], i8** [[TMP11]], align 8
+// CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 8
+// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to i16*
+// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr i16, i16* [[TMP24]], i64 1
+// CHECK1-NEXT: [[TMP26:%.*]] = bitcast i16* [[TMP25]] to i8*
+// CHECK1-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP24]], align 2
+// CHECK1-NEXT: [[TMP28:%.*]] = sext i16 [[TMP27]] to i32
+// CHECK1-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK1-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK1-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
// CHECK1-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK1-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK1-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
-// CHECK1-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
-// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP25]], i64 1
-// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i64 1
-// CHECK1-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK1-NEXT: store i8* [[TMP36]], i8** [[TMP24]], align 8
-// CHECK1-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK1-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK1-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK1-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK1-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
-// CHECK1-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
-// CHECK1-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
-// CHECK1-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK1-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
-// CHECK1-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
-// CHECK1-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
-// CHECK1-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK1-NEXT: store i16 [[TMP31]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
+// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr i16, i16* [[TMP24]], i64 1
+// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i64 1
+// CHECK1-NEXT: [[TMP34:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK1-NEXT: store i8* [[TMP34]], i8** [[TMP23]], align 8
+// CHECK1-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK1-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK1-NEXT: [[TMP37:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK1-NEXT: [[TMP38:%.*]] = and i1 [[TMP36]], [[TMP37]]
+// CHECK1-NEXT: [[TMP39:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK1-NEXT: [[TMP40:%.*]] = and i16 [[TMP6]], 1
+// CHECK1-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP40]], 0
+// CHECK1-NEXT: [[TMP42:%.*]] = and i1 [[TMP39]], [[TMP41]]
+// CHECK1-NEXT: [[TMP43:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK1-NEXT: [[TMP44:%.*]] = and i1 [[TMP42]], [[TMP43]]
+// CHECK1-NEXT: [[TMP45:%.*]] = or i1 [[TMP35]], [[TMP38]]
+// CHECK1-NEXT: [[TMP46:%.*]] = or i1 [[TMP45]], [[TMP44]]
+// CHECK1-NEXT: br i1 [[TMP46]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK1: then:
-// CHECK1-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK1-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
+// CHECK1-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK1-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP47]], i8* [[TMP48]]) #[[ATTR4]]
// CHECK1-NEXT: br label [[IFCONT:%.*]]
// CHECK1: else:
// CHECK1-NEXT: br label [[IFCONT]]
// CHECK1: ifcont:
-// CHECK1-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK1-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK1-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
-// CHECK1-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK1: then5:
-// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP49:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK1-NEXT: [[TMP50:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK1-NEXT: [[TMP51:%.*]] = and i1 [[TMP49]], [[TMP50]]
+// CHECK1-NEXT: br i1 [[TMP51]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK1: then6:
+// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP53:%.*]] = load i8*, i8** [[TMP52]], align 8
+// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
// CHECK1-NEXT: [[TMP55:%.*]] = load i8*, i8** [[TMP54]], align 8
-// CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 8
-// CHECK1-NEXT: [[TMP58:%.*]] = bitcast i8* [[TMP55]] to i32*
-// CHECK1-NEXT: [[TMP59:%.*]] = bitcast i8* [[TMP57]] to i32*
-// CHECK1-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP58]], align 4
-// CHECK1-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4
-// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP56:%.*]] = bitcast i8* [[TMP53]] to i32*
+// CHECK1-NEXT: [[TMP57:%.*]] = bitcast i8* [[TMP55]] to i32*
+// CHECK1-NEXT: [[TMP58:%.*]] = load i32, i32* [[TMP56]], align 4
+// CHECK1-NEXT: store i32 [[TMP58]], i32* [[TMP57]], align 4
+// CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP60:%.*]] = load i8*, i8** [[TMP59]], align 8
+// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
// CHECK1-NEXT: [[TMP62:%.*]] = load i8*, i8** [[TMP61]], align 8
-// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP64:%.*]] = load i8*, i8** [[TMP63]], align 8
-// CHECK1-NEXT: [[TMP65:%.*]] = bitcast i8* [[TMP62]] to i16*
-// CHECK1-NEXT: [[TMP66:%.*]] = bitcast i8* [[TMP64]] to i16*
-// CHECK1-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP65]], align 2
-// CHECK1-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
-// CHECK1-NEXT: br label [[IFCONT7:%.*]]
-// CHECK1: else6:
-// CHECK1-NEXT: br label [[IFCONT7]]
-// CHECK1: ifcont7:
+// CHECK1-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP60]] to i16*
+// CHECK1-NEXT: [[TMP64:%.*]] = bitcast i8* [[TMP62]] to i16*
+// CHECK1-NEXT: [[TMP65:%.*]] = load i16, i16* [[TMP63]], align 2
+// CHECK1-NEXT: store i16 [[TMP65]], i16* [[TMP64]], align 2
+// CHECK1-NEXT: br label [[IFCONT8:%.*]]
+// CHECK1: else7:
+// CHECK1-NEXT: br label [[IFCONT8]]
+// CHECK1: ifcont8:
// CHECK1-NEXT: ret void
//
//
@@ -5337,73 +5337,73 @@ int bar(int n){
// CHECK1-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
// CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
// CHECK1-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK1-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 8
-// CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK1-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK1-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK1-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK1-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 8
+// CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
// CHECK1-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK1-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK1: then:
-// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 8
-// CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
-// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK1-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
+// CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 8
+// CHECK1-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i32*
+// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP7]], align 4
+// CHECK1-NEXT: store volatile i32 [[TMP9]], i32 addrspace(3)* [[TMP8]], align 4
// CHECK1-NEXT: br label [[IFCONT:%.*]]
// CHECK1: else:
// CHECK1-NEXT: br label [[IFCONT]]
// CHECK1: ifcont:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK1: then2:
-// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 0
-// CHECK1-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 8
-// CHECK1-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
-// CHECK1-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
-// CHECK1-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
-// CHECK1-NEXT: br label [[IFCONT4:%.*]]
-// CHECK1: else3:
-// CHECK1-NEXT: br label [[IFCONT4]]
-// CHECK1: ifcont4:
+// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK1-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK1: then4:
+// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 0
+// CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 8
+// CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
+// CHECK1-NEXT: [[TMP15:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP11]], align 4
+// CHECK1-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4
+// CHECK1-NEXT: br label [[IFCONT6:%.*]]
+// CHECK1: else5:
+// CHECK1-NEXT: br label [[IFCONT6]]
+// CHECK1: ifcont6:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK1-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK1-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK1: then6:
-// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 8
-// CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16*
-// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK1-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)*
-// CHECK1-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
-// CHECK1-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
-// CHECK1-NEXT: br label [[IFCONT8:%.*]]
-// CHECK1: else7:
-// CHECK1-NEXT: br label [[IFCONT8]]
-// CHECK1: ifcont8:
+// CHECK1-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK1-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK1: then8:
+// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 8
+// CHECK1-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i16*
+// CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK1-NEXT: [[TMP20:%.*]] = bitcast i32 addrspace(3)* [[TMP19]] to i16 addrspace(3)*
+// CHECK1-NEXT: [[TMP21:%.*]] = load i16, i16* [[TMP18]], align 2
+// CHECK1-NEXT: store volatile i16 [[TMP21]], i16 addrspace(3)* [[TMP20]], align 2
+// CHECK1-NEXT: br label [[IFCONT10:%.*]]
+// CHECK1: else9:
+// CHECK1-NEXT: br label [[IFCONT10]]
+// CHECK1: ifcont10:
// CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK1-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
-// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK1: then10:
-// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK1-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)*
-// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i64 0, i64 1
-// CHECK1-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 8
-// CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16*
-// CHECK1-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
-// CHECK1-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
-// CHECK1-NEXT: br label [[IFCONT12:%.*]]
-// CHECK1: else11:
-// CHECK1-NEXT: br label [[IFCONT12]]
-// CHECK1: ifcont12:
+// CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK1-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP22]]
+// CHECK1-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK1: then12:
+// CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK1-NEXT: [[TMP24:%.*]] = bitcast i32 addrspace(3)* [[TMP23]] to i16 addrspace(3)*
+// CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i64 0, i64 1
+// CHECK1-NEXT: [[TMP26:%.*]] = load i8*, i8** [[TMP25]], align 8
+// CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to i16*
+// CHECK1-NEXT: [[TMP28:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP24]], align 2
+// CHECK1-NEXT: store i16 [[TMP28]], i16* [[TMP27]], align 2
+// CHECK1-NEXT: br label [[IFCONT14:%.*]]
+// CHECK1: else13:
+// CHECK1-NEXT: br label [[IFCONT14]]
+// CHECK1: ifcont14:
// CHECK1-NEXT: ret void
//
//
@@ -5463,7 +5463,7 @@ int bar(int n){
// CHECK1-NEXT: store i8* [[TMP11]], i8** [[TMP9]], align 8
// CHECK1-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[DOTADDR2]], align 8
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP12]], i8* [[TMP13]]) #[[ATTR3]]
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP12]], i8* [[TMP13]]) #[[ATTR4]]
// CHECK1-NEXT: ret void
//
//
@@ -5523,7 +5523,7 @@ int bar(int n){
// CHECK1-NEXT: store i8* [[TMP11]], i8** [[TMP9]], align 8
// CHECK1-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK1-NEXT: [[TMP13:%.*]] = load i8*, i8** [[DOTADDR2]], align 8
-// CHECK1-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP13]], i8* [[TMP12]]) #[[ATTR3]]
+// CHECK1-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP13]], i8* [[TMP12]]) #[[ATTR4]]
// CHECK1-NEXT: ret void
//
//
@@ -5545,7 +5545,7 @@ int bar(int n){
// CHECK2-NEXT: store double [[TMP3]], double* [[E1]], align 8
// CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK2-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK2-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], double* [[E1]]) #[[ATTR3:[0-9]+]]
+// CHECK2-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], double* [[E1]]) #[[ATTR4:[0-9]+]]
// CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
// CHECK2-NEXT: ret void
// CHECK2: worker.exit:
@@ -5618,48 +5618,48 @@ int bar(int n){
// CHECK2-NEXT: [[TMP15:%.*]] = bitcast double* [[TMP12]] to i64*
// CHECK2-NEXT: [[TMP16:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK2-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 8
-// CHECK2-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK2-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16
-// CHECK2-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]])
-// CHECK2-NEXT: store i64 [[TMP20]], i64* [[TMP16]], align 8
-// CHECK2-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP15]], i32 1
-// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr i64, i64* [[TMP16]], i32 1
-// CHECK2-NEXT: [[TMP23:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP11]], align 4
-// CHECK2-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK2-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK2-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK2-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]]
-// CHECK2-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK2-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1
-// CHECK2-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0
-// CHECK2-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]]
-// CHECK2-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK2-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]]
-// CHECK2-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]]
-// CHECK2-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]]
-// CHECK2-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK2-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK2-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]])
+// CHECK2-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 8
+// CHECK2-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i32 1
+// CHECK2-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i32 1
+// CHECK2-NEXT: [[TMP22:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK2-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 4
+// CHECK2-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK2-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK2-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK2-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]]
+// CHECK2-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK2-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1
+// CHECK2-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0
+// CHECK2-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]]
+// CHECK2-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK2-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]]
+// CHECK2-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]]
+// CHECK2-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]]
+// CHECK2-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK2: then:
-// CHECK2-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8*
-// CHECK2-NEXT: [[TMP37:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP36]], i8* [[TMP37]]) #[[ATTR3]]
+// CHECK2-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8*
+// CHECK2-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR4]]
// CHECK2-NEXT: br label [[IFCONT:%.*]]
// CHECK2: else:
// CHECK2-NEXT: br label [[IFCONT]]
// CHECK2: ifcont:
-// CHECK2-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK2-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK2-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK2-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK2-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK2-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK2-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
+// CHECK2-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
// CHECK2: then4:
-// CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 4
-// CHECK2-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP44:%.*]] = load i8*, i8** [[TMP43]], align 4
-// CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to double*
-// CHECK2-NEXT: [[TMP46:%.*]] = bitcast i8* [[TMP44]] to double*
-// CHECK2-NEXT: [[TMP47:%.*]] = load double, double* [[TMP45]], align 8
-// CHECK2-NEXT: store double [[TMP47]], double* [[TMP46]], align 8
+// CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 4
+// CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 4
+// CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to double*
+// CHECK2-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to double*
+// CHECK2-NEXT: [[TMP46:%.*]] = load double, double* [[TMP44]], align 8
+// CHECK2-NEXT: store double [[TMP46]], double* [[TMP45]], align 8
// CHECK2-NEXT: br label [[IFCONT6:%.*]]
// CHECK2: else5:
// CHECK2-NEXT: br label [[IFCONT6]]
@@ -5676,53 +5676,53 @@ int bar(int n){
// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK2-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4
-// CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [1 x i8*]*
+// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 4
+// CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
// CHECK2-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4
// CHECK2-NEXT: br label [[PRECOND:%.*]]
// CHECK2: precond:
-// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4
-// CHECK2-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2
-// CHECK2-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]]
+// CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4
+// CHECK2-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2
+// CHECK2-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]]
// CHECK2: body:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]])
// CHECK2-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK2-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK2: then:
-// CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP10]], align 4
-// CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*
-// CHECK2-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 [[TMP8]]
-// CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]], align 4
-// CHECK2-NEXT: store volatile i32 [[TMP15]], i32 addrspace(3)* [[TMP14]], align 4
+// CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 4
+// CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32*
+// CHECK2-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]]
+// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
+// CHECK2-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
// CHECK2-NEXT: br label [[IFCONT:%.*]]
// CHECK2: else:
// CHECK2-NEXT: br label [[IFCONT]]
// CHECK2: ifcont:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]]
-// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK2: then2:
-// CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 4
-// CHECK2-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
-// CHECK2-NEXT: [[TMP21:%.*]] = getelementptr i32, i32* [[TMP20]], i32 [[TMP8]]
-// CHECK2-NEXT: [[TMP22:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP17]], align 4
-// CHECK2-NEXT: store i32 [[TMP22]], i32* [[TMP21]], align 4
-// CHECK2-NEXT: br label [[IFCONT4:%.*]]
-// CHECK2: else3:
-// CHECK2-NEXT: br label [[IFCONT4]]
-// CHECK2: ifcont4:
-// CHECK2-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1
-// CHECK2-NEXT: store i32 [[TMP23]], i32* [[DOTCNT_ADDR]], align 4
+// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
+// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK2: then4:
+// CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4
+// CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
+// CHECK2-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]]
+// CHECK2-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
+// CHECK2-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4
+// CHECK2-NEXT: br label [[IFCONT6:%.*]]
+// CHECK2: else5:
+// CHECK2-NEXT: br label [[IFCONT6]]
+// CHECK2: ifcont6:
+// CHECK2-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
+// CHECK2-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4
// CHECK2-NEXT: br label [[PRECOND]]
// CHECK2: exit:
// CHECK2-NEXT: ret void
@@ -5772,7 +5772,7 @@ int bar(int n){
// CHECK2-NEXT: store i8* [[TMP8]], i8** [[TMP6]], align 4
// CHECK2-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP9]], i8* [[TMP10]]) #[[ATTR3]]
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP9]], i8* [[TMP10]]) #[[ATTR4]]
// CHECK2-NEXT: ret void
//
//
@@ -5820,7 +5820,7 @@ int bar(int n){
// CHECK2-NEXT: store i8* [[TMP8]], i8** [[TMP6]], align 4
// CHECK2-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP10]], i8* [[TMP9]]) #[[ATTR3]]
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP10]], i8* [[TMP9]]) #[[ATTR4]]
// CHECK2-NEXT: ret void
//
//
@@ -5849,7 +5849,7 @@ int bar(int n){
// CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK2-NEXT: store i32 [[TMP3]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK2-NEXT: call void @__omp_outlined__1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i8* [[C2]], float* [[D_ON_STACK]]) #[[ATTR3]]
+// CHECK2-NEXT: call void @__omp_outlined__1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i8* [[C2]], float* [[D_ON_STACK]]) #[[ATTR4]]
// CHECK2-NEXT: call void @__kmpc_free_shared(i8* [[D3]], i32 4)
// CHECK2-NEXT: call void @__kmpc_free_shared(i8* [[C2]], i32 1)
// CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
@@ -5942,75 +5942,75 @@ int bar(int n){
// CHECK2-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1
// CHECK2-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP10]], align 1
// CHECK2-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32
-// CHECK2-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK2-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16
-// CHECK2-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]])
-// CHECK2-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8
-// CHECK2-NEXT: store i8 [[TMP18]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1
-// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1
-// CHECK2-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK2-NEXT: [[TMP15:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP15]])
+// CHECK2-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i8
+// CHECK2-NEXT: store i8 [[TMP17]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1
+// CHECK2-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1
+// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
// CHECK2-NEXT: store i8* [[DOTOMP_REDUCTION_ELEMENT]], i8** [[TMP11]], align 4
-// CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 4
-// CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to float*
-// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr float, float* [[TMP24]], i32 1
-// CHECK2-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP25]] to i8*
-// CHECK2-NEXT: [[TMP27:%.*]] = bitcast float* [[TMP24]] to i32*
-// CHECK2-NEXT: [[TMP28:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
-// CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK2-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK2-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK2-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK2-NEXT: store i32 [[TMP32]], i32* [[TMP28]], align 4
-// CHECK2-NEXT: [[TMP33:%.*]] = getelementptr i32, i32* [[TMP27]], i32 1
-// CHECK2-NEXT: [[TMP34:%.*]] = getelementptr i32, i32* [[TMP28]], i32 1
-// CHECK2-NEXT: [[TMP35:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK2-NEXT: store i8* [[TMP35]], i8** [[TMP23]], align 4
-// CHECK2-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK2-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK2-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK2-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
-// CHECK2-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK2-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1
-// CHECK2-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0
-// CHECK2-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]]
-// CHECK2-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK2-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]]
-// CHECK2-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]]
-// CHECK2-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]]
-// CHECK2-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 4
+// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP21]] to float*
+// CHECK2-NEXT: [[TMP24:%.*]] = getelementptr float, float* [[TMP23]], i32 1
+// CHECK2-NEXT: [[TMP25:%.*]] = bitcast float* [[TMP24]] to i8*
+// CHECK2-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP23]] to i32*
+// CHECK2-NEXT: [[TMP27:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
+// CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP26]], align 4
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK2-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK2-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
+// CHECK2-NEXT: store i32 [[TMP30]], i32* [[TMP27]], align 4
+// CHECK2-NEXT: [[TMP31:%.*]] = getelementptr i32, i32* [[TMP26]], i32 1
+// CHECK2-NEXT: [[TMP32:%.*]] = getelementptr i32, i32* [[TMP27]], i32 1
+// CHECK2-NEXT: [[TMP33:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK2-NEXT: store i8* [[TMP33]], i8** [[TMP22]], align 4
+// CHECK2-NEXT: [[TMP34:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK2-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK2-NEXT: [[TMP36:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK2-NEXT: [[TMP37:%.*]] = and i1 [[TMP35]], [[TMP36]]
+// CHECK2-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK2-NEXT: [[TMP39:%.*]] = and i16 [[TMP6]], 1
+// CHECK2-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP39]], 0
+// CHECK2-NEXT: [[TMP41:%.*]] = and i1 [[TMP38]], [[TMP40]]
+// CHECK2-NEXT: [[TMP42:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK2-NEXT: [[TMP43:%.*]] = and i1 [[TMP41]], [[TMP42]]
+// CHECK2-NEXT: [[TMP44:%.*]] = or i1 [[TMP34]], [[TMP37]]
+// CHECK2-NEXT: [[TMP45:%.*]] = or i1 [[TMP44]], [[TMP43]]
+// CHECK2-NEXT: br i1 [[TMP45]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK2: then:
-// CHECK2-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK2-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP48]], i8* [[TMP49]]) #[[ATTR3]]
+// CHECK2-NEXT: [[TMP46:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK2-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP46]], i8* [[TMP47]]) #[[ATTR4]]
// CHECK2-NEXT: br label [[IFCONT:%.*]]
// CHECK2: else:
// CHECK2-NEXT: br label [[IFCONT]]
// CHECK2: ifcont:
-// CHECK2-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK2-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK2-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]]
-// CHECK2-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK2: then5:
-// CHECK2-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP48:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK2-NEXT: [[TMP49:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK2-NEXT: [[TMP50:%.*]] = and i1 [[TMP48]], [[TMP49]]
+// CHECK2-NEXT: br i1 [[TMP50]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK2: then6:
+// CHECK2-NEXT: [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP52:%.*]] = load i8*, i8** [[TMP51]], align 4
+// CHECK2-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
// CHECK2-NEXT: [[TMP54:%.*]] = load i8*, i8** [[TMP53]], align 4
-// CHECK2-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP56:%.*]] = load i8*, i8** [[TMP55]], align 4
-// CHECK2-NEXT: [[TMP57:%.*]] = load i8, i8* [[TMP54]], align 1
-// CHECK2-NEXT: store i8 [[TMP57]], i8* [[TMP56]], align 1
-// CHECK2-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP55:%.*]] = load i8, i8* [[TMP52]], align 1
+// CHECK2-NEXT: store i8 [[TMP55]], i8* [[TMP54]], align 1
+// CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 4
+// CHECK2-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
// CHECK2-NEXT: [[TMP59:%.*]] = load i8*, i8** [[TMP58]], align 4
-// CHECK2-NEXT: [[TMP60:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP61:%.*]] = load i8*, i8** [[TMP60]], align 4
-// CHECK2-NEXT: [[TMP62:%.*]] = bitcast i8* [[TMP59]] to float*
-// CHECK2-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP61]] to float*
-// CHECK2-NEXT: [[TMP64:%.*]] = load float, float* [[TMP62]], align 4
-// CHECK2-NEXT: store float [[TMP64]], float* [[TMP63]], align 4
-// CHECK2-NEXT: br label [[IFCONT7:%.*]]
-// CHECK2: else6:
-// CHECK2-NEXT: br label [[IFCONT7]]
-// CHECK2: ifcont7:
+// CHECK2-NEXT: [[TMP60:%.*]] = bitcast i8* [[TMP57]] to float*
+// CHECK2-NEXT: [[TMP61:%.*]] = bitcast i8* [[TMP59]] to float*
+// CHECK2-NEXT: [[TMP62:%.*]] = load float, float* [[TMP60]], align 4
+// CHECK2-NEXT: store float [[TMP62]], float* [[TMP61]], align 4
+// CHECK2-NEXT: br label [[IFCONT8:%.*]]
+// CHECK2: else7:
+// CHECK2-NEXT: br label [[IFCONT8]]
+// CHECK2: ifcont8:
// CHECK2-NEXT: ret void
//
//
@@ -6022,71 +6022,71 @@ int bar(int n){
// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK2-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4
-// CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 4
+// CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK2-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK2-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK2: then:
-// CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4
-// CHECK2-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK2-NEXT: [[TMP11:%.*]] = bitcast i32 addrspace(3)* [[TMP10]] to i8 addrspace(3)*
-// CHECK2-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP9]], align 1
-// CHECK2-NEXT: store volatile i8 [[TMP12]], i8 addrspace(3)* [[TMP11]], align 1
+// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 4
+// CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK2-NEXT: [[TMP8:%.*]] = bitcast i32 addrspace(3)* [[TMP7]] to i8 addrspace(3)*
+// CHECK2-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP6]], align 1
+// CHECK2-NEXT: store volatile i8 [[TMP9]], i8 addrspace(3)* [[TMP8]], align 1
// CHECK2-NEXT: br label [[IFCONT:%.*]]
// CHECK2: else:
// CHECK2-NEXT: br label [[IFCONT]]
// CHECK2: ifcont:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK2: then2:
-// CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK2-NEXT: [[TMP15:%.*]] = bitcast i32 addrspace(3)* [[TMP14]] to i8 addrspace(3)*
-// CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4
-// CHECK2-NEXT: [[TMP18:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP15]], align 1
-// CHECK2-NEXT: store i8 [[TMP18]], i8* [[TMP17]], align 1
-// CHECK2-NEXT: br label [[IFCONT4:%.*]]
-// CHECK2: else3:
-// CHECK2-NEXT: br label [[IFCONT4]]
-// CHECK2: ifcont4:
+// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK2: then4:
+// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK2-NEXT: [[TMP12:%.*]] = bitcast i32 addrspace(3)* [[TMP11]] to i8 addrspace(3)*
+// CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP14:%.*]] = load i8*, i8** [[TMP13]], align 4
+// CHECK2-NEXT: [[TMP15:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP12]], align 1
+// CHECK2-NEXT: store i8 [[TMP15]], i8* [[TMP14]], align 1
+// CHECK2-NEXT: br label [[IFCONT6:%.*]]
+// CHECK2: else5:
+// CHECK2-NEXT: br label [[IFCONT6]]
+// CHECK2: ifcont6:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK2-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK2-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK2: then6:
-// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4
-// CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i32*
-// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP21]], align 4
-// CHECK2-NEXT: store volatile i32 [[TMP23]], i32 addrspace(3)* [[TMP22]], align 4
-// CHECK2-NEXT: br label [[IFCONT8:%.*]]
-// CHECK2: else7:
-// CHECK2-NEXT: br label [[IFCONT8]]
-// CHECK2: ifcont8:
+// CHECK2-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK2-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK2: then8:
+// CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4
+// CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i32*
+// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP18]], align 4
+// CHECK2-NEXT: store volatile i32 [[TMP20]], i32 addrspace(3)* [[TMP19]], align 4
+// CHECK2-NEXT: br label [[IFCONT10:%.*]]
+// CHECK2: else9:
+// CHECK2-NEXT: br label [[IFCONT10]]
+// CHECK2: ifcont10:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]]
-// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK2: then10:
-// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP27:%.*]] = load i8*, i8** [[TMP26]], align 4
-// CHECK2-NEXT: [[TMP28:%.*]] = bitcast i8* [[TMP27]] to i32*
-// CHECK2-NEXT: [[TMP29:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP25]], align 4
-// CHECK2-NEXT: store i32 [[TMP29]], i32* [[TMP28]], align 4
-// CHECK2-NEXT: br label [[IFCONT12:%.*]]
-// CHECK2: else11:
-// CHECK2-NEXT: br label [[IFCONT12]]
-// CHECK2: ifcont12:
+// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK2-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP21]]
+// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK2: then12:
+// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP24:%.*]] = load i8*, i8** [[TMP23]], align 4
+// CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to i32*
+// CHECK2-NEXT: [[TMP26:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP22]], align 4
+// CHECK2-NEXT: store i32 [[TMP26]], i32* [[TMP25]], align 4
+// CHECK2-NEXT: br label [[IFCONT14:%.*]]
+// CHECK2: else13:
+// CHECK2-NEXT: br label [[IFCONT14]]
+// CHECK2: ifcont14:
// CHECK2-NEXT: ret void
//
//
@@ -6144,7 +6144,7 @@ int bar(int n){
// CHECK2-NEXT: store i8* [[TMP10]], i8** [[TMP8]], align 4
// CHECK2-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK2-NEXT: [[TMP12:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP11]], i8* [[TMP12]]) #[[ATTR3]]
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP11]], i8* [[TMP12]]) #[[ATTR4]]
// CHECK2-NEXT: ret void
//
//
@@ -6202,7 +6202,7 @@ int bar(int n){
// CHECK2-NEXT: store i8* [[TMP10]], i8** [[TMP8]], align 4
// CHECK2-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK2-NEXT: [[TMP12:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP12]], i8* [[TMP11]]) #[[ATTR3]]
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP12]], i8* [[TMP11]]) #[[ATTR4]]
// CHECK2-NEXT: ret void
//
//
@@ -6223,7 +6223,7 @@ int bar(int n){
// CHECK2-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
// CHECK2-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK2-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32* [[A_ADDR]], i16* [[CONV]]) #[[ATTR3]]
+// CHECK2-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32* [[A_ADDR]], i16* [[CONV]]) #[[ATTR4]]
// CHECK2-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 true)
// CHECK2-NEXT: ret void
// CHECK2: worker.exit:
@@ -6395,77 +6395,77 @@ int bar(int n){
// CHECK2-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
// CHECK2-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]], align 4
-// CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK2-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
-// CHECK2-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
-// CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
-// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
-// CHECK2-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
-// CHECK2-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP11]], align 4
-// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP23:%.*]] = load i8*, i8** [[TMP22]], align 4
-// CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP23]] to i16*
-// CHECK2-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP25]], i32 1
-// CHECK2-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
-// CHECK2-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP25]], align 2
-// CHECK2-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
-// CHECK2-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK2-NEXT: [[TMP16:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK2-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP16]])
+// CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
+// CHECK2-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
+// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
+// CHECK2-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK2-NEXT: store i8* [[TMP20]], i8** [[TMP11]], align 4
+// CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 4
+// CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to i16*
+// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
+// CHECK2-NEXT: [[TMP26:%.*]] = bitcast i16* [[TMP25]] to i8*
+// CHECK2-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP24]], align 2
+// CHECK2-NEXT: [[TMP28:%.*]] = sext i16 [[TMP27]] to i32
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK2-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK2-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
// CHECK2-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK2-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK2-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
-// CHECK2-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
-// CHECK2-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP25]], i32 1
-// CHECK2-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
-// CHECK2-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK2-NEXT: store i8* [[TMP36]], i8** [[TMP24]], align 4
-// CHECK2-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK2-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK2-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK2-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK2-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK2-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
-// CHECK2-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
-// CHECK2-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
-// CHECK2-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK2-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
-// CHECK2-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
-// CHECK2-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
-// CHECK2-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK2-NEXT: store i16 [[TMP31]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
+// CHECK2-NEXT: [[TMP32:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
+// CHECK2-NEXT: [[TMP33:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
+// CHECK2-NEXT: [[TMP34:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK2-NEXT: store i8* [[TMP34]], i8** [[TMP23]], align 4
+// CHECK2-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK2-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK2-NEXT: [[TMP37:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK2-NEXT: [[TMP38:%.*]] = and i1 [[TMP36]], [[TMP37]]
+// CHECK2-NEXT: [[TMP39:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK2-NEXT: [[TMP40:%.*]] = and i16 [[TMP6]], 1
+// CHECK2-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP40]], 0
+// CHECK2-NEXT: [[TMP42:%.*]] = and i1 [[TMP39]], [[TMP41]]
+// CHECK2-NEXT: [[TMP43:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK2-NEXT: [[TMP44:%.*]] = and i1 [[TMP42]], [[TMP43]]
+// CHECK2-NEXT: [[TMP45:%.*]] = or i1 [[TMP35]], [[TMP38]]
+// CHECK2-NEXT: [[TMP46:%.*]] = or i1 [[TMP45]], [[TMP44]]
+// CHECK2-NEXT: br i1 [[TMP46]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK2: then:
-// CHECK2-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK2-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func11"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
+// CHECK2-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK2-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func11"(i8* [[TMP47]], i8* [[TMP48]]) #[[ATTR4]]
// CHECK2-NEXT: br label [[IFCONT:%.*]]
// CHECK2: else:
// CHECK2-NEXT: br label [[IFCONT]]
// CHECK2: ifcont:
-// CHECK2-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK2-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK2-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
-// CHECK2-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK2: then5:
-// CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP49:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK2-NEXT: [[TMP50:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK2-NEXT: [[TMP51:%.*]] = and i1 [[TMP49]], [[TMP50]]
+// CHECK2-NEXT: br i1 [[TMP51]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK2: then6:
+// CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP53:%.*]] = load i8*, i8** [[TMP52]], align 4
+// CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
// CHECK2-NEXT: [[TMP55:%.*]] = load i8*, i8** [[TMP54]], align 4
-// CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 4
-// CHECK2-NEXT: [[TMP58:%.*]] = bitcast i8* [[TMP55]] to i32*
-// CHECK2-NEXT: [[TMP59:%.*]] = bitcast i8* [[TMP57]] to i32*
-// CHECK2-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP58]], align 4
-// CHECK2-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4
-// CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP56:%.*]] = bitcast i8* [[TMP53]] to i32*
+// CHECK2-NEXT: [[TMP57:%.*]] = bitcast i8* [[TMP55]] to i32*
+// CHECK2-NEXT: [[TMP58:%.*]] = load i32, i32* [[TMP56]], align 4
+// CHECK2-NEXT: store i32 [[TMP58]], i32* [[TMP57]], align 4
+// CHECK2-NEXT: [[TMP59:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP60:%.*]] = load i8*, i8** [[TMP59]], align 4
+// CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
// CHECK2-NEXT: [[TMP62:%.*]] = load i8*, i8** [[TMP61]], align 4
-// CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP64:%.*]] = load i8*, i8** [[TMP63]], align 4
-// CHECK2-NEXT: [[TMP65:%.*]] = bitcast i8* [[TMP62]] to i16*
-// CHECK2-NEXT: [[TMP66:%.*]] = bitcast i8* [[TMP64]] to i16*
-// CHECK2-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP65]], align 2
-// CHECK2-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
-// CHECK2-NEXT: br label [[IFCONT7:%.*]]
-// CHECK2: else6:
-// CHECK2-NEXT: br label [[IFCONT7]]
-// CHECK2: ifcont7:
+// CHECK2-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP60]] to i16*
+// CHECK2-NEXT: [[TMP64:%.*]] = bitcast i8* [[TMP62]] to i16*
+// CHECK2-NEXT: [[TMP65:%.*]] = load i16, i16* [[TMP63]], align 2
+// CHECK2-NEXT: store i16 [[TMP65]], i16* [[TMP64]], align 2
+// CHECK2-NEXT: br label [[IFCONT8:%.*]]
+// CHECK2: else7:
+// CHECK2-NEXT: br label [[IFCONT8]]
+// CHECK2: ifcont8:
// CHECK2-NEXT: ret void
//
//
@@ -6477,73 +6477,73 @@ int bar(int n){
// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
// CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK2-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4
-// CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 4
+// CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]])
// CHECK2-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK2-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK2: then:
-// CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4
-// CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
-// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK2-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
+// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 4
+// CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i32*
+// CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP7]], align 4
+// CHECK2-NEXT: store volatile i32 [[TMP9]], i32 addrspace(3)* [[TMP8]], align 4
// CHECK2-NEXT: br label [[IFCONT:%.*]]
// CHECK2: else:
// CHECK2-NEXT: br label [[IFCONT]]
// CHECK2: ifcont:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK2: then2:
-// CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4
-// CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
-// CHECK2-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
-// CHECK2-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
-// CHECK2-NEXT: br label [[IFCONT4:%.*]]
-// CHECK2: else3:
-// CHECK2-NEXT: br label [[IFCONT4]]
-// CHECK2: ifcont4:
+// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK2: then4:
+// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 4
+// CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
+// CHECK2-NEXT: [[TMP15:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP11]], align 4
+// CHECK2-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4
+// CHECK2-NEXT: br label [[IFCONT6:%.*]]
+// CHECK2: else5:
+// CHECK2-NEXT: br label [[IFCONT6]]
+// CHECK2: ifcont6:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK2-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK2-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK2: then6:
-// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4
-// CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16*
-// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK2-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)*
-// CHECK2-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
-// CHECK2-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
-// CHECK2-NEXT: br label [[IFCONT8:%.*]]
-// CHECK2: else7:
-// CHECK2-NEXT: br label [[IFCONT8]]
-// CHECK2: ifcont8:
+// CHECK2-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK2-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK2: then8:
+// CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4
+// CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i16*
+// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK2-NEXT: [[TMP20:%.*]] = bitcast i32 addrspace(3)* [[TMP19]] to i16 addrspace(3)*
+// CHECK2-NEXT: [[TMP21:%.*]] = load i16, i16* [[TMP18]], align 2
+// CHECK2-NEXT: store volatile i16 [[TMP21]], i16 addrspace(3)* [[TMP20]], align 2
+// CHECK2-NEXT: br label [[IFCONT10:%.*]]
+// CHECK2: else9:
+// CHECK2-NEXT: br label [[IFCONT10]]
+// CHECK2: ifcont10:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
-// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK2: then10:
-// CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK2-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)*
-// CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 4
-// CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16*
-// CHECK2-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
-// CHECK2-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
-// CHECK2-NEXT: br label [[IFCONT12:%.*]]
-// CHECK2: else11:
-// CHECK2-NEXT: br label [[IFCONT12]]
-// CHECK2: ifcont12:
+// CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK2-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP22]]
+// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK2: then12:
+// CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK2-NEXT: [[TMP24:%.*]] = bitcast i32 addrspace(3)* [[TMP23]] to i16 addrspace(3)*
+// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP26:%.*]] = load i8*, i8** [[TMP25]], align 4
+// CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to i16*
+// CHECK2-NEXT: [[TMP28:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP24]], align 2
+// CHECK2-NEXT: store i16 [[TMP28]], i16* [[TMP27]], align 2
+// CHECK2-NEXT: br label [[IFCONT14:%.*]]
+// CHECK2: else13:
+// CHECK2-NEXT: br label [[IFCONT14]]
+// CHECK2: ifcont14:
// CHECK2-NEXT: ret void
//
//
@@ -6573,77 +6573,77 @@ int bar(int n){
// CHECK2-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
// CHECK2-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]], align 4
-// CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK2-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
-// CHECK2-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
-// CHECK2-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
-// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
-// CHECK2-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
-// CHECK2-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP11]], align 4
-// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP23:%.*]] = load i8*, i8** [[TMP22]], align 4
-// CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP23]] to i16*
-// CHECK2-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP25]], i32 1
-// CHECK2-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
-// CHECK2-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP25]], align 2
-// CHECK2-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
-// CHECK2-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK2-NEXT: [[TMP16:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK2-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP16]])
+// CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
+// CHECK2-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
+// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
+// CHECK2-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK2-NEXT: store i8* [[TMP20]], i8** [[TMP11]], align 4
+// CHECK2-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 4
+// CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to i16*
+// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
+// CHECK2-NEXT: [[TMP26:%.*]] = bitcast i16* [[TMP25]] to i8*
+// CHECK2-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP24]], align 2
+// CHECK2-NEXT: [[TMP28:%.*]] = sext i16 [[TMP27]] to i32
+// CHECK2-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK2-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK2-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
// CHECK2-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK2-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK2-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
-// CHECK2-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
-// CHECK2-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP25]], i32 1
-// CHECK2-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
-// CHECK2-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK2-NEXT: store i8* [[TMP36]], i8** [[TMP24]], align 4
-// CHECK2-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK2-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK2-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK2-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK2-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK2-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
-// CHECK2-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
-// CHECK2-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
-// CHECK2-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK2-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
-// CHECK2-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
-// CHECK2-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
-// CHECK2-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK2-NEXT: store i16 [[TMP31]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
+// CHECK2-NEXT: [[TMP32:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
+// CHECK2-NEXT: [[TMP33:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
+// CHECK2-NEXT: [[TMP34:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK2-NEXT: store i8* [[TMP34]], i8** [[TMP23]], align 4
+// CHECK2-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK2-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK2-NEXT: [[TMP37:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK2-NEXT: [[TMP38:%.*]] = and i1 [[TMP36]], [[TMP37]]
+// CHECK2-NEXT: [[TMP39:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK2-NEXT: [[TMP40:%.*]] = and i16 [[TMP6]], 1
+// CHECK2-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP40]], 0
+// CHECK2-NEXT: [[TMP42:%.*]] = and i1 [[TMP39]], [[TMP41]]
+// CHECK2-NEXT: [[TMP43:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK2-NEXT: [[TMP44:%.*]] = and i1 [[TMP42]], [[TMP43]]
+// CHECK2-NEXT: [[TMP45:%.*]] = or i1 [[TMP35]], [[TMP38]]
+// CHECK2-NEXT: [[TMP46:%.*]] = or i1 [[TMP45]], [[TMP44]]
+// CHECK2-NEXT: br i1 [[TMP46]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK2: then:
-// CHECK2-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK2-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
+// CHECK2-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK2-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP47]], i8* [[TMP48]]) #[[ATTR4]]
// CHECK2-NEXT: br label [[IFCONT:%.*]]
// CHECK2: else:
// CHECK2-NEXT: br label [[IFCONT]]
// CHECK2: ifcont:
-// CHECK2-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK2-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK2-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
-// CHECK2-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK2: then5:
-// CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP49:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK2-NEXT: [[TMP50:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK2-NEXT: [[TMP51:%.*]] = and i1 [[TMP49]], [[TMP50]]
+// CHECK2-NEXT: br i1 [[TMP51]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK2: then6:
+// CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP53:%.*]] = load i8*, i8** [[TMP52]], align 4
+// CHECK2-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
// CHECK2-NEXT: [[TMP55:%.*]] = load i8*, i8** [[TMP54]], align 4
-// CHECK2-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 4
-// CHECK2-NEXT: [[TMP58:%.*]] = bitcast i8* [[TMP55]] to i32*
-// CHECK2-NEXT: [[TMP59:%.*]] = bitcast i8* [[TMP57]] to i32*
-// CHECK2-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP58]], align 4
-// CHECK2-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4
-// CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP56:%.*]] = bitcast i8* [[TMP53]] to i32*
+// CHECK2-NEXT: [[TMP57:%.*]] = bitcast i8* [[TMP55]] to i32*
+// CHECK2-NEXT: [[TMP58:%.*]] = load i32, i32* [[TMP56]], align 4
+// CHECK2-NEXT: store i32 [[TMP58]], i32* [[TMP57]], align 4
+// CHECK2-NEXT: [[TMP59:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP60:%.*]] = load i8*, i8** [[TMP59]], align 4
+// CHECK2-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
// CHECK2-NEXT: [[TMP62:%.*]] = load i8*, i8** [[TMP61]], align 4
-// CHECK2-NEXT: [[TMP63:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP64:%.*]] = load i8*, i8** [[TMP63]], align 4
-// CHECK2-NEXT: [[TMP65:%.*]] = bitcast i8* [[TMP62]] to i16*
-// CHECK2-NEXT: [[TMP66:%.*]] = bitcast i8* [[TMP64]] to i16*
-// CHECK2-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP65]], align 2
-// CHECK2-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
-// CHECK2-NEXT: br label [[IFCONT7:%.*]]
-// CHECK2: else6:
-// CHECK2-NEXT: br label [[IFCONT7]]
-// CHECK2: ifcont7:
+// CHECK2-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP60]] to i16*
+// CHECK2-NEXT: [[TMP64:%.*]] = bitcast i8* [[TMP62]] to i16*
+// CHECK2-NEXT: [[TMP65:%.*]] = load i16, i16* [[TMP63]], align 2
+// CHECK2-NEXT: store i16 [[TMP65]], i16* [[TMP64]], align 2
+// CHECK2-NEXT: br label [[IFCONT8:%.*]]
+// CHECK2: else7:
+// CHECK2-NEXT: br label [[IFCONT8]]
+// CHECK2: ifcont8:
// CHECK2-NEXT: ret void
//
//
@@ -6655,73 +6655,73 @@ int bar(int n){
// CHECK2-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
// CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
// CHECK2-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK2-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK2-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4
-// CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK2-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK2-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK2-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK2-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 4
+// CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
// CHECK2-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK2-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK2: then:
-// CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4
-// CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
-// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK2-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
+// CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 4
+// CHECK2-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i32*
+// CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP7]], align 4
+// CHECK2-NEXT: store volatile i32 [[TMP9]], i32 addrspace(3)* [[TMP8]], align 4
// CHECK2-NEXT: br label [[IFCONT:%.*]]
// CHECK2: else:
// CHECK2-NEXT: br label [[IFCONT]]
// CHECK2: ifcont:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK2: then2:
-// CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK2-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4
-// CHECK2-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
-// CHECK2-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
-// CHECK2-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
-// CHECK2-NEXT: br label [[IFCONT4:%.*]]
-// CHECK2: else3:
-// CHECK2-NEXT: br label [[IFCONT4]]
-// CHECK2: ifcont4:
+// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK2-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK2: then4:
+// CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK2-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 4
+// CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
+// CHECK2-NEXT: [[TMP15:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP11]], align 4
+// CHECK2-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4
+// CHECK2-NEXT: br label [[IFCONT6:%.*]]
+// CHECK2: else5:
+// CHECK2-NEXT: br label [[IFCONT6]]
+// CHECK2: ifcont6:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK2-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK2-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK2: then6:
-// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4
-// CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16*
-// CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK2-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)*
-// CHECK2-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
-// CHECK2-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
-// CHECK2-NEXT: br label [[IFCONT8:%.*]]
-// CHECK2: else7:
-// CHECK2-NEXT: br label [[IFCONT8]]
-// CHECK2: ifcont8:
+// CHECK2-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK2-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK2: then8:
+// CHECK2-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4
+// CHECK2-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i16*
+// CHECK2-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK2-NEXT: [[TMP20:%.*]] = bitcast i32 addrspace(3)* [[TMP19]] to i16 addrspace(3)*
+// CHECK2-NEXT: [[TMP21:%.*]] = load i16, i16* [[TMP18]], align 2
+// CHECK2-NEXT: store volatile i16 [[TMP21]], i16 addrspace(3)* [[TMP20]], align 2
+// CHECK2-NEXT: br label [[IFCONT10:%.*]]
+// CHECK2: else9:
+// CHECK2-NEXT: br label [[IFCONT10]]
+// CHECK2: ifcont10:
// CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK2-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
-// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK2: then10:
-// CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK2-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)*
-// CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK2-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 4
-// CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16*
-// CHECK2-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
-// CHECK2-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
-// CHECK2-NEXT: br label [[IFCONT12:%.*]]
-// CHECK2: else11:
-// CHECK2-NEXT: br label [[IFCONT12]]
-// CHECK2: ifcont12:
+// CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK2-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP22]]
+// CHECK2-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK2: then12:
+// CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK2-NEXT: [[TMP24:%.*]] = bitcast i32 addrspace(3)* [[TMP23]] to i16 addrspace(3)*
+// CHECK2-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK2-NEXT: [[TMP26:%.*]] = load i8*, i8** [[TMP25]], align 4
+// CHECK2-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to i16*
+// CHECK2-NEXT: [[TMP28:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP24]], align 2
+// CHECK2-NEXT: store i16 [[TMP28]], i16* [[TMP27]], align 2
+// CHECK2-NEXT: br label [[IFCONT14:%.*]]
+// CHECK2: else13:
+// CHECK2-NEXT: br label [[IFCONT14]]
+// CHECK2: ifcont14:
// CHECK2-NEXT: ret void
//
//
@@ -6781,7 +6781,7 @@ int bar(int n){
// CHECK2-NEXT: store i8* [[TMP11]], i8** [[TMP9]], align 4
// CHECK2-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP12]], i8* [[TMP13]]) #[[ATTR3]]
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP12]], i8* [[TMP13]]) #[[ATTR4]]
// CHECK2-NEXT: ret void
//
//
@@ -6841,7 +6841,7 @@ int bar(int n){
// CHECK2-NEXT: store i8* [[TMP11]], i8** [[TMP9]], align 4
// CHECK2-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK2-NEXT: [[TMP13:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK2-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP13]], i8* [[TMP12]]) #[[ATTR3]]
+// CHECK2-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP13]], i8* [[TMP12]]) #[[ATTR4]]
// CHECK2-NEXT: ret void
//
//
@@ -6863,7 +6863,7 @@ int bar(int n){
// CHECK3-NEXT: store double [[TMP3]], double* [[E1]], align 8
// CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK3-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], double* [[E1]]) #[[ATTR3:[0-9]+]]
+// CHECK3-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], double* [[E1]]) #[[ATTR4:[0-9]+]]
// CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
// CHECK3-NEXT: ret void
// CHECK3: worker.exit:
@@ -6936,48 +6936,48 @@ int bar(int n){
// CHECK3-NEXT: [[TMP15:%.*]] = bitcast double* [[TMP12]] to i64*
// CHECK3-NEXT: [[TMP16:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i64*
// CHECK3-NEXT: [[TMP17:%.*]] = load i64, i64* [[TMP15]], align 8
-// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK3-NEXT: [[TMP19:%.*]] = trunc i32 [[TMP18]] to i16
-// CHECK3-NEXT: [[TMP20:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP19]])
-// CHECK3-NEXT: store i64 [[TMP20]], i64* [[TMP16]], align 8
-// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP15]], i32 1
-// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr i64, i64* [[TMP16]], i32 1
-// CHECK3-NEXT: [[TMP23:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP11]], align 4
-// CHECK3-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK3-NEXT: [[TMP25:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK3-NEXT: [[TMP26:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK3-NEXT: [[TMP27:%.*]] = and i1 [[TMP25]], [[TMP26]]
-// CHECK3-NEXT: [[TMP28:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK3-NEXT: [[TMP29:%.*]] = and i16 [[TMP6]], 1
-// CHECK3-NEXT: [[TMP30:%.*]] = icmp eq i16 [[TMP29]], 0
-// CHECK3-NEXT: [[TMP31:%.*]] = and i1 [[TMP28]], [[TMP30]]
-// CHECK3-NEXT: [[TMP32:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK3-NEXT: [[TMP33:%.*]] = and i1 [[TMP31]], [[TMP32]]
-// CHECK3-NEXT: [[TMP34:%.*]] = or i1 [[TMP24]], [[TMP27]]
-// CHECK3-NEXT: [[TMP35:%.*]] = or i1 [[TMP34]], [[TMP33]]
-// CHECK3-NEXT: br i1 [[TMP35]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK3-NEXT: [[TMP18:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK3-NEXT: [[TMP19:%.*]] = call i64 @__kmpc_shuffle_int64(i64 [[TMP17]], i16 [[TMP7]], i16 [[TMP18]])
+// CHECK3-NEXT: store i64 [[TMP19]], i64* [[TMP16]], align 8
+// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr i64, i64* [[TMP15]], i32 1
+// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr i64, i64* [[TMP16]], i32 1
+// CHECK3-NEXT: [[TMP22:%.*]] = bitcast double* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK3-NEXT: store i8* [[TMP22]], i8** [[TMP11]], align 4
+// CHECK3-NEXT: [[TMP23:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK3-NEXT: [[TMP24:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK3-NEXT: [[TMP25:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK3-NEXT: [[TMP26:%.*]] = and i1 [[TMP24]], [[TMP25]]
+// CHECK3-NEXT: [[TMP27:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK3-NEXT: [[TMP28:%.*]] = and i16 [[TMP6]], 1
+// CHECK3-NEXT: [[TMP29:%.*]] = icmp eq i16 [[TMP28]], 0
+// CHECK3-NEXT: [[TMP30:%.*]] = and i1 [[TMP27]], [[TMP29]]
+// CHECK3-NEXT: [[TMP31:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK3-NEXT: [[TMP32:%.*]] = and i1 [[TMP30]], [[TMP31]]
+// CHECK3-NEXT: [[TMP33:%.*]] = or i1 [[TMP23]], [[TMP26]]
+// CHECK3-NEXT: [[TMP34:%.*]] = or i1 [[TMP33]], [[TMP32]]
+// CHECK3-NEXT: br i1 [[TMP34]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK3: then:
-// CHECK3-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8*
-// CHECK3-NEXT: [[TMP37:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP36]], i8* [[TMP37]]) #[[ATTR3]]
+// CHECK3-NEXT: [[TMP35:%.*]] = bitcast [1 x i8*]* [[TMP5]] to i8*
+// CHECK3-NEXT: [[TMP36:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP35]], i8* [[TMP36]]) #[[ATTR4]]
// CHECK3-NEXT: br label [[IFCONT:%.*]]
// CHECK3: else:
// CHECK3-NEXT: br label [[IFCONT]]
// CHECK3: ifcont:
-// CHECK3-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK3-NEXT: [[TMP39:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK3-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK3-NEXT: br i1 [[TMP40]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK3-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK3-NEXT: [[TMP38:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK3-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
+// CHECK3-NEXT: br i1 [[TMP39]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
// CHECK3: then4:
-// CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP42:%.*]] = load i8*, i8** [[TMP41]], align 4
-// CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP44:%.*]] = load i8*, i8** [[TMP43]], align 4
-// CHECK3-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP42]] to double*
-// CHECK3-NEXT: [[TMP46:%.*]] = bitcast i8* [[TMP44]] to double*
-// CHECK3-NEXT: [[TMP47:%.*]] = load double, double* [[TMP45]], align 8
-// CHECK3-NEXT: store double [[TMP47]], double* [[TMP46]], align 8
+// CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP41:%.*]] = load i8*, i8** [[TMP40]], align 4
+// CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP43:%.*]] = load i8*, i8** [[TMP42]], align 4
+// CHECK3-NEXT: [[TMP44:%.*]] = bitcast i8* [[TMP41]] to double*
+// CHECK3-NEXT: [[TMP45:%.*]] = bitcast i8* [[TMP43]] to double*
+// CHECK3-NEXT: [[TMP46:%.*]] = load double, double* [[TMP44]], align 8
+// CHECK3-NEXT: store double [[TMP46]], double* [[TMP45]], align 8
// CHECK3-NEXT: br label [[IFCONT6:%.*]]
// CHECK3: else5:
// CHECK3-NEXT: br label [[IFCONT6]]
@@ -6994,53 +6994,53 @@ int bar(int n){
// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4
-// CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [1 x i8*]*
+// CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 4
+// CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [1 x i8*]*
// CHECK3-NEXT: store i32 0, i32* [[DOTCNT_ADDR]], align 4
// CHECK3-NEXT: br label [[PRECOND:%.*]]
// CHECK3: precond:
-// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4
-// CHECK3-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP8]], 2
-// CHECK3-NEXT: br i1 [[TMP9]], label [[BODY:%.*]], label [[EXIT:%.*]]
+// CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCNT_ADDR]], align 4
+// CHECK3-NEXT: [[TMP6:%.*]] = icmp ult i32 [[TMP5]], 2
+// CHECK3-NEXT: br i1 [[TMP6]], label [[BODY:%.*]], label [[EXIT:%.*]]
// CHECK3: body:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP2]])
// CHECK3-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK3-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK3: then:
-// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP11:%.*]] = load i8*, i8** [[TMP10]], align 4
-// CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8* [[TMP11]] to i32*
-// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 [[TMP8]]
-// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP13]], align 4
-// CHECK3-NEXT: store volatile i32 [[TMP15]], i32 addrspace(3)* [[TMP14]], align 4
+// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP8:%.*]] = load i8*, i8** [[TMP7]], align 4
+// CHECK3-NEXT: [[TMP9:%.*]] = bitcast i8* [[TMP8]] to i32*
+// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP9]], i32 [[TMP5]]
+// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
+// CHECK3-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
// CHECK3-NEXT: br label [[IFCONT:%.*]]
// CHECK3: else:
// CHECK3-NEXT: br label [[IFCONT]]
// CHECK3: ifcont:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP16]]
-// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK3: then2:
-// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP19:%.*]] = load i8*, i8** [[TMP18]], align 4
-// CHECK3-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to i32*
-// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr i32, i32* [[TMP20]], i32 [[TMP8]]
-// CHECK3-NEXT: [[TMP22:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP17]], align 4
-// CHECK3-NEXT: store i32 [[TMP22]], i32* [[TMP21]], align 4
-// CHECK3-NEXT: br label [[IFCONT4:%.*]]
-// CHECK3: else3:
-// CHECK3-NEXT: br label [[IFCONT4]]
-// CHECK3: ifcont4:
-// CHECK3-NEXT: [[TMP23:%.*]] = add nsw i32 [[TMP8]], 1
-// CHECK3-NEXT: store i32 [[TMP23]], i32* [[DOTCNT_ADDR]], align 4
+// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP13]]
+// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK3: then4:
+// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4
+// CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
+// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP17]], i32 [[TMP5]]
+// CHECK3-NEXT: [[TMP19:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
+// CHECK3-NEXT: store i32 [[TMP19]], i32* [[TMP18]], align 4
+// CHECK3-NEXT: br label [[IFCONT6:%.*]]
+// CHECK3: else5:
+// CHECK3-NEXT: br label [[IFCONT6]]
+// CHECK3: ifcont6:
+// CHECK3-NEXT: [[TMP20:%.*]] = add nsw i32 [[TMP5]], 1
+// CHECK3-NEXT: store i32 [[TMP20]], i32* [[DOTCNT_ADDR]], align 4
// CHECK3-NEXT: br label [[PRECOND]]
// CHECK3: exit:
// CHECK3-NEXT: ret void
@@ -7090,7 +7090,7 @@ int bar(int n){
// CHECK3-NEXT: store i8* [[TMP8]], i8** [[TMP6]], align 4
// CHECK3-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP9]], i8* [[TMP10]]) #[[ATTR3]]
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP9]], i8* [[TMP10]]) #[[ATTR4]]
// CHECK3-NEXT: ret void
//
//
@@ -7138,7 +7138,7 @@ int bar(int n){
// CHECK3-NEXT: store i8* [[TMP8]], i8** [[TMP6]], align 4
// CHECK3-NEXT: [[TMP9:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP10]], i8* [[TMP9]]) #[[ATTR3]]
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func"(i8* [[TMP10]], i8* [[TMP9]]) #[[ATTR4]]
// CHECK3-NEXT: ret void
//
//
@@ -7167,7 +7167,7 @@ int bar(int n){
// CHECK3-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP3]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK3-NEXT: call void @__omp_outlined__1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i8* [[C2]], float* [[D_ON_STACK]]) #[[ATTR3]]
+// CHECK3-NEXT: call void @__omp_outlined__1(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i8* [[C2]], float* [[D_ON_STACK]]) #[[ATTR4]]
// CHECK3-NEXT: call void @__kmpc_free_shared(i8* [[D3]], i32 4)
// CHECK3-NEXT: call void @__kmpc_free_shared(i8* [[C2]], i32 1)
// CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1, i1 true)
@@ -7260,75 +7260,75 @@ int bar(int n){
// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1
// CHECK3-NEXT: [[TMP13:%.*]] = load i8, i8* [[TMP10]], align 1
// CHECK3-NEXT: [[TMP14:%.*]] = sext i8 [[TMP13]] to i32
-// CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK3-NEXT: [[TMP16:%.*]] = trunc i32 [[TMP15]] to i16
-// CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP16]])
-// CHECK3-NEXT: [[TMP18:%.*]] = trunc i32 [[TMP17]] to i8
-// CHECK3-NEXT: store i8 [[TMP18]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1
-// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1
-// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK3-NEXT: [[TMP15:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP14]], i16 [[TMP7]], i16 [[TMP15]])
+// CHECK3-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i8
+// CHECK3-NEXT: store i8 [[TMP17]], i8* [[DOTOMP_REDUCTION_ELEMENT]], align 1
+// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP10]], i32 1
+// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
// CHECK3-NEXT: store i8* [[DOTOMP_REDUCTION_ELEMENT]], i8** [[TMP11]], align 4
-// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 4
-// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to float*
-// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr float, float* [[TMP24]], i32 1
-// CHECK3-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP25]] to i8*
-// CHECK3-NEXT: [[TMP27:%.*]] = bitcast float* [[TMP24]] to i32*
-// CHECK3-NEXT: [[TMP28:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
-// CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP27]], align 4
-// CHECK3-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK3-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK3-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK3-NEXT: store i32 [[TMP32]], i32* [[TMP28]], align 4
-// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr i32, i32* [[TMP27]], i32 1
-// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr i32, i32* [[TMP28]], i32 1
-// CHECK3-NEXT: [[TMP35:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK3-NEXT: store i8* [[TMP35]], i8** [[TMP23]], align 4
-// CHECK3-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK3-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK3-NEXT: [[TMP38:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK3-NEXT: [[TMP39:%.*]] = and i1 [[TMP37]], [[TMP38]]
-// CHECK3-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK3-NEXT: [[TMP41:%.*]] = and i16 [[TMP6]], 1
-// CHECK3-NEXT: [[TMP42:%.*]] = icmp eq i16 [[TMP41]], 0
-// CHECK3-NEXT: [[TMP43:%.*]] = and i1 [[TMP40]], [[TMP42]]
-// CHECK3-NEXT: [[TMP44:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK3-NEXT: [[TMP45:%.*]] = and i1 [[TMP43]], [[TMP44]]
-// CHECK3-NEXT: [[TMP46:%.*]] = or i1 [[TMP36]], [[TMP39]]
-// CHECK3-NEXT: [[TMP47:%.*]] = or i1 [[TMP46]], [[TMP45]]
-// CHECK3-NEXT: br i1 [[TMP47]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP21:%.*]] = load i8*, i8** [[TMP20]], align 4
+// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP21]] to float*
+// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr float, float* [[TMP23]], i32 1
+// CHECK3-NEXT: [[TMP25:%.*]] = bitcast float* [[TMP24]] to i8*
+// CHECK3-NEXT: [[TMP26:%.*]] = bitcast float* [[TMP23]] to i32*
+// CHECK3-NEXT: [[TMP27:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i32*
+// CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP26]], align 4
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK3-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK3-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
+// CHECK3-NEXT: store i32 [[TMP30]], i32* [[TMP27]], align 4
+// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr i32, i32* [[TMP26]], i32 1
+// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr i32, i32* [[TMP27]], i32 1
+// CHECK3-NEXT: [[TMP33:%.*]] = bitcast float* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK3-NEXT: store i8* [[TMP33]], i8** [[TMP22]], align 4
+// CHECK3-NEXT: [[TMP34:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK3-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK3-NEXT: [[TMP36:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK3-NEXT: [[TMP37:%.*]] = and i1 [[TMP35]], [[TMP36]]
+// CHECK3-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK3-NEXT: [[TMP39:%.*]] = and i16 [[TMP6]], 1
+// CHECK3-NEXT: [[TMP40:%.*]] = icmp eq i16 [[TMP39]], 0
+// CHECK3-NEXT: [[TMP41:%.*]] = and i1 [[TMP38]], [[TMP40]]
+// CHECK3-NEXT: [[TMP42:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK3-NEXT: [[TMP43:%.*]] = and i1 [[TMP41]], [[TMP42]]
+// CHECK3-NEXT: [[TMP44:%.*]] = or i1 [[TMP34]], [[TMP37]]
+// CHECK3-NEXT: [[TMP45:%.*]] = or i1 [[TMP44]], [[TMP43]]
+// CHECK3-NEXT: br i1 [[TMP45]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK3: then:
-// CHECK3-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK3-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP48]], i8* [[TMP49]]) #[[ATTR3]]
+// CHECK3-NEXT: [[TMP46:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK3-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP46]], i8* [[TMP47]]) #[[ATTR4]]
// CHECK3-NEXT: br label [[IFCONT:%.*]]
// CHECK3: else:
// CHECK3-NEXT: br label [[IFCONT]]
// CHECK3: ifcont:
-// CHECK3-NEXT: [[TMP50:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK3-NEXT: [[TMP51:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK3-NEXT: [[TMP52:%.*]] = and i1 [[TMP50]], [[TMP51]]
-// CHECK3-NEXT: br i1 [[TMP52]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK3: then5:
-// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP48:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK3-NEXT: [[TMP49:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK3-NEXT: [[TMP50:%.*]] = and i1 [[TMP48]], [[TMP49]]
+// CHECK3-NEXT: br i1 [[TMP50]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK3: then6:
+// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP52:%.*]] = load i8*, i8** [[TMP51]], align 4
+// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
// CHECK3-NEXT: [[TMP54:%.*]] = load i8*, i8** [[TMP53]], align 4
-// CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP56:%.*]] = load i8*, i8** [[TMP55]], align 4
-// CHECK3-NEXT: [[TMP57:%.*]] = load i8, i8* [[TMP54]], align 1
-// CHECK3-NEXT: store i8 [[TMP57]], i8* [[TMP56]], align 1
-// CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP55:%.*]] = load i8, i8* [[TMP52]], align 1
+// CHECK3-NEXT: store i8 [[TMP55]], i8* [[TMP54]], align 1
+// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 4
+// CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
// CHECK3-NEXT: [[TMP59:%.*]] = load i8*, i8** [[TMP58]], align 4
-// CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP61:%.*]] = load i8*, i8** [[TMP60]], align 4
-// CHECK3-NEXT: [[TMP62:%.*]] = bitcast i8* [[TMP59]] to float*
-// CHECK3-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP61]] to float*
-// CHECK3-NEXT: [[TMP64:%.*]] = load float, float* [[TMP62]], align 4
-// CHECK3-NEXT: store float [[TMP64]], float* [[TMP63]], align 4
-// CHECK3-NEXT: br label [[IFCONT7:%.*]]
-// CHECK3: else6:
-// CHECK3-NEXT: br label [[IFCONT7]]
-// CHECK3: ifcont7:
+// CHECK3-NEXT: [[TMP60:%.*]] = bitcast i8* [[TMP57]] to float*
+// CHECK3-NEXT: [[TMP61:%.*]] = bitcast i8* [[TMP59]] to float*
+// CHECK3-NEXT: [[TMP62:%.*]] = load float, float* [[TMP60]], align 4
+// CHECK3-NEXT: store float [[TMP62]], float* [[TMP61]], align 4
+// CHECK3-NEXT: br label [[IFCONT8:%.*]]
+// CHECK3: else7:
+// CHECK3-NEXT: br label [[IFCONT8]]
+// CHECK3: ifcont8:
// CHECK3-NEXT: ret void
//
//
@@ -7340,71 +7340,71 @@ int bar(int n){
// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4
-// CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 4
+// CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
// CHECK3-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK3-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK3: then:
-// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4
-// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK3-NEXT: [[TMP11:%.*]] = bitcast i32 addrspace(3)* [[TMP10]] to i8 addrspace(3)*
-// CHECK3-NEXT: [[TMP12:%.*]] = load i8, i8* [[TMP9]], align 1
-// CHECK3-NEXT: store volatile i8 [[TMP12]], i8 addrspace(3)* [[TMP11]], align 1
+// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 4
+// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK3-NEXT: [[TMP8:%.*]] = bitcast i32 addrspace(3)* [[TMP7]] to i8 addrspace(3)*
+// CHECK3-NEXT: [[TMP9:%.*]] = load i8, i8* [[TMP6]], align 1
+// CHECK3-NEXT: store volatile i8 [[TMP9]], i8 addrspace(3)* [[TMP8]], align 1
// CHECK3-NEXT: br label [[IFCONT:%.*]]
// CHECK3: else:
// CHECK3-NEXT: br label [[IFCONT]]
// CHECK3: ifcont:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK3: then2:
-// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32 addrspace(3)* [[TMP14]] to i8 addrspace(3)*
-// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4
-// CHECK3-NEXT: [[TMP18:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP15]], align 1
-// CHECK3-NEXT: store i8 [[TMP18]], i8* [[TMP17]], align 1
-// CHECK3-NEXT: br label [[IFCONT4:%.*]]
-// CHECK3: else3:
-// CHECK3-NEXT: br label [[IFCONT4]]
-// CHECK3: ifcont4:
+// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK3: then4:
+// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK3-NEXT: [[TMP12:%.*]] = bitcast i32 addrspace(3)* [[TMP11]] to i8 addrspace(3)*
+// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP14:%.*]] = load i8*, i8** [[TMP13]], align 4
+// CHECK3-NEXT: [[TMP15:%.*]] = load volatile i8, i8 addrspace(3)* [[TMP12]], align 1
+// CHECK3-NEXT: store i8 [[TMP15]], i8* [[TMP14]], align 1
+// CHECK3-NEXT: br label [[IFCONT6:%.*]]
+// CHECK3: else5:
+// CHECK3-NEXT: br label [[IFCONT6]]
+// CHECK3: ifcont6:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK3-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK3-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK3: then6:
-// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4
-// CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i32*
-// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP21]], align 4
-// CHECK3-NEXT: store volatile i32 [[TMP23]], i32 addrspace(3)* [[TMP22]], align 4
-// CHECK3-NEXT: br label [[IFCONT8:%.*]]
-// CHECK3: else7:
-// CHECK3-NEXT: br label [[IFCONT8]]
-// CHECK3: ifcont8:
+// CHECK3-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK3-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK3: then8:
+// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4
+// CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i32*
+// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP18]], align 4
+// CHECK3-NEXT: store volatile i32 [[TMP20]], i32 addrspace(3)* [[TMP19]], align 4
+// CHECK3-NEXT: br label [[IFCONT10:%.*]]
+// CHECK3: else9:
+// CHECK3-NEXT: br label [[IFCONT10]]
+// CHECK3: ifcont10:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]])
-// CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP24]]
-// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK3: then10:
-// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP27:%.*]] = load i8*, i8** [[TMP26]], align 4
-// CHECK3-NEXT: [[TMP28:%.*]] = bitcast i8* [[TMP27]] to i32*
-// CHECK3-NEXT: [[TMP29:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP25]], align 4
-// CHECK3-NEXT: store i32 [[TMP29]], i32* [[TMP28]], align 4
-// CHECK3-NEXT: br label [[IFCONT12:%.*]]
-// CHECK3: else11:
-// CHECK3-NEXT: br label [[IFCONT12]]
-// CHECK3: ifcont12:
+// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK3-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP21]]
+// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK3: then12:
+// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP24:%.*]] = load i8*, i8** [[TMP23]], align 4
+// CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to i32*
+// CHECK3-NEXT: [[TMP26:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP22]], align 4
+// CHECK3-NEXT: store i32 [[TMP26]], i32* [[TMP25]], align 4
+// CHECK3-NEXT: br label [[IFCONT14:%.*]]
+// CHECK3: else13:
+// CHECK3-NEXT: br label [[IFCONT14]]
+// CHECK3: ifcont14:
// CHECK3-NEXT: ret void
//
//
@@ -7462,7 +7462,7 @@ int bar(int n){
// CHECK3-NEXT: store i8* [[TMP10]], i8** [[TMP8]], align 4
// CHECK3-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK3-NEXT: [[TMP12:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP11]], i8* [[TMP12]]) #[[ATTR3]]
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP11]], i8* [[TMP12]]) #[[ATTR4]]
// CHECK3-NEXT: ret void
//
//
@@ -7520,7 +7520,7 @@ int bar(int n){
// CHECK3-NEXT: store i8* [[TMP10]], i8** [[TMP8]], align 4
// CHECK3-NEXT: [[TMP11:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK3-NEXT: [[TMP12:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP12]], i8* [[TMP11]]) #[[ATTR3]]
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func2"(i8* [[TMP12]], i8* [[TMP11]]) #[[ATTR4]]
// CHECK3-NEXT: ret void
//
//
@@ -7541,7 +7541,7 @@ int bar(int n){
// CHECK3-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3:[0-9]+]])
// CHECK3-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4
-// CHECK3-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32* [[A_ADDR]], i16* [[CONV]]) #[[ATTR3]]
+// CHECK3-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32* [[A_ADDR]], i16* [[CONV]]) #[[ATTR4]]
// CHECK3-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2, i1 true)
// CHECK3-NEXT: ret void
// CHECK3: worker.exit:
@@ -7713,77 +7713,77 @@ int bar(int n){
// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
// CHECK3-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]], align 4
-// CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK3-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
-// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
-// CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
-// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
-// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
-// CHECK3-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP11]], align 4
-// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP23:%.*]] = load i8*, i8** [[TMP22]], align 4
-// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP23]] to i16*
-// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP25]], i32 1
-// CHECK3-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
-// CHECK3-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP25]], align 2
-// CHECK3-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
-// CHECK3-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK3-NEXT: [[TMP16:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP16]])
+// CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
+// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
+// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
+// CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK3-NEXT: store i8* [[TMP20]], i8** [[TMP11]], align 4
+// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 4
+// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to i16*
+// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
+// CHECK3-NEXT: [[TMP26:%.*]] = bitcast i16* [[TMP25]] to i8*
+// CHECK3-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP24]], align 2
+// CHECK3-NEXT: [[TMP28:%.*]] = sext i16 [[TMP27]] to i32
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK3-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK3-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
// CHECK3-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK3-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK3-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
-// CHECK3-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
-// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP25]], i32 1
-// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
-// CHECK3-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK3-NEXT: store i8* [[TMP36]], i8** [[TMP24]], align 4
-// CHECK3-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK3-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK3-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK3-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK3-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK3-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
-// CHECK3-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
-// CHECK3-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
-// CHECK3-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK3-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
-// CHECK3-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
-// CHECK3-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
-// CHECK3-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK3-NEXT: store i16 [[TMP31]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
+// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
+// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
+// CHECK3-NEXT: [[TMP34:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK3-NEXT: store i8* [[TMP34]], i8** [[TMP23]], align 4
+// CHECK3-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK3-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK3-NEXT: [[TMP37:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK3-NEXT: [[TMP38:%.*]] = and i1 [[TMP36]], [[TMP37]]
+// CHECK3-NEXT: [[TMP39:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK3-NEXT: [[TMP40:%.*]] = and i16 [[TMP6]], 1
+// CHECK3-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP40]], 0
+// CHECK3-NEXT: [[TMP42:%.*]] = and i1 [[TMP39]], [[TMP41]]
+// CHECK3-NEXT: [[TMP43:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK3-NEXT: [[TMP44:%.*]] = and i1 [[TMP42]], [[TMP43]]
+// CHECK3-NEXT: [[TMP45:%.*]] = or i1 [[TMP35]], [[TMP38]]
+// CHECK3-NEXT: [[TMP46:%.*]] = or i1 [[TMP45]], [[TMP44]]
+// CHECK3-NEXT: br i1 [[TMP46]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK3: then:
-// CHECK3-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK3-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func11"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
+// CHECK3-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK3-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func11"(i8* [[TMP47]], i8* [[TMP48]]) #[[ATTR4]]
// CHECK3-NEXT: br label [[IFCONT:%.*]]
// CHECK3: else:
// CHECK3-NEXT: br label [[IFCONT]]
// CHECK3: ifcont:
-// CHECK3-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK3-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK3-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
-// CHECK3-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK3: then5:
-// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP49:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK3-NEXT: [[TMP50:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK3-NEXT: [[TMP51:%.*]] = and i1 [[TMP49]], [[TMP50]]
+// CHECK3-NEXT: br i1 [[TMP51]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK3: then6:
+// CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP53:%.*]] = load i8*, i8** [[TMP52]], align 4
+// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
// CHECK3-NEXT: [[TMP55:%.*]] = load i8*, i8** [[TMP54]], align 4
-// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 4
-// CHECK3-NEXT: [[TMP58:%.*]] = bitcast i8* [[TMP55]] to i32*
-// CHECK3-NEXT: [[TMP59:%.*]] = bitcast i8* [[TMP57]] to i32*
-// CHECK3-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP58]], align 4
-// CHECK3-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4
-// CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP56:%.*]] = bitcast i8* [[TMP53]] to i32*
+// CHECK3-NEXT: [[TMP57:%.*]] = bitcast i8* [[TMP55]] to i32*
+// CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[TMP56]], align 4
+// CHECK3-NEXT: store i32 [[TMP58]], i32* [[TMP57]], align 4
+// CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP60:%.*]] = load i8*, i8** [[TMP59]], align 4
+// CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
// CHECK3-NEXT: [[TMP62:%.*]] = load i8*, i8** [[TMP61]], align 4
-// CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP64:%.*]] = load i8*, i8** [[TMP63]], align 4
-// CHECK3-NEXT: [[TMP65:%.*]] = bitcast i8* [[TMP62]] to i16*
-// CHECK3-NEXT: [[TMP66:%.*]] = bitcast i8* [[TMP64]] to i16*
-// CHECK3-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP65]], align 2
-// CHECK3-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
-// CHECK3-NEXT: br label [[IFCONT7:%.*]]
-// CHECK3: else6:
-// CHECK3-NEXT: br label [[IFCONT7]]
-// CHECK3: ifcont7:
+// CHECK3-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP60]] to i16*
+// CHECK3-NEXT: [[TMP64:%.*]] = bitcast i8* [[TMP62]] to i16*
+// CHECK3-NEXT: [[TMP65:%.*]] = load i16, i16* [[TMP63]], align 2
+// CHECK3-NEXT: store i16 [[TMP65]], i16* [[TMP64]], align 2
+// CHECK3-NEXT: br label [[IFCONT8:%.*]]
+// CHECK3: else7:
+// CHECK3-NEXT: br label [[IFCONT8]]
+// CHECK3: ifcont8:
// CHECK3-NEXT: ret void
//
//
@@ -7795,73 +7795,73 @@ int bar(int n){
// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
// CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4
-// CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 4
+// CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP2]])
// CHECK3-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK3-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK3: then:
-// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4
-// CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
-// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK3-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
+// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 4
+// CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i32*
+// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP7]], align 4
+// CHECK3-NEXT: store volatile i32 [[TMP9]], i32 addrspace(3)* [[TMP8]], align 4
// CHECK3-NEXT: br label [[IFCONT:%.*]]
// CHECK3: else:
// CHECK3-NEXT: br label [[IFCONT]]
// CHECK3: ifcont:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK3: then2:
-// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4
-// CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
-// CHECK3-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
-// CHECK3-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
-// CHECK3-NEXT: br label [[IFCONT4:%.*]]
-// CHECK3: else3:
-// CHECK3-NEXT: br label [[IFCONT4]]
-// CHECK3: ifcont4:
+// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK3: then4:
+// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 4
+// CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
+// CHECK3-NEXT: [[TMP15:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP11]], align 4
+// CHECK3-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4
+// CHECK3-NEXT: br label [[IFCONT6:%.*]]
+// CHECK3: else5:
+// CHECK3-NEXT: br label [[IFCONT6]]
+// CHECK3: ifcont6:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK3-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK3-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK3: then6:
-// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4
-// CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16*
-// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK3-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)*
-// CHECK3-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
-// CHECK3-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
-// CHECK3-NEXT: br label [[IFCONT8:%.*]]
-// CHECK3: else7:
-// CHECK3-NEXT: br label [[IFCONT8]]
-// CHECK3: ifcont8:
+// CHECK3-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK3-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK3: then8:
+// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4
+// CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i16*
+// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32 addrspace(3)* [[TMP19]] to i16 addrspace(3)*
+// CHECK3-NEXT: [[TMP21:%.*]] = load i16, i16* [[TMP18]], align 2
+// CHECK3-NEXT: store volatile i16 [[TMP21]], i16 addrspace(3)* [[TMP20]], align 2
+// CHECK3-NEXT: br label [[IFCONT10:%.*]]
+// CHECK3: else9:
+// CHECK3-NEXT: br label [[IFCONT10]]
+// CHECK3: ifcont10:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
-// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK3: then10:
-// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK3-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)*
-// CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 4
-// CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16*
-// CHECK3-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
-// CHECK3-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
-// CHECK3-NEXT: br label [[IFCONT12:%.*]]
-// CHECK3: else11:
-// CHECK3-NEXT: br label [[IFCONT12]]
-// CHECK3: ifcont12:
+// CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK3-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP22]]
+// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK3: then12:
+// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK3-NEXT: [[TMP24:%.*]] = bitcast i32 addrspace(3)* [[TMP23]] to i16 addrspace(3)*
+// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP26:%.*]] = load i8*, i8** [[TMP25]], align 4
+// CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to i16*
+// CHECK3-NEXT: [[TMP28:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP24]], align 2
+// CHECK3-NEXT: store i16 [[TMP28]], i16* [[TMP27]], align 2
+// CHECK3-NEXT: br label [[IFCONT14:%.*]]
+// CHECK3: else13:
+// CHECK3-NEXT: br label [[IFCONT14]]
+// CHECK3: ifcont14:
// CHECK3-NEXT: ret void
//
//
@@ -7891,77 +7891,77 @@ int bar(int n){
// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
// CHECK3-NEXT: [[TMP14:%.*]] = bitcast i32* [[TMP13]] to i8*
// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP12]], align 4
-// CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_get_warp_size()
-// CHECK3-NEXT: [[TMP17:%.*]] = trunc i32 [[TMP16]] to i16
-// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP17]])
-// CHECK3-NEXT: store i32 [[TMP18]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
-// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
-// CHECK3-NEXT: [[TMP20:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
-// CHECK3-NEXT: [[TMP21:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
-// CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP11]], align 4
-// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP23:%.*]] = load i8*, i8** [[TMP22]], align 4
-// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP23]] to i16*
-// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr i16, i16* [[TMP25]], i32 1
-// CHECK3-NEXT: [[TMP27:%.*]] = bitcast i16* [[TMP26]] to i8*
-// CHECK3-NEXT: [[TMP28:%.*]] = load i16, i16* [[TMP25]], align 2
-// CHECK3-NEXT: [[TMP29:%.*]] = sext i16 [[TMP28]] to i32
-// CHECK3-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_get_warp_size()
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK3-NEXT: [[TMP16:%.*]] = trunc i32 [[NVPTX_WARP_SIZE]] to i16
+// CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP15]], i16 [[TMP7]], i16 [[TMP16]])
+// CHECK3-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_REDUCTION_ELEMENT]], align 4
+// CHECK3-NEXT: [[TMP18:%.*]] = getelementptr i32, i32* [[TMP12]], i32 1
+// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr i32, i32* [[DOTOMP_REDUCTION_ELEMENT]], i32 1
+// CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32* [[DOTOMP_REDUCTION_ELEMENT]] to i8*
+// CHECK3-NEXT: store i8* [[TMP20]], i8** [[TMP11]], align 4
+// CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP22:%.*]] = load i8*, i8** [[TMP21]], align 4
+// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP24:%.*]] = bitcast i8* [[TMP22]] to i16*
+// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
+// CHECK3-NEXT: [[TMP26:%.*]] = bitcast i16* [[TMP25]] to i8*
+// CHECK3-NEXT: [[TMP27:%.*]] = load i16, i16* [[TMP24]], align 2
+// CHECK3-NEXT: [[TMP28:%.*]] = sext i16 [[TMP27]] to i32
+// CHECK3-NEXT: [[NVPTX_WARP_SIZE5:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.warpsize()
+// CHECK3-NEXT: [[TMP29:%.*]] = trunc i32 [[NVPTX_WARP_SIZE5]] to i16
+// CHECK3-NEXT: [[TMP30:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP28]], i16 [[TMP7]], i16 [[TMP29]])
// CHECK3-NEXT: [[TMP31:%.*]] = trunc i32 [[TMP30]] to i16
-// CHECK3-NEXT: [[TMP32:%.*]] = call i32 @__kmpc_shuffle_int32(i32 [[TMP29]], i16 [[TMP7]], i16 [[TMP31]])
-// CHECK3-NEXT: [[TMP33:%.*]] = trunc i32 [[TMP32]] to i16
-// CHECK3-NEXT: store i16 [[TMP33]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
-// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr i16, i16* [[TMP25]], i32 1
-// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
-// CHECK3-NEXT: [[TMP36:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
-// CHECK3-NEXT: store i8* [[TMP36]], i8** [[TMP24]], align 4
-// CHECK3-NEXT: [[TMP37:%.*]] = icmp eq i16 [[TMP8]], 0
-// CHECK3-NEXT: [[TMP38:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK3-NEXT: [[TMP39:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
-// CHECK3-NEXT: [[TMP40:%.*]] = and i1 [[TMP38]], [[TMP39]]
-// CHECK3-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP8]], 2
-// CHECK3-NEXT: [[TMP42:%.*]] = and i16 [[TMP6]], 1
-// CHECK3-NEXT: [[TMP43:%.*]] = icmp eq i16 [[TMP42]], 0
-// CHECK3-NEXT: [[TMP44:%.*]] = and i1 [[TMP41]], [[TMP43]]
-// CHECK3-NEXT: [[TMP45:%.*]] = icmp sgt i16 [[TMP7]], 0
-// CHECK3-NEXT: [[TMP46:%.*]] = and i1 [[TMP44]], [[TMP45]]
-// CHECK3-NEXT: [[TMP47:%.*]] = or i1 [[TMP37]], [[TMP40]]
-// CHECK3-NEXT: [[TMP48:%.*]] = or i1 [[TMP47]], [[TMP46]]
-// CHECK3-NEXT: br i1 [[TMP48]], label [[THEN:%.*]], label [[ELSE:%.*]]
+// CHECK3-NEXT: store i16 [[TMP31]], i16* [[DOTOMP_REDUCTION_ELEMENT4]], align 2
+// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr i16, i16* [[TMP24]], i32 1
+// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr i16, i16* [[DOTOMP_REDUCTION_ELEMENT4]], i32 1
+// CHECK3-NEXT: [[TMP34:%.*]] = bitcast i16* [[DOTOMP_REDUCTION_ELEMENT4]] to i8*
+// CHECK3-NEXT: store i8* [[TMP34]], i8** [[TMP23]], align 4
+// CHECK3-NEXT: [[TMP35:%.*]] = icmp eq i16 [[TMP8]], 0
+// CHECK3-NEXT: [[TMP36:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK3-NEXT: [[TMP37:%.*]] = icmp ult i16 [[TMP6]], [[TMP7]]
+// CHECK3-NEXT: [[TMP38:%.*]] = and i1 [[TMP36]], [[TMP37]]
+// CHECK3-NEXT: [[TMP39:%.*]] = icmp eq i16 [[TMP8]], 2
+// CHECK3-NEXT: [[TMP40:%.*]] = and i16 [[TMP6]], 1
+// CHECK3-NEXT: [[TMP41:%.*]] = icmp eq i16 [[TMP40]], 0
+// CHECK3-NEXT: [[TMP42:%.*]] = and i1 [[TMP39]], [[TMP41]]
+// CHECK3-NEXT: [[TMP43:%.*]] = icmp sgt i16 [[TMP7]], 0
+// CHECK3-NEXT: [[TMP44:%.*]] = and i1 [[TMP42]], [[TMP43]]
+// CHECK3-NEXT: [[TMP45:%.*]] = or i1 [[TMP35]], [[TMP38]]
+// CHECK3-NEXT: [[TMP46:%.*]] = or i1 [[TMP45]], [[TMP44]]
+// CHECK3-NEXT: br i1 [[TMP46]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK3: then:
-// CHECK3-NEXT: [[TMP49:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
-// CHECK3-NEXT: [[TMP50:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP49]], i8* [[TMP50]]) #[[ATTR3]]
+// CHECK3-NEXT: [[TMP47:%.*]] = bitcast [2 x i8*]* [[TMP5]] to i8*
+// CHECK3-NEXT: [[TMP48:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]] to i8*
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP47]], i8* [[TMP48]]) #[[ATTR4]]
// CHECK3-NEXT: br label [[IFCONT:%.*]]
// CHECK3: else:
// CHECK3-NEXT: br label [[IFCONT]]
// CHECK3: ifcont:
-// CHECK3-NEXT: [[TMP51:%.*]] = icmp eq i16 [[TMP8]], 1
-// CHECK3-NEXT: [[TMP52:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
-// CHECK3-NEXT: [[TMP53:%.*]] = and i1 [[TMP51]], [[TMP52]]
-// CHECK3-NEXT: br i1 [[TMP53]], label [[THEN5:%.*]], label [[ELSE6:%.*]]
-// CHECK3: then5:
-// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP49:%.*]] = icmp eq i16 [[TMP8]], 1
+// CHECK3-NEXT: [[TMP50:%.*]] = icmp uge i16 [[TMP6]], [[TMP7]]
+// CHECK3-NEXT: [[TMP51:%.*]] = and i1 [[TMP49]], [[TMP50]]
+// CHECK3-NEXT: br i1 [[TMP51]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
+// CHECK3: then6:
+// CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP53:%.*]] = load i8*, i8** [[TMP52]], align 4
+// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
// CHECK3-NEXT: [[TMP55:%.*]] = load i8*, i8** [[TMP54]], align 4
-// CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP57:%.*]] = load i8*, i8** [[TMP56]], align 4
-// CHECK3-NEXT: [[TMP58:%.*]] = bitcast i8* [[TMP55]] to i32*
-// CHECK3-NEXT: [[TMP59:%.*]] = bitcast i8* [[TMP57]] to i32*
-// CHECK3-NEXT: [[TMP60:%.*]] = load i32, i32* [[TMP58]], align 4
-// CHECK3-NEXT: store i32 [[TMP60]], i32* [[TMP59]], align 4
-// CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP56:%.*]] = bitcast i8* [[TMP53]] to i32*
+// CHECK3-NEXT: [[TMP57:%.*]] = bitcast i8* [[TMP55]] to i32*
+// CHECK3-NEXT: [[TMP58:%.*]] = load i32, i32* [[TMP56]], align 4
+// CHECK3-NEXT: store i32 [[TMP58]], i32* [[TMP57]], align 4
+// CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOMP_REDUCTION_REMOTE_REDUCE_LIST]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP60:%.*]] = load i8*, i8** [[TMP59]], align 4
+// CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
// CHECK3-NEXT: [[TMP62:%.*]] = load i8*, i8** [[TMP61]], align 4
-// CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP5]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP64:%.*]] = load i8*, i8** [[TMP63]], align 4
-// CHECK3-NEXT: [[TMP65:%.*]] = bitcast i8* [[TMP62]] to i16*
-// CHECK3-NEXT: [[TMP66:%.*]] = bitcast i8* [[TMP64]] to i16*
-// CHECK3-NEXT: [[TMP67:%.*]] = load i16, i16* [[TMP65]], align 2
-// CHECK3-NEXT: store i16 [[TMP67]], i16* [[TMP66]], align 2
-// CHECK3-NEXT: br label [[IFCONT7:%.*]]
-// CHECK3: else6:
-// CHECK3-NEXT: br label [[IFCONT7]]
-// CHECK3: ifcont7:
+// CHECK3-NEXT: [[TMP63:%.*]] = bitcast i8* [[TMP60]] to i16*
+// CHECK3-NEXT: [[TMP64:%.*]] = bitcast i8* [[TMP62]] to i16*
+// CHECK3-NEXT: [[TMP65:%.*]] = load i16, i16* [[TMP63]], align 2
+// CHECK3-NEXT: store i16 [[TMP65]], i16* [[TMP64]], align 2
+// CHECK3-NEXT: br label [[IFCONT8:%.*]]
+// CHECK3: else7:
+// CHECK3-NEXT: br label [[IFCONT8]]
+// CHECK3: ifcont8:
// CHECK3-NEXT: ret void
//
//
@@ -7973,73 +7973,73 @@ int bar(int n){
// CHECK3-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB3]])
// CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[TMP4:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[TMP4]], 31
-// CHECK3-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_get_hardware_thread_id_in_block()
-// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[TMP5]], 5
-// CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8** [[DOTADDR]], align 4
-// CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to [2 x i8*]*
+// CHECK3-NEXT: [[NVPTX_TID:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_TID2:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_LANE_ID:%.*]] = and i32 [[NVPTX_TID2]], 31
+// CHECK3-NEXT: [[NVPTX_TID3:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
+// CHECK3-NEXT: [[NVPTX_WARP_ID:%.*]] = ashr i32 [[NVPTX_TID3]], 5
+// CHECK3-NEXT: [[TMP3:%.*]] = load i8*, i8** [[DOTADDR]], align 4
+// CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8* [[TMP3]] to [2 x i8*]*
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
// CHECK3-NEXT: [[WARP_MASTER:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
// CHECK3-NEXT: br i1 [[WARP_MASTER]], label [[THEN:%.*]], label [[ELSE:%.*]]
// CHECK3: then:
-// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP9:%.*]] = load i8*, i8** [[TMP8]], align 4
-// CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP9]] to i32*
-// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP10]], align 4
-// CHECK3-NEXT: store volatile i32 [[TMP12]], i32 addrspace(3)* [[TMP11]], align 4
+// CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP6:%.*]] = load i8*, i8** [[TMP5]], align 4
+// CHECK3-NEXT: [[TMP7:%.*]] = bitcast i8* [[TMP6]] to i32*
+// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP7]], align 4
+// CHECK3-NEXT: store volatile i32 [[TMP9]], i32 addrspace(3)* [[TMP8]], align 4
// CHECK3-NEXT: br label [[IFCONT:%.*]]
// CHECK3: else:
// CHECK3-NEXT: br label [[IFCONT]]
// CHECK3: ifcont:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[TMP3]], [[TMP13]]
-// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN2:%.*]], label [[ELSE3:%.*]]
-// CHECK3: then2:
-// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 0
-// CHECK3-NEXT: [[TMP16:%.*]] = load i8*, i8** [[TMP15]], align 4
-// CHECK3-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to i32*
-// CHECK3-NEXT: [[TMP18:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP14]], align 4
-// CHECK3-NEXT: store i32 [[TMP18]], i32* [[TMP17]], align 4
-// CHECK3-NEXT: br label [[IFCONT4:%.*]]
-// CHECK3: else3:
-// CHECK3-NEXT: br label [[IFCONT4]]
-// CHECK3: ifcont4:
+// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK3-NEXT: [[IS_ACTIVE_THREAD:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP10]]
+// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD]], label [[THEN4:%.*]], label [[ELSE5:%.*]]
+// CHECK3: then4:
+// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 0
+// CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[TMP12]], align 4
+// CHECK3-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to i32*
+// CHECK3-NEXT: [[TMP15:%.*]] = load volatile i32, i32 addrspace(3)* [[TMP11]], align 4
+// CHECK3-NEXT: store i32 [[TMP15]], i32* [[TMP14]], align 4
+// CHECK3-NEXT: br label [[IFCONT6:%.*]]
+// CHECK3: else5:
+// CHECK3-NEXT: br label [[IFCONT6]]
+// CHECK3: ifcont6:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK3-NEXT: [[WARP_MASTER5:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
-// CHECK3-NEXT: br i1 [[WARP_MASTER5]], label [[THEN6:%.*]], label [[ELSE7:%.*]]
-// CHECK3: then6:
-// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP20:%.*]] = load i8*, i8** [[TMP19]], align 4
-// CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8* [[TMP20]] to i16*
-// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
-// CHECK3-NEXT: [[TMP23:%.*]] = bitcast i32 addrspace(3)* [[TMP22]] to i16 addrspace(3)*
-// CHECK3-NEXT: [[TMP24:%.*]] = load i16, i16* [[TMP21]], align 2
-// CHECK3-NEXT: store volatile i16 [[TMP24]], i16 addrspace(3)* [[TMP23]], align 2
-// CHECK3-NEXT: br label [[IFCONT8:%.*]]
-// CHECK3: else7:
-// CHECK3-NEXT: br label [[IFCONT8]]
-// CHECK3: ifcont8:
+// CHECK3-NEXT: [[WARP_MASTER7:%.*]] = icmp eq i32 [[NVPTX_LANE_ID]], 0
+// CHECK3-NEXT: br i1 [[WARP_MASTER7]], label [[THEN8:%.*]], label [[ELSE9:%.*]]
+// CHECK3: then8:
+// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP17:%.*]] = load i8*, i8** [[TMP16]], align 4
+// CHECK3-NEXT: [[TMP18:%.*]] = bitcast i8* [[TMP17]] to i16*
+// CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_WARP_ID]]
+// CHECK3-NEXT: [[TMP20:%.*]] = bitcast i32 addrspace(3)* [[TMP19]] to i16 addrspace(3)*
+// CHECK3-NEXT: [[TMP21:%.*]] = load i16, i16* [[TMP18]], align 2
+// CHECK3-NEXT: store volatile i16 [[TMP21]], i16 addrspace(3)* [[TMP20]], align 2
+// CHECK3-NEXT: br label [[IFCONT10:%.*]]
+// CHECK3: else9:
+// CHECK3-NEXT: br label [[IFCONT10]]
+// CHECK3: ifcont10:
// CHECK3-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP2]])
-// CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTADDR1]], align 4
-// CHECK3-NEXT: [[IS_ACTIVE_THREAD9:%.*]] = icmp ult i32 [[TMP3]], [[TMP25]]
-// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD9]], label [[THEN10:%.*]], label [[ELSE11:%.*]]
-// CHECK3: then10:
-// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[TMP3]]
-// CHECK3-NEXT: [[TMP27:%.*]] = bitcast i32 addrspace(3)* [[TMP26]] to i16 addrspace(3)*
-// CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP7]], i32 0, i32 1
-// CHECK3-NEXT: [[TMP29:%.*]] = load i8*, i8** [[TMP28]], align 4
-// CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8* [[TMP29]] to i16*
-// CHECK3-NEXT: [[TMP31:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP27]], align 2
-// CHECK3-NEXT: store i16 [[TMP31]], i16* [[TMP30]], align 2
-// CHECK3-NEXT: br label [[IFCONT12:%.*]]
-// CHECK3: else11:
-// CHECK3-NEXT: br label [[IFCONT12]]
-// CHECK3: ifcont12:
+// CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTADDR1]], align 4
+// CHECK3-NEXT: [[IS_ACTIVE_THREAD11:%.*]] = icmp ult i32 [[NVPTX_TID]], [[TMP22]]
+// CHECK3-NEXT: br i1 [[IS_ACTIVE_THREAD11]], label [[THEN12:%.*]], label [[ELSE13:%.*]]
+// CHECK3: then12:
+// CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [32 x i32], [32 x i32] addrspace(3)* @__openmp_nvptx_data_transfer_temporary_storage, i64 0, i32 [[NVPTX_TID]]
+// CHECK3-NEXT: [[TMP24:%.*]] = bitcast i32 addrspace(3)* [[TMP23]] to i16 addrspace(3)*
+// CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[TMP4]], i32 0, i32 1
+// CHECK3-NEXT: [[TMP26:%.*]] = load i8*, i8** [[TMP25]], align 4
+// CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8* [[TMP26]] to i16*
+// CHECK3-NEXT: [[TMP28:%.*]] = load volatile i16, i16 addrspace(3)* [[TMP24]], align 2
+// CHECK3-NEXT: store i16 [[TMP28]], i16* [[TMP27]], align 2
+// CHECK3-NEXT: br label [[IFCONT14:%.*]]
+// CHECK3: else13:
+// CHECK3-NEXT: br label [[IFCONT14]]
+// CHECK3: ifcont14:
// CHECK3-NEXT: ret void
//
//
@@ -8099,7 +8099,7 @@ int bar(int n){
// CHECK3-NEXT: store i8* [[TMP11]], i8** [[TMP9]], align 4
// CHECK3-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP12]], i8* [[TMP13]]) #[[ATTR3]]
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP12]], i8* [[TMP13]]) #[[ATTR4]]
// CHECK3-NEXT: ret void
//
//
@@ -8159,6 +8159,6 @@ int bar(int n){
// CHECK3-NEXT: store i8* [[TMP11]], i8** [[TMP9]], align 4
// CHECK3-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
// CHECK3-NEXT: [[TMP13:%.*]] = load i8*, i8** [[DOTADDR2]], align 4
-// CHECK3-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP13]], i8* [[TMP12]]) #[[ATTR3]]
+// CHECK3-NEXT: call void @"_omp$reduction$reduction_func14"(i8* [[TMP13]], i8* [[TMP12]]) #[[ATTR4]]
// CHECK3-NEXT: ret void
//
diff --git a/llvm/include/llvm/Frontend/OpenMP/OMPKinds.def b/llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
index 8e4f7568fb9cc..f5b017608f060 100644
--- a/llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
+++ b/llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
@@ -455,8 +455,6 @@ __OMP_RTL(__kmpc_barrier_simple_generic, false, Void, IdentPtr, Int32)
__OMP_RTL(__kmpc_warp_active_thread_mask, false, Int64,)
__OMP_RTL(__kmpc_syncwarp, false, Void, Int64)
-__OMP_RTL(__kmpc_get_warp_size, false, Int32, )
-
__OMP_RTL(__kmpc_is_generic_main_thread_id, false, Int8, Int32)
__OMP_RTL(__last, false, Void, )
diff --git a/openmp/libomptarget/DeviceRTL/src/Mapping.cpp b/openmp/libomptarget/DeviceRTL/src/Mapping.cpp
index 75a500f39d20a..bece29489a6d1 100644
--- a/openmp/libomptarget/DeviceRTL/src/Mapping.cpp
+++ b/openmp/libomptarget/DeviceRTL/src/Mapping.cpp
@@ -277,10 +277,5 @@ __attribute__((noinline)) uint32_t __kmpc_get_hardware_num_threads_in_block() {
FunctionTracingRAII();
return impl::getNumHardwareThreadsInBlock();
}
-
-__attribute__((noinline)) uint32_t __kmpc_get_warp_size() {
- FunctionTracingRAII();
- return impl::getWarpSize();
-}
}
#pragma omp end declare target
diff --git a/openmp/libomptarget/DeviceRTL/src/Utils.cpp b/openmp/libomptarget/DeviceRTL/src/Utils.cpp
index 8cd633bd53a9f..df574970ba263 100644
--- a/openmp/libomptarget/DeviceRTL/src/Utils.cpp
+++ b/openmp/libomptarget/DeviceRTL/src/Utils.cpp
@@ -24,7 +24,6 @@ namespace _OMP {
__attribute__((used, weak, optnone)) void keepAlive() {
__kmpc_get_hardware_thread_id_in_block();
__kmpc_get_hardware_num_threads_in_block();
- __kmpc_get_warp_size();
__kmpc_barrier_simple_spmd(nullptr, 0);
__kmpc_barrier_simple_generic(nullptr, 0);
}
diff --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
index 3747c87522095..2c6b8886b8ad3 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
@@ -133,11 +133,8 @@ EXTERN int __kmpc_get_hardware_num_threads_in_block() {
__builtin_amdgcn_workgroup_size_x());
}
-EXTERN unsigned __kmpc_get_warp_size() {
- return WARPSIZE;
-}
-
EXTERN unsigned GetWarpId() { return __kmpc_get_hardware_thread_id_in_block() / WARPSIZE; }
+EXTERN unsigned GetWarpSize() { return WARPSIZE; }
EXTERN unsigned GetLaneId() {
return __builtin_amdgcn_mbcnt_hi(~0u, __builtin_amdgcn_mbcnt_lo(~0u, 0u));
}
diff --git a/openmp/libomptarget/deviceRTLs/common/include/target/shuffle.h b/openmp/libomptarget/deviceRTLs/common/include/target/shuffle.h
index ed8d97a7480bf..5841b1102b323 100644
--- a/openmp/libomptarget/deviceRTLs/common/include/target/shuffle.h
+++ b/openmp/libomptarget/deviceRTLs/common/include/target/shuffle.h
@@ -35,7 +35,7 @@ int64_t __kmpc_shuffle_int64(int64_t val, int16_t delta, int16_t size);
///{
extern "C" {
unsigned GetLaneId();
-unsigned __kmpc_get_warp_size();
+unsigned GetWarpSize();
void __kmpc_impl_unpack(uint64_t val, uint32_t &lo, uint32_t &hi);
uint64_t __kmpc_impl_pack(uint32_t lo, uint32_t hi);
}
@@ -60,7 +60,7 @@ int32_t __kmpc_impl_shfl_down_sync(uint64_t Mask, int32_t Var, uint32_t Delta,
inline int32_t __kmpc_impl_shfl_sync(uint64_t Mask, int32_t Var,
int32_t SrcLane) {
- int Width = __kmpc_get_warp_size();
+ int Width = GetWarpSize();
int Self = GetLaneId();
int Index = SrcLane + (Self & ~(Width - 1));
return __builtin_amdgcn_ds_bpermute(Index << 2, Var);
@@ -90,7 +90,7 @@ inline int32_t __kmpc_impl_shfl_sync(uint64_t Mask, int32_t Var,
inline int32_t __kmpc_impl_shfl_down_sync(uint64_t Mask, int32_t Var,
uint32_t Delta, int32_t Width) {
- int32_t T = ((__kmpc_get_warp_size() - Width) << 8) | 0x1f;
+ int32_t T = ((GetWarpSize() - Width) << 8) | 0x1f;
return __nvvm_shfl_sync_down_i32(Mask, Var, Delta, T);
}
diff --git a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
index ee58369cbf6f5..11f017c453445 100644
--- a/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
+++ b/openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
@@ -102,10 +102,10 @@ EXTERN int __kmpc_get_hardware_num_blocks() {
EXTERN int __kmpc_get_hardware_num_threads_in_block() {
return __nvvm_read_ptx_sreg_ntid_x();
}
-EXTERN unsigned __kmpc_get_warp_size() { return WARPSIZE; }
EXTERN unsigned GetWarpId() {
return __kmpc_get_hardware_thread_id_in_block() / WARPSIZE;
}
+EXTERN unsigned GetWarpSize() { return WARPSIZE; }
EXTERN unsigned GetLaneId() {
return __kmpc_get_hardware_thread_id_in_block() & (WARPSIZE - 1);
}
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