[Mlir-commits] [mlir] [mlir][mem2reg] Support whole-buffer vector.load/store promotion (PR #224182)

[llvmlistbot at llvm.org]

cr-zhao wrote:

Hi @banach-space! #217793 extends the existing vector.transfer_read/write support to dynamic subviews and masked accesses, while this PR adds support for whole-buffer vector.load/store accesses at constant zero indices.
By “the limitation in #211880,” I meant the explicit statement under “Scope and known limitations”: “vector.load / vector.store are not supported.” which is decribed in #211880.  This PR addresses that specific limitation.

https://github.com/llvm/llvm-project/pull/224182