[Mlir-commits] [mlir] [mlir][vector] Account for vector.mask in transfer RAW/WAW checks (PR #228328)

[llvmlistbot at llvm.org]

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@@ -607,3 +607,37 @@ func.func @forward_and_eliminate_stores_through_trivial_aliases(
   vector.transfer_write %23, %subview_of_cast[%c0, %c0] {in_bounds = [true, true]} : vector<[8]x[8]xf32>, memref<?x?xf32, strided<[?, 1]>>
   return
 }
+
+// A read under vector.mask gets the padding value in the masked-off lanes, so
+// the stored vector must not be forwarded to it.
+// CHECK-LABEL: func @negative_forward_to_region_masked_read
+//       CHECK:   vector.transfer_write
+//       CHECK:   %[[R:.*]] = vector.mask %{{.*}} { vector.transfer_read
+//       CHECK:   return %[[R]]
+func.func @negative_forward_to_region_masked_read(%arg0: memref<4xf32>,
----------------
Vaisman wrote:

Yes, forwarding is not valid there, the masked-off lanes were not written. Added the opposite memref case in 058887f. 

Note that it is already rejected without this patch, by the dominance check: the write nested in `vector.mask` does not dominate the read after it. The `defWrite.isMasked()` check still keeps `checkSameValueRAW` consistent with its public contract that the write fully writes the data accessed by the read, independently of the current caller's dominance filtering.

https://github.com/llvm/llvm-project/pull/228328