[Mlir-commits] [mlir] [mlir][linalg] Update createWriteOrMaskedWrite (PR #174810)
Andrzej Warzyński
llvmlistbot at llvm.org
Thu Jan 8 06:13:49 PST 2026
banach-space wrote:
Thanks for reviewing!
> How does the load and store look like for the example in the description?
BEFORE
```mlir
%c0_i32 = arith.constant 0 : i32
%c0 = arith.constant 0 : index
%c0_0 = arith.constant 0 : index
%c5 = arith.constant 5 : index
%c1 = arith.constant 1 : index
%1 = vector.create_mask %c5, %c1 : vector<8x1xi1>
%2 = vector.mask %1 { vector.transfer_read %extracted_slice[%c0_0, %c0_0], %c0_i32 {in_bounds = [true, true]} : tensor<5x1xi32>, vector<8x1xi32> } : vector<8x1xi1> -> vector<8x1xi32>
%c0_1 = arith.constant 0 : index
%c0_2 = arith.constant 0 : index
%dim = tensor.dim %0, %c0_2 : tensor<?x3xi32>
%c3 = arith.constant 3 : index
%3 = vector.create_mask %dim, %c3 : vector<8x1xi1>
%4 = vector.mask %3 { vector.transfer_write %2, %0[%c0_1, %c2] {in_bounds = [true, true]} : vector<8x1xi32>, tensor<?x3xi32> } : vector<8x1xi1> -> tensor<?x3xi32>
```
AFTER:
```mlir
%c0_i32 = arith.constant 0 : i32
%c0 = arith.constant 0 : index
%c0_0 = arith.constant 0 : index
%c5 = arith.constant 5 : index
%c1 = arith.constant 1 : index
%1 = vector.create_mask %c5, %c1 : vector<8x1xi1>
%2 = vector.mask %1 { vector.transfer_read %extracted_slice[%c0_0, %c0_0], %c0_i32 {in_bounds = [true, true]} : tensor<5x1xi32>, vector<8x1xi32> } : vector<8x1xi1> -> vector<8x1xi32>
%c0_1 = arith.constant 0 : index
%c0_2 = arith.constant 0 : index
%dim = tensor.dim %0, %c0_2 : tensor<?x3xi32>
%c3 = arith.constant 3 : index
%c1_3 = arith.constant 1 : index
%3 = vector.create_mask %dim, %c1_3 : vector<8x1xi1>
%4 = vector.mask %3 { vector.transfer_write %2, %0[%c0_1, %c2] {in_bounds = [true, true]} : vector<8x1xi32>, tensor<?x3xi32> } : vector<8x1xi1> -> tensor<?x3xi32>
}
```
> The indices should be part of the "base" address computation, right?
Hm, what _address_ and what _computation_? 😅
> Also, does insert slice define OOB insertions?
I didn't find anything: https://mlir.llvm.org/docs/Dialects/TensorOps/#tensorinsert_slice-tensorinsertsliceop
Btw, I haven't looked
https://github.com/llvm/llvm-project/pull/174810
More information about the Mlir-commits
mailing list