[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] Fix missing cache bypass scope on seq_cst buffer fat pointer atomics (PR #213585)

Krzysztof Drewniak llvmlistbot at llvm.org
Tue Aug 25 08:23:49 PDT 2026


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@@ -1166,6 +1166,274 @@ define i32 @dot4_and_mask10_chain_not_add(i32 %x, i32 %y) {
   ret i32 %result
 }
 
+;------------------------------------------------------------------------------
+; NEGATIVE TESTS: ACCUMULATOR WIDER THAN A DOT4 CAN REPRESENT
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krzysz00 wrote:

Unrelated changes?

https://github.com/llvm/llvm-project/pull/213585


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