[Mlir-commits] [mlir] [MLIR][OpenACC] Enable strict property assembly format (PR #217298)
Mehdi Amini
llvmlistbot at llvm.org
Wed Aug 19 05:37:13 PDT 2026
https://github.com/joker-eph updated https://github.com/llvm/llvm-project/pull/217298
>From c91bfe35ba28f7e0a7cd1e4e13dfb00b590830b6 Mon Sep 17 00:00:00 2001
From: Mehdi Amini <joker.eph at gmail.com>
Date: Wed, 6 May 2026 16:10:31 -0700
Subject: [PATCH] [MLIR][OpenACC] Enable strict property assembly format
Enable strict property assembly format mode for the OpenACC dialect. Bind
OpenACC operation properties directly in declarative assembly formats so the
printed syntax stays explicit under strict parsing.
Add small OpenACC attribute helpers for direct loop property clauses, handle
property-only dictionaries where direct bit-enum syntax is ambiguous, and
update tests to use the strict property spelling.
Assisted-by: Codex
---
.../mlir/Dialect/OpenACC/OpenACCBase.td | 1 +
.../mlir/Dialect/OpenACC/OpenACCCGOps.td | 25 +-
.../mlir/Dialect/OpenACC/OpenACCOps.td | 65 ++-
mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp | 30 +-
.../OpenACCToLLVM/init-shutdown-set.mlir | 14 +-
...c-cg-to-gpu-barrier-gang-private-init.mlir | 12 +-
...-gpu-block-redundant-seq-gang-private.mlir | 6 +-
.../acc-cg-to-gpu-block-redundant.mlir | 4 +-
.../acc-cg-to-gpu-bound-routine-call.mlir | 2 +-
.../OpenACC/acc-cg-to-gpu-launch-mapping.mlir | 30 +-
...to-gpu-predicate-region-reuse-barrier.mlir | 8 +-
.../acc-cg-to-gpu-predicate-region.mlir | 6 +-
...g-to-gpu-private-local-gang-redundant.mlir | 6 +-
.../acc-cg-to-gpu-privatize-local.mlir | 4 +-
.../acc-cg-to-gpu-privatize-routine-seq.mlir | 2 +-
...acc-cg-to-gpu-privatize-threadprivate.mlir | 4 +-
.../acc-cg-to-gpu-reduction-array-shared.mlir | 32 +-
.../acc-cg-to-gpu-reduction-array.mlir | 84 ++--
...gpu-reduction-block-combine-no-reload.mlir | 6 +-
...reduction-combine-region-private-dest.mlir | 8 +-
...euse-barrier-sibling-region-privatize.mlir | 4 +-
...e-worker-call-with-thread-y-reduction.mlir | 8 +-
...c-cg-to-gpu-worker-private-dynamic-nw.mlir | 6 +-
...-cg-to-gpu-worker-private-foldable-nw.mlir | 6 +-
...-worker-reduction-combine-mixed-scope.mlir | 18 +-
...cc-cg-to-gpu-worker-reduction-combine.mlir | 24 +-
...cc-cg-to-gpu-worker-reduction-private.mlir | 8 +-
...cg-to-gpu-worker-vector-reuse-barrier.mlir | 6 +-
...g-to-gpu-worker-vector-subgroup-align.mlir | 6 +-
...-compute-lowering-compute-device-type.mlir | 6 +-
.../OpenACC/acc-compute-lowering-compute.mlir | 36 +-
...acc-compute-lowering-loop-device-type.mlir | 4 +-
.../OpenACC/acc-compute-lowering-loop.mlir | 24 +-
.../acc-compute-lowering-unstructured.mlir | 2 +-
.../OpenACC/acc-emit-remarks-data.mlir | 135 +++---
.../acc-emit-remarks-loop-pipeline.mlir | 4 +-
.../OpenACC/acc-emit-remarks-loop.mlir | 12 +-
.../OpenACC/acc-emit-remarks-private.mlir | 20 +-
.../OpenACC/acc-if-clause-lowering.mlir | 14 +-
.../acc-implicit-data-defaultnone.mlir | 4 +-
.../OpenACC/acc-implicit-data-reduction.mlir | 22 +-
.../Dialect/OpenACC/acc-implicit-data.mlir | 64 +--
.../Dialect/OpenACC/acc-implicit-routine.mlir | 2 +-
.../OpenACC/acc-loop-tiling-invalid.mlir | 4 +-
.../OpenACC/acc-loop-tiling-remarks.mlir | 8 +-
.../test/Dialect/OpenACC/acc-loop-tiling.mlir | 30 +-
...terialization-firstprivate-two-allocs.mlir | 4 +-
...c-recipe-materialization-firstprivate.mlir | 2 +-
...recipe-materialization-kernel-private.mlir | 8 +-
.../acc-recipe-materialization-loc.mlir | 12 +-
.../acc-recipe-materialization-parallel.mlir | 2 +-
.../acc-recipe-materialization-private.mlir | 8 +-
.../acc-recipe-materialization-reduction.mlir | 4 +-
.../Dialect/OpenACC/acc-routine-lowering.mlir | 14 +-
.../acc-specialize-for-host-deep-nesting.mlir | 32 +-
.../OpenACC/acc-specialize-for-host.mlir | 20 +-
mlir/test/Dialect/OpenACC/canonicalize.mlir | 6 +-
mlir/test/Dialect/OpenACC/cse.mlir | 4 +-
mlir/test/Dialect/OpenACC/invalid-cg.mlir | 32 +-
mlir/test/Dialect/OpenACC/invalid.mlir | 92 ++--
mlir/test/Dialect/OpenACC/legalize-data.mlir | 20 +-
.../test/Dialect/OpenACC/legalize-serial.mlir | 37 +-
.../Dialect/OpenACC/ops-cg-privatization.mlir | 2 +-
mlir/test/Dialect/OpenACC/ops-cg.mlir | 98 ++---
mlir/test/Dialect/OpenACC/ops.mlir | 408 +++++++++---------
.../OpenACC/region-branchop-interface.mlir | 6 +-
.../OpenACC/support-analysis-varname.mlir | 2 +-
mlir/test/python/dialects/openacc.py | 2 +-
68 files changed, 839 insertions(+), 802 deletions(-)
diff --git a/mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td b/mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
index 5810759c54298..675574547cebc 100644
--- a/mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
+++ b/mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
@@ -19,6 +19,7 @@ include "mlir/IR/AttrTypeBase.td"
def OpenACC_Dialect : Dialect {
let name = "acc";
let useDefaultAttributePrinterParser = 1;
+ let useStrictPropertiesInAssemblyFormat = 1;
let useDefaultTypePrinterParser = 1;
let cppNamespace = "::mlir::acc";
let dependentDialects = ["::mlir::memref::MemRefDialect",
diff --git a/mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td b/mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
index 730ea1f73a3ac..b6aa6e1525390 100644
--- a/mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
+++ b/mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
@@ -170,7 +170,7 @@ def OpenACC_ReductionAccumulateOp
}
} {acc.par_dims = #acc<par_dims[thread_x]>}
acc.reduction_accumulate %partial to %private <add>
- : i32 -> memref<i32> {par_dims = #acc<par_dims[thread_x]>}
+ : i32 -> memref<i32> <{par_dims = #acc<par_dims[thread_x]>}>
acc.reduction_combine %private into %shared <add> : memref<i32>
{acc.par_dims = #acc<par_dims[thread_x]>}
```
@@ -182,7 +182,8 @@ def OpenACC_ReductionAccumulateOp
OpenACC_ReductionOperatorAttr:$reductionOperator,
OpenACC_GPUParallelDimsAttr:$par_dims);
let assemblyFormat = [{
- $value `to` $memref $reductionOperator `:` type($value) `->` type($memref) attr-dict
+ $value `to` $memref $reductionOperator `:` type($value) `->`
+ type($memref) prop-dict attr-dict
}];
let hasVerifier = 1;
}
@@ -205,7 +206,8 @@ def OpenACC_ReductionAccumulateArrayOp
OpenACC_ReductionOperatorAttr:$reductionOperator,
OpenACC_GPUParallelDimsAttr:$par_dims);
let assemblyFormat = [{
- $memref `bounds` `(` $bounds `)` $reductionOperator `:` type($memref) attr-dict
+ $memref `bounds` `(` $bounds `)` $reductionOperator `:`
+ type($memref) prop-dict attr-dict
}];
let hasVerifier = 1;
}
@@ -409,17 +411,17 @@ def OpenACC_ParWidthOp
```mlir
// Known width from SSA value
- %w1 = acc.par_width %vector_len {par_dim = #acc.par_dim<thread_x>}
+ %w1 = acc.par_width %vector_len par_dim(#acc.par_dim<thread_x>)
// Unknown width (to be computed later)
- %w2 = acc.par_width {par_dim = #acc.par_dim<block_x>}
+ %w2 = acc.par_width par_dim(#acc.par_dim<block_x>)
```
}];
let arguments = (ins Optional<Index>:$launchArg,
OpenACC_GPUParallelDimAttr:$par_dim);
let results = (outs Index:$output);
let assemblyFormat = [{
- ($launchArg^)? attr-dict
+ ($launchArg^)? `par_dim` `(` qualified($par_dim) `)` attr-dict
}];
}
@@ -482,10 +484,10 @@ def OpenACC_GPUSharedMemoryOp : OpenACC_Op<"gpu_shared_memory"> {
```mlir
%sz = arith.constant 128 : index
%cache = acc.gpu_shared_memory(%sz)
- {num_copies = 1 : i64,
+ <{num_copies = 1 : i64,
static_upper_bound_bytes = 1560 : i64,
dynamic_shared_memory_scaling_bytes = 12 : i64,
- dynamic_shared_memory_fixed_bytes = 24 : i64}
+ dynamic_shared_memory_fixed_bytes = 24 : i64}>
: (index) -> memref<?xf32, #gpu.address_space<workgroup>>
```
}];
@@ -499,7 +501,8 @@ def OpenACC_GPUSharedMemoryOp : OpenACC_Op<"gpu_shared_memory"> {
let results = (outs Res<AnyMemRef, "", [MemAlloc<DefaultResource, 0,
FullEffect>]>:$result);
let assemblyFormat = [{
- (`(` $dynamic_sizes^ `)`)? attr-dict `:` functional-type(operands, results)
+ (`(` $dynamic_sizes^ `)`)? prop-dict attr-dict
+ `:` functional-type(operands, results)
}];
let builders = [
OpBuilder<(ins "::mlir::Type":$resultType,
@@ -573,8 +576,8 @@ def OpenACC_ComputeRegionOp
Example:
```mlir
- %w0 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
- %w1 = acc.par_width %c8 {par_dim = #acc.par_dim<block_x>}
+ %w0 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
+ %w1 = acc.par_width %c8 par_dim(#acc.par_dim<block_x>)
acc.compute_region launch(%arg0 = %w0, %arg1 = %w1)
ins(%arg2 = %data) : (memref<1024xf32>) {
%c0 = arith.constant 0 : index
diff --git a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
index db2f0e0605db5..aab852d735042 100644
--- a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
+++ b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
@@ -594,7 +594,7 @@ def OpenACC_DataBoundsOp : OpenACC_Op<"bounds",
| `extent` `(` $extent `:` type($extent) `)`
| `stride` `(` $stride `:` type($stride) `)`
| `startIdx` `(` $startIdx `:` type($startIdx) `)`
- ) attr-dict
+ ) (`strideInBytes` `(` $strideInBytes^ `)`)? attr-dict
}];
let hasVerifier = 1;
@@ -817,7 +817,11 @@ class OpenACC_DataEntryOp<string mnemonic, string clause,
| `async` `` custom<DeviceTypeOperandsWithKeywordOnly>($asyncOperands,
type($asyncOperands), $asyncOperandsDeviceType, $asyncOnly)
| `recipe` `(` custom<RecipeSym>($recipe) `)`
- ) `->` type($accVar) attr-dict
+ | `dataClause` `(` qualified($dataClause) `)`
+ | `structured` `(` $structured `)`
+ | `implicit` `(` $implicit `)`
+ | `name` `(` $name `)`
+ ) prop-dict `->` type($accVar) attr-dict
}];
let hasVerifier = 1;
@@ -1206,7 +1210,13 @@ class OpenACC_DataExitOpWithVarPtr<string mnemonic, string clause>
(`async` `` custom<DeviceTypeOperandsWithKeywordOnly>($asyncOperands,
type($asyncOperands), $asyncOperandsDeviceType, $asyncOnly)^)?
`to` custom<Var>($var) `:` custom<VarPtrType>(type($var), $varType)
- attr-dict
+ oilist(
+ `dataClause` `(` qualified($dataClause) `)`
+ | `structured` `(` $structured `)`
+ | `implicit` `(` $implicit `)`
+ | `name` `(` $name `)`
+ )
+ prop-dict attr-dict
}];
let builders = [
@@ -1278,7 +1288,13 @@ class OpenACC_DataExitOpNoVarPtr<string mnemonic, string clause>
(`bounds` `(` $bounds^ `)` )?
(`async` `` custom<DeviceTypeOperandsWithKeywordOnly>($asyncOperands,
type($asyncOperands), $asyncOperandsDeviceType, $asyncOnly)^)?
- attr-dict
+ oilist(
+ `dataClause` `(` qualified($dataClause) `)`
+ | `structured` `(` $structured `)`
+ | `implicit` `(` $implicit `)`
+ | `name` `(` $name `)`
+ )
+ prop-dict attr-dict
}];
let builders = [
@@ -1925,7 +1941,12 @@ def OpenACC_ParallelOp
| `if` `(` $ifCond `)`
| `reduction` `(` $reductionOperands `:` type($reductionOperands) `)`
)
- $region attr-dict-with-keyword
+ $region
+ oilist(
+ `defaultAttr` `(` qualified($defaultAttr) `)`
+ | `selfAttr` $selfAttr
+ )
+ attr-dict-with-keyword
}];
let hasVerifier = 1;
@@ -2067,7 +2088,12 @@ def OpenACC_SerialOp
| `if` `(` $ifCond `)`
| `reduction` `(` $reductionOperands `:` type($reductionOperands) `)`
)
- $region attr-dict-with-keyword
+ $region
+ oilist(
+ `defaultAttr` `(` qualified($defaultAttr) `)`
+ | `selfAttr` $selfAttr
+ )
+ attr-dict-with-keyword
}];
let hasVerifier = 1;
@@ -2258,7 +2284,12 @@ def OpenACC_KernelsOp
| `if` `(` $ifCond `)`
| `reduction` `(` $reductionOperands `:` type($reductionOperands) `)`
)
- $region attr-dict-with-keyword
+ $region
+ oilist(
+ `defaultAttr` `(` qualified($defaultAttr) `)`
+ | `selfAttr` $selfAttr
+ )
+ attr-dict-with-keyword
}];
let hasVerifier = 1;
@@ -2374,7 +2405,9 @@ def OpenACC_DataOp
$waitOperandsDeviceType, $waitOperandsSegments, $hasWaitDevnum,
$waitOnly)
)
- $region attr-dict-with-keyword
+ $region
+ (`defaultAttr` `(` qualified($defaultAttr)^ `)`)?
+ attr-dict-with-keyword
}];
let hasVerifier = 1;
}
@@ -2534,6 +2567,7 @@ def OpenACC_ExitDataOp : OpenACC_Op<"exit_data",
| `wait` `` custom<OperandsWithKeywordOnly>($waitOperands,
type($waitOperands), $wait)
| `dataOperands` `(` $dataClauseOperands `:` type($dataClauseOperands) `)`
+ | `finalize` $finalize
)
attr-dict-with-keyword
}];
@@ -2579,7 +2613,7 @@ def OpenACC_HostDataOp
`if` `(` $ifCond `)`
| `dataOperands` `(` $dataClauseOperands `:` type($dataClauseOperands) `)`
)
- $region attr-dict-with-keyword
+ $region (`ifPresent` $ifPresent^)? attr-dict-with-keyword
}];
let hasVerifier = 1;
@@ -2876,6 +2910,15 @@ def OpenACC_LoopOp
custom<LoopControl>($region, $lowerbound, type($lowerbound), $upperbound,
type($upperbound), $step, type($step))
( `(` type($results)^ `)` )?
+ oilist(
+ `inclusiveUpperbound` `(` custom<DenseBoolArrayAttr>($inclusiveUpperbound) `)`
+ | `collapse` `(` custom<ArrayAttr>($collapse) `)`
+ | `collapseDeviceType` `(` custom<ArrayAttr>($collapseDeviceType) `)`
+ | `seq` custom<DeviceTypeArrayAttr>($seq)
+ | `independent` custom<DeviceTypeArrayAttr>($independent)
+ | `auto_` custom<DeviceTypeArrayAttr>($auto_)
+ | `unstructured` $unstructured
+ )
attr-dict-with-keyword
}];
@@ -3506,6 +3549,7 @@ def OpenACC_InitOp : OpenACC_Op<"init", [AttrSizedOperandSegments]> {
let assemblyFormat = [{
oilist(`device_num` `(` $deviceNum `:` type($deviceNum) `)`
| `if` `(` $ifCond `)`
+ | `device_types` `(` qualified($device_types) `)`
) attr-dict-with-keyword
}];
let hasVerifier = 1;
@@ -3542,6 +3586,7 @@ def OpenACC_ShutdownOp : OpenACC_Op<"shutdown", [AttrSizedOperandSegments]> {
let assemblyFormat = [{
oilist(`device_num` `(` $deviceNum `:` type($deviceNum) `)`
|`if` `(` $ifCond `)`
+ | `device_types` `(` qualified($device_types) `)`
) attr-dict-with-keyword
}];
let hasVerifier = 1;
@@ -3574,6 +3619,7 @@ def OpenACC_SetOp : OpenACC_Op<"set", [AttrSizedOperandSegments,
oilist(`default_async` `(` $defaultAsync `:` type($defaultAsync) `)`
| `device_num` `(` $deviceNum `:` type($deviceNum) `)`
| `if` `(` $ifCond `)`
+ | `device_type` `(` qualified($device_type) `)`
) attr-dict-with-keyword
}];
let hasVerifier = 1;
@@ -3678,6 +3724,7 @@ def OpenACC_UpdateOp : OpenACC_Op<"update",
$waitOperandsDeviceType, $waitOperandsSegments, $hasWaitDevnum,
$waitOnly)
| `dataOperands` `(` $dataClauseOperands `:` type($dataClauseOperands) `)`
+ | `ifPresent` $ifPresent
)
attr-dict-with-keyword
}];
diff --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
index cdf34234f06df..f4f204f9452fd 100644
--- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
@@ -940,6 +940,26 @@ static void printRecipeSym(mlir::OpAsmPrinter &p, mlir::Operation *op,
p << recipeAttr;
}
+static ParseResult parseDenseBoolArrayAttr(mlir::OpAsmParser &parser,
+ mlir::DenseBoolArrayAttr &attr) {
+ return parser.parseAttribute(attr);
+}
+
+static void printDenseBoolArrayAttr(mlir::OpAsmPrinter &p, mlir::Operation *op,
+ mlir::DenseBoolArrayAttr attr) {
+ p << attr;
+}
+
+static ParseResult parseArrayAttr(mlir::OpAsmParser &parser,
+ mlir::ArrayAttr &attr) {
+ return parser.parseAttribute(attr);
+}
+
+static void printArrayAttr(mlir::OpAsmPrinter &p, mlir::Operation *op,
+ mlir::ArrayAttr attr) {
+ p << attr;
+}
+
//===----------------------------------------------------------------------===//
// DataBoundsOp
//===----------------------------------------------------------------------===//
@@ -2715,11 +2735,17 @@ static ParseResult parseDeviceTypeOperandsWithKeywordOnly(
return failure();
if (parser.parseRSquare())
return failure();
+ keywordOnlyDeviceType =
+ ArrayAttr::get(parser.getContext(), keywordOnlyDeviceTypeAttributes);
needCommaBeforeOperands = true;
}
- if (needCommaBeforeOperands && failed(parser.parseComma()))
- return failure();
+ if (needCommaBeforeOperands) {
+ if (succeeded(parser.parseOptionalRParen()))
+ return success();
+ if (failed(parser.parseComma()))
+ return failure();
+ }
llvm::SmallVector<DeviceTypeAttr> attributes;
if (failed(parser.parseCommaSeparatedList([&]() {
diff --git a/mlir/test/Conversion/OpenACCToLLVM/init-shutdown-set.mlir b/mlir/test/Conversion/OpenACCToLLVM/init-shutdown-set.mlir
index cb522d71d2b94..babb4abf1d5e2 100644
--- a/mlir/test/Conversion/OpenACCToLLVM/init-shutdown-set.mlir
+++ b/mlir/test/Conversion/OpenACCToLLVM/init-shutdown-set.mlir
@@ -31,10 +31,10 @@
module {
func.func @test_init_shutdown() {
%c2_i32 = arith.constant 2 : i32
- acc.init device_num(%c2_i32 : i32) attributes {device_types = [#acc.device_type<nvidia>]}
- acc.shutdown device_num(%c2_i32 : i32) attributes {device_types = [#acc.device_type<nvidia>]}
- acc.init attributes {device_types = [#acc.device_type<nvidia>, #acc.device_type<host>]}
- acc.shutdown attributes {device_types = [#acc.device_type<nvidia>, #acc.device_type<host>]}
+ acc.init device_num(%c2_i32 : i32) device_types([#acc.device_type<nvidia>])
+ acc.shutdown device_num(%c2_i32 : i32) device_types([#acc.device_type<nvidia>])
+ acc.init device_types([#acc.device_type<nvidia>, #acc.device_type<host>])
+ acc.shutdown device_types([#acc.device_type<nvidia>, #acc.device_type<host>])
acc.init device_num(%c2_i32 : i32)
acc.shutdown device_num(%c2_i32 : i32)
acc.init
@@ -54,7 +54,7 @@ module {
func.func @test_set() {
%c0_i32 = arith.constant 0 : i32
%c1_i32 = arith.constant 1 : i32
- acc.set default_async(%c1_i32 : i32) device_num(%c0_i32 : i32) attributes {device_type = #acc.device_type<nvidia>}
+ acc.set default_async(%c1_i32 : i32) device_num(%c0_i32 : i32) device_type(#acc.device_type<nvidia>)
return
}
}
@@ -67,7 +67,7 @@ module {
module {
func.func @test_set_device_type() {
- acc.set attributes {device_type = #acc.device_type<host>}
+ acc.set device_type(#acc.device_type<host>)
return
}
}
@@ -83,7 +83,7 @@ module {
module {
func.func @test_if(%cond: i1) {
- acc.init if(%cond) attributes {device_types = [#acc.device_type<nvidia>]}
+ acc.init if(%cond) device_types([#acc.device_type<nvidia>])
return
}
}
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-barrier-gang-private-init.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-barrier-gang-private-init.mlir
index dc77d77e61a7e..32e5759b2fb62 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-barrier-gang-private-init.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-barrier-gang-private-init.mlir
@@ -14,9 +14,9 @@ func.func @test_gang_private_init_barrier(%arg0: memref<100x100xf32>) {
%c10 = arith.constant 10 : index
%c8 = arith.constant 8 : index
%c100 = arith.constant 100 : index
- %12 = acc.copyin varPtr(%arg0 : memref<100x100xf32>) -> memref<100x100xf32> {dataClause = #acc<data_clause acc_copy>, name = "gp"}
- %13 = acc.par_width %c10 {par_dim = #acc.par_dim<block_x>}
- %14 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %12 = acc.copyin varPtr(%arg0 : memref<100x100xf32>) dataClause(acc_copy) name("gp") -> memref<100x100xf32>
+ %13 = acc.par_width %c10 par_dim(#acc.par_dim<block_x>)
+ %14 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment dataOperands(%12 : memref<100x100xf32>) {
%15 = acc.privatize [#acc<par_dims[block_x]>] : () -> !acc.private_type<memref<8xf32>>
acc.compute_region launch(%arg1 = %13, %arg2 = %14) ins(%arg10 = %12, %arg11 = %15) : (memref<100x100xf32>, !acc.private_type<memref<8xf32>>) {
@@ -67,9 +67,9 @@ func.func @test_thread_private_init_no_barrier(%arg0: memref<100x100xf32>) {
%c10 = arith.constant 10 : index
%c8 = arith.constant 8 : index
%c100 = arith.constant 100 : index
- %12 = acc.copyin varPtr(%arg0 : memref<100x100xf32>) -> memref<100x100xf32> {dataClause = #acc<data_clause acc_copy>, name = "gp"}
- %13 = acc.par_width %c10 {par_dim = #acc.par_dim<block_x>}
- %14 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %12 = acc.copyin varPtr(%arg0 : memref<100x100xf32>) dataClause(acc_copy) name("gp") -> memref<100x100xf32>
+ %13 = acc.par_width %c10 par_dim(#acc.par_dim<block_x>)
+ %14 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment dataOperands(%12 : memref<100x100xf32>) {
%15 = acc.privatize [#acc<par_dims[block_x, thread_x]>] : () -> !acc.private_type<memref<8xf32>>
acc.compute_region launch(%arg1 = %13, %arg2 = %14) ins(%arg10 = %12, %arg11 = %15) : (memref<100x100xf32>, !acc.private_type<memref<8xf32>>) {
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant-seq-gang-private.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant-seq-gang-private.mlir
index 8f677f84326da..1a065a9ec51b1 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant-seq-gang-private.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant-seq-gang-private.mlir
@@ -14,9 +14,9 @@
func.func @block_redundant_seq_gang_private(%arg0: memref<32xi32>) {
%c32_pw = arith.constant 32 : index
%c1_pw = arith.constant 1 : index
- %par_bx = acc.par_width %c32_pw {par_dim = #acc.par_dim<block_x>}
- %par_ty = acc.par_width %c1_pw {par_dim = #acc.par_dim<thread_y>}
- %par_tx = acc.par_width %c32_pw {par_dim = #acc.par_dim<thread_x>}
+ %par_bx = acc.par_width %c32_pw par_dim(#acc.par_dim<block_x>)
+ %par_ty = acc.par_width %c1_pw par_dim(#acc.par_dim<thread_y>)
+ %par_tx = acc.par_width %c32_pw par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%priv = acc.privatize : () -> !acc.private_type<memref<32xi32>>
acc.compute_region launch(%grid = %par_bx, %worker = %par_ty, %block = %par_tx)
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant.mlir
index 0f35ec92256e7..ff60f7a14c625 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-block-redundant.mlir
@@ -16,8 +16,8 @@
func.func @block_redundant_vector_no_predicate(%arg0: memref<32xi32>) {
%c32 = arith.constant 32 : index
- %par_bx = acc.par_width %c32 {par_dim = #acc.par_dim<block_x>}
- %par_tx = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %par_bx = acc.par_width %c32 par_dim(#acc.par_dim<block_x>)
+ %par_tx = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
acc.compute_region launch(%grid = %par_bx, %block = %par_tx)
ins(%arg10 = %arg0) : (memref<32xi32>) {
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-bound-routine-call.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-bound-routine-call.mlir
index c55f87b73d181..9e7abc40d5fa3 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-bound-routine-call.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-bound-routine-call.mlir
@@ -11,7 +11,7 @@
// CHECK: func.call @bound_vector
func.func @bound_vector_call(%arg0: memref<4xf32>) {
%c32 = arith.constant 32 : index
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%tx = %thread_x) ins(%arg10 = %arg0) : (memref<4xf32>) {
acc.predicate_region {
func.call @wrapped_vector(%arg10) : (memref<4xf32>) -> ()
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir
index 54b6b19529caf..feb1f1e29e270 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir
@@ -133,8 +133,8 @@ func.func @par2_1_loop() {
// CHECK: scf.parallel (%[[iv2:.*]]) = (%[[c1]]) to (%[[c4:.*]]) step (%[[c1]])
// CHECK: arith.addi %[[iv2]], %[[tidx]]
func.func @par2_0_1_loop() {
- %par_dim1 = acc.par_width {par_dim = #acc.par_dim<thread_x>}
- %par_dim2 = acc.par_width {par_dim = #acc.par_dim<thread_y>}
+ %par_dim1 = acc.par_width par_dim(#acc.par_dim<thread_x>)
+ %par_dim2 = acc.par_width par_dim(#acc.par_dim<thread_y>)
acc.compute_region launch(%arg0 = %par_dim1, %arg1 = %par_dim2) {
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
@@ -188,7 +188,7 @@ func.func @empty() {
// CHECK-SAME: in (%[[bdimx:[a-z0-9_]+]] = %[[bdimx_val]], %[[bdimy:[a-z0-9_]+]] = %[[bdimy_val:[a-z0-9_]+]], %[[bdimz:[a-z0-9_]+]] = %[[bdimz_val:[a-z0-9_]+]])
func.func @empty_some_known_launch_arg() {
%c32 = arith.constant 32 : index
- %par_dim1 = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %par_dim1 = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %par_dim1) {
acc.yield
} {origin = "acc.parallel"}
@@ -223,12 +223,12 @@ func.func @empty_all_known_launch_arg() {
%c32 = arith.constant 32 : index
%c128 = arith.constant 128 : index
- %par_dim1 = acc.par_width %c2 {par_dim = #acc.par_dim<thread_x>}
- %par_dim2 = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %par_dim3 = acc.par_width %c8 {par_dim = #acc.par_dim<thread_z>}
- %par_dim4 = acc.par_width %c16 {par_dim = #acc.par_dim<block_x>}
- %par_dim5 = acc.par_width %c32 {par_dim = #acc.par_dim<block_y>}
- %par_dim6 = acc.par_width %c128 {par_dim = #acc.par_dim<block_z>}
+ %par_dim1 = acc.par_width %c2 par_dim(#acc.par_dim<thread_x>)
+ %par_dim2 = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %par_dim3 = acc.par_width %c8 par_dim(#acc.par_dim<thread_z>)
+ %par_dim4 = acc.par_width %c16 par_dim(#acc.par_dim<block_x>)
+ %par_dim5 = acc.par_width %c32 par_dim(#acc.par_dim<block_y>)
+ %par_dim6 = acc.par_width %c128 par_dim(#acc.par_dim<block_z>)
acc.compute_region launch(%tx = %par_dim1, %ty = %par_dim2, %tz = %par_dim3, %bx = %par_dim4, %by = %par_dim5, %bz = %par_dim6) {
acc.yield
} {origin = "acc.parallel"}
@@ -252,12 +252,12 @@ func.func @using_block_args(%arr : memref<?xf32>) {
%c32_pw = arith.constant 32 : index
%c128_pw = arith.constant 128 : index
- %par_dim1 = acc.par_width %c2_pw {par_dim = #acc.par_dim<thread_x>}
- %par_dim2 = acc.par_width %c4_pw {par_dim = #acc.par_dim<thread_y>}
- %par_dim3 = acc.par_width %c8_pw {par_dim = #acc.par_dim<thread_z>}
- %par_dim4 = acc.par_width %c16_pw {par_dim = #acc.par_dim<block_x>}
- %par_dim5 = acc.par_width %c32_pw {par_dim = #acc.par_dim<block_y>}
- %par_dim6 = acc.par_width %c128_pw {par_dim = #acc.par_dim<block_z>}
+ %par_dim1 = acc.par_width %c2_pw par_dim(#acc.par_dim<thread_x>)
+ %par_dim2 = acc.par_width %c4_pw par_dim(#acc.par_dim<thread_y>)
+ %par_dim3 = acc.par_width %c8_pw par_dim(#acc.par_dim<thread_z>)
+ %par_dim4 = acc.par_width %c16_pw par_dim(#acc.par_dim<block_x>)
+ %par_dim5 = acc.par_width %c32_pw par_dim(#acc.par_dim<block_y>)
+ %par_dim6 = acc.par_width %c128_pw par_dim(#acc.par_dim<block_z>)
acc.compute_region launch(%tx = %par_dim1, %ty = %par_dim2, %tz = %par_dim3, %bx = %par_dim4, %by = %par_dim5, %bz = %par_dim6) ins(%arg10 = %arr) : (memref<?xf32>) {
%c0 = arith.constant 0 : index
%c2 = arith.constant 2 : index
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
index 891ad37e39ab7..5b74193ed9d90 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
@@ -17,8 +17,8 @@
func.func @reuse_barrier_in_block_seq_loop() {
%c256_pw = arith.constant 256 : index
%c1024_pw = arith.constant 1024 : index
- %par_bx = acc.par_width %c256_pw {par_dim = #acc.par_dim<block_x>}
- %par_tx = acc.par_width %c1024_pw {par_dim = #acc.par_dim<thread_x>}
+ %par_bx = acc.par_width %c256_pw par_dim(#acc.par_dim<block_x>)
+ %par_tx = acc.par_width %c1024_pw par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%priv0 = acc.privatize : () -> !acc.private_type<memref<i64>>
acc.compute_region launch(%grid = %par_bx, %block = %par_tx) ins(%arg10 = %priv0) : (!acc.private_type<memref<i64>>) {
@@ -56,8 +56,8 @@ func.func @reuse_barrier_in_block_seq_loop() {
func.func @no_reuse_barrier_outside_seq_loop() {
%c256_pw = arith.constant 256 : index
%c1024_pw = arith.constant 1024 : index
- %par_bx = acc.par_width %c256_pw {par_dim = #acc.par_dim<block_x>}
- %par_tx = acc.par_width %c1024_pw {par_dim = #acc.par_dim<thread_x>}
+ %par_bx = acc.par_width %c256_pw par_dim(#acc.par_dim<block_x>)
+ %par_tx = acc.par_width %c1024_pw par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%priv0 = acc.privatize : () -> !acc.private_type<memref<i64>>
acc.compute_region launch(%grid = %par_bx, %block = %par_tx) ins(%arg10 = %priv0) : (!acc.private_type<memref<i64>>) {
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region.mlir
index 8fc9832424222..a4c9a17a9d313 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region.mlir
@@ -7,9 +7,9 @@
func.func @predicate_region_reduction(%arg0: memref<i32>) {
%c1 = arith.constant 1 : index
- %0 = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %1 = acc.par_width %c1 {par_dim = #acc.par_dim<thread_y>}
- %2 = acc.par_width %c1 {par_dim = #acc.par_dim<thread_x>}
+ %0 = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %1 = acc.par_width %c1 par_dim(#acc.par_dim<thread_y>)
+ %2 = acc.par_width %c1 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
acc.compute_region launch(%arg1 = %0, %arg2 = %1, %arg3 = %2) ins(%arg10 = %arg0) : (memref<i32>) {
%c0_i32 = arith.constant 0 : i32
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-private-local-gang-redundant.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-private-local-gang-redundant.mlir
index 1fb4b444fe5c8..04b052eed9aee 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-private-local-gang-redundant.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-private-local-gang-redundant.mlir
@@ -15,9 +15,9 @@
func.func @gang_redundant_worker_private() {
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
- %0 = acc.par_width %c4 {par_dim = #acc.par_dim<block_x>}
- %1 = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %2 = acc.par_width %c1 {par_dim = #acc.par_dim<thread_x>}
+ %0 = acc.par_width %c4 par_dim(#acc.par_dim<block_x>)
+ %1 = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %2 = acc.par_width %c1 par_dim(#acc.par_dim<thread_x>)
%3 = acc.privatize [#acc<par_dims[thread_y]>] : () -> !acc.private_type<memref<1xi32>>
acc.kernel_environment {
acc.compute_region launch(%arg0 = %0, %arg1 = %1, %arg2 = %2) ins(%arg10 = %3) : (!acc.private_type<memref<1xi32>>) {
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-local.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-local.mlir
index 9ac5385ec9674..7f33c01c1a768 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-local.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-local.mlir
@@ -10,8 +10,8 @@ module attributes {gpu.container_module} {
gpu.func @test()
attributes {acc.specialized_routine = #acc.specialized_routine<@test_routine, <worker>, "test">} {
%c1 = arith.constant 1 : index
- %1 = acc.par_width %c1 {par_dim = #acc.par_dim<thread_x>}
- %2 = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
+ %1 = acc.par_width %c1 par_dim(#acc.par_dim<thread_x>)
+ %2 = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
%4 = acc.privatize : () -> !acc.private_type<memref<4xi8>>
acc.compute_region launch(%arg3 = %1, %arg4 = %2) ins(%arg10 = %4) : (!acc.private_type<memref<4xi8>>) {
%8 = acc.private_local %arg10 : (!acc.private_type<memref<4xi8>>) -> memref<f32>
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-routine-seq.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-routine-seq.mlir
index 2f67033adc03d..422c38fb29c73 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-routine-seq.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-routine-seq.mlir
@@ -22,7 +22,7 @@ module attributes {gpu.container_module} {
gpu.func @seq_routine()
attributes {acc.specialized_routine = #acc.specialized_routine<@routine_seq, <seq>, "seq_routine">} {
%c1 = arith.constant 1 : index
- %0 = acc.par_width %c1 {par_dim = #acc.par_dim<sequential>}
+ %0 = acc.par_width %c1 par_dim(#acc.par_dim<sequential>)
// CHECK: memref.alloca() : memref<10xi32>
// CHECK-NOT: memref.store {{.*}} #gpu.address_space<workgroup>
%1 = acc.privatize : () -> !acc.private_type<memref<10xi32>>
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir
index a92ff8bcd1be6..86cdff10a7b8c 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir
@@ -37,8 +37,8 @@ func.func @threadprivate(%host: memref<i32>) {
func.func @dynamic_threadprivate(%n: index) {
%c4 = arith.constant 4 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c4 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c4 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
%private = acc.privatize(%n) [#acc<par_dims[block_x, thread_x]>]
: (index) -> !acc.private_type<memref<?xi32>>
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array-shared.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array-shared.mlir
index dfd092003b4f4..1fd649f61d230 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array-shared.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array-shared.mlir
@@ -16,12 +16,12 @@
// CHECK-NOT: acc.bounds
func.func @array_reduction_shared(%arg0: memref<8192xi32>) {
- %0 = acc.copyin varPtr(%arg0 : memref<8192xi32>) -> memref<8192xi32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "r"}
+ %0 = acc.copyin varPtr(%arg0 : memref<8192xi32>) dataClause(acc_reduction) implicit(true) name("r") -> memref<8192xi32>
acc.kernel_environment dataOperands(%0 : memref<8192xi32>) {
%c1_pw = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1_pw {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1_pw par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%arg2 = %0) : (memref<8192xi32>) {
%c8192 = arith.constant 8192 : index
%c0_i32 = arith.constant 0 : i32
@@ -46,7 +46,7 @@ func.func @array_reduction_shared(%arg0: memref<8192xi32>) {
scf.reduce
} {acc.par_dims = #acc<par_dims[block_x]>}
%b = acc.bounds extent(%c8192 : index)
- acc.reduction_accumulate_array %2 bounds(%b) <add> : memref<8192xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate_array %2 bounds(%b) <add> : memref<8192xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.reduction_combine_region %2 into %arg2 : memref<8192xi32> {
scf.for %i = %c0 to %c8192 step %c1 {
%3 = memref.load %2[%i] : memref<8192xi32>
@@ -58,7 +58,7 @@ func.func @array_reduction_shared(%arg0: memref<8192xi32>) {
acc.yield
} {origin = "acc.parallel"}
}
- acc.copyout accPtr(%0 : memref<8192xi32>) to varPtr(%arg0 : memref<8192xi32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "r"}
+ acc.copyout accPtr(%0 : memref<8192xi32>) to varPtr(%arg0 : memref<8192xi32>) dataClause(acc_reduction) implicit(true) name("r")
return
}
@@ -72,12 +72,12 @@ func.func @array_reduction_shared(%arg0: memref<8192xi32>) {
// CHECK-NOT: acc.reduction_accumulate_array
func.func @array_reduction_shared_partitioned(%arg0: memref<8192xi32>) {
- %0 = acc.copyin varPtr(%arg0 : memref<8192xi32>) -> memref<8192xi32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "r"}
+ %0 = acc.copyin varPtr(%arg0 : memref<8192xi32>) dataClause(acc_reduction) implicit(true) name("r") -> memref<8192xi32>
acc.kernel_environment dataOperands(%0 : memref<8192xi32>) {
%c1_pw = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1_pw {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1_pw par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%arg2 = %0) : (memref<8192xi32>) {
%c8192 = arith.constant 8192 : index
%c0_i32 = arith.constant 0 : i32
@@ -102,7 +102,7 @@ func.func @array_reduction_shared_partitioned(%arg0: memref<8192xi32>) {
scf.reduce
} {acc.par_dims = #acc<par_dims[block_x]>}
%b = acc.bounds extent(%c8192 : index)
- acc.reduction_accumulate_array %2 bounds(%b) <add> : memref<8192xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate_array %2 bounds(%b) <add> : memref<8192xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.reduction_combine_region %2 into %arg2 : memref<8192xi32> {
scf.for %i = %c0 to %c8192 step %c1 {
%3 = memref.load %2[%i] : memref<8192xi32>
@@ -114,7 +114,7 @@ func.func @array_reduction_shared_partitioned(%arg0: memref<8192xi32>) {
acc.yield
} {origin = "acc.parallel"}
}
- acc.copyout accPtr(%0 : memref<8192xi32>) to varPtr(%arg0 : memref<8192xi32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "r"}
+ acc.copyout accPtr(%0 : memref<8192xi32>) to varPtr(%arg0 : memref<8192xi32>) dataClause(acc_reduction) implicit(true) name("r")
return
}
@@ -130,14 +130,14 @@ func.func @array_reduction_shared_partitioned(%arg0: memref<8192xi32>) {
// CHECK-NOT: acc.reduction_accumulate_array
func.func @array_reduction_gang_storage_thread_accum(%arg0: memref<4xi32>) {
- %0 = acc.copyin varPtr(%arg0 : memref<4xi32>) -> memref<4xi32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "r"}
+ %0 = acc.copyin varPtr(%arg0 : memref<4xi32>) dataClause(acc_reduction) implicit(true) name("r") -> memref<4xi32>
acc.kernel_environment dataOperands(%0 : memref<4xi32>) {
%c2 = arith.constant 2 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %bx = acc.par_width %c2 {par_dim = #acc.par_dim<block_x>}
- %wy = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %tx = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c2 par_dim(#acc.par_dim<block_x>)
+ %wy = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %tx = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
%private = acc.privatize [#acc<par_dims[block_x]>] : () -> !acc.private_type<memref<4xi32>>
acc.compute_region launch(%kbx = %bx, %kwy = %wy, %ktx = %tx) ins(%arg2 = %0, %priv = %private) : (memref<4xi32>, !acc.private_type<memref<4xi32>>) {
%c0 = arith.constant 0 : index
@@ -157,12 +157,12 @@ func.func @array_reduction_gang_storage_thread_accum(%arg0: memref<4xi32>) {
scf.reduce
} {acc.par_dims = #acc<par_dims[thread_y]>}
%b = acc.bounds extent(%c4_idx : index)
- acc.reduction_accumulate_array %local bounds(%b) <add> : memref<4xi32> {par_dims = #acc<par_dims[thread_y]>}
+ acc.reduction_accumulate_array %local bounds(%b) <add> : memref<4xi32> <{par_dims = #acc<par_dims[thread_y]>}>
scf.reduce
} {acc.par_dims = #acc<par_dims[block_x]>}
acc.yield
} {origin = "acc.parallel"}
}
- acc.copyout accPtr(%0 : memref<4xi32>) to varPtr(%arg0 : memref<4xi32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "r"}
+ acc.copyout accPtr(%0 : memref<4xi32>) to varPtr(%arg0 : memref<4xi32>) dataClause(acc_reduction) implicit(true) name("r")
return
}
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
index 64eaec673dd1c..b259544865cb4 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
@@ -17,12 +17,12 @@
// CHECK: }
func.func @array_reduction(%arg0: memref<2xi32>) {
- %0 = acc.copyin varPtr(%arg0 : memref<2xi32>) -> memref<2xi32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "r"}
+ %0 = acc.copyin varPtr(%arg0 : memref<2xi32>) dataClause(acc_reduction) implicit(true) name("r") -> memref<2xi32>
acc.kernel_environment dataOperands(%0 : memref<2xi32>) {
%c1_pw = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1_pw {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1_pw par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%arg2 = %0) : (memref<2xi32>) {
%c2 = arith.constant 2 : index
%c0_i32 = arith.constant 0 : i32
@@ -47,7 +47,7 @@ func.func @array_reduction(%arg0: memref<2xi32>) {
scf.reduce
} {acc.par_dims = #acc<par_dims[block_x]>}
%b = acc.bounds extent(%c2 : index)
- acc.reduction_accumulate_array %2 bounds(%b) <add> : memref<2xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate_array %2 bounds(%b) <add> : memref<2xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.reduction_combine_region %2 into %arg2 : memref<2xi32> {
scf.for %i = %c0 to %c2 step %c1 {
%3 = memref.load %2[%i] : memref<2xi32>
@@ -59,7 +59,7 @@ func.func @array_reduction(%arg0: memref<2xi32>) {
acc.yield
} {origin = "acc.parallel"}
}
- acc.copyout accPtr(%0 : memref<2xi32>) to varPtr(%arg0 : memref<2xi32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = "r"}
+ acc.copyout accPtr(%0 : memref<2xi32>) to varPtr(%arg0 : memref<2xi32>) dataClause(acc_reduction) implicit(true) name("r")
return
}
@@ -70,14 +70,14 @@ func.func @array_reduction(%arg0: memref<2xi32>) {
func.func @array_reduction_small_shared() {
%c1 = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) {
%c2 = arith.constant 2 : index
%shared = memref.alloc() : memref<2xi32>
%bounds = acc.bounds extent(%c2 : index)
acc.reduction_accumulate_array %shared bounds(%bounds) <add>
- : memref<2xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ : memref<2xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
memref.dealloc %shared : memref<2xi32>
acc.yield
} {origin = "acc.parallel"}
@@ -95,8 +95,8 @@ func.func @array_reduction_small_shared() {
func.func @array_reduction_strided_extent() {
%c1 = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) {
%c1_b = arith.constant 1 : index
%c2 = arith.constant 2 : index
@@ -105,7 +105,7 @@ func.func @array_reduction_strided_extent() {
%bounds = acc.bounds lowerbound(%c1_b : index) extent(%c3 : index)
stride(%c2 : index)
acc.reduction_accumulate_array %local bounds(%bounds) <add>
- : memref<8xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ : memref<8xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -121,15 +121,15 @@ func.func @array_reduction_strided_extent() {
func.func @array_reduction_dynamic_par_dims(%buf: memref<?xi32>, %n: index) {
%c1 = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%arg0 = %buf, %ext = %n) : (memref<?xi32>, index) {
%view = memref.reinterpret_cast %arg0 to offset: [0], sizes: [%ext], strides: [1]
: memref<?xi32> to memref<?xi32, strided<[1]>>
%bounds = acc.bounds extent(%ext : index)
acc.reduction_accumulate_array %view bounds(%bounds) <add>
: memref<?xi32, strided<[1]>>
- {par_dims = #acc<par_dims[block_x, thread_x]>}
+ <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -151,14 +151,14 @@ func.func @array_reduction_dynamic_par_dims(%buf: memref<?xi32>, %n: index) {
func.func @rank_two_array_reduction() {
%c1 = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
%private = acc.privatize [#acc<par_dims[block_x, thread_x]>] : () -> !acc.private_type<memref<2x3xi32>>
acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%arg0 = %private) : (!acc.private_type<memref<2x3xi32>>) {
%c6 = arith.constant 6 : index
%local = acc.private_local %arg0 {acc.par_dims = #acc<par_dims[block_x, thread_x]>} : (!acc.private_type<memref<2x3xi32>>) -> memref<2x3xi32>
%bounds = acc.bounds extent(%c6 : index)
- acc.reduction_accumulate_array %local bounds(%bounds) <add> : memref<2x3xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate_array %local bounds(%bounds) <add> : memref<2x3xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -183,14 +183,14 @@ func.func @rank_two_array_reduction() {
func.func @rank_three_array_reduction() {
%c1 = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
%private = acc.privatize [#acc<par_dims[block_x, thread_x]>] : () -> !acc.private_type<memref<2x2x2xi32>>
acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%arg0 = %private) : (!acc.private_type<memref<2x2x2xi32>>) {
%c8 = arith.constant 8 : index
%local = acc.private_local %arg0 {acc.par_dims = #acc<par_dims[block_x, thread_x]>} : (!acc.private_type<memref<2x2x2xi32>>) -> memref<2x2x2xi32>
%bounds = acc.bounds extent(%c8 : index)
- acc.reduction_accumulate_array %local bounds(%bounds) <add> : memref<2x2x2xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate_array %local bounds(%bounds) <add> : memref<2x2x2xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -210,15 +210,15 @@ func.func @dynamic_rank_two_array_reduction(
%local: memref<2x?xi32>, %n: index) {
%c1 = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx)
ins(%arg0 = %local, %arg1 = %n)
: (memref<2x?xi32>, index) {
%c2 = arith.constant 2 : index
%extent = arith.muli %c2, %arg1 : index
%bounds = acc.bounds extent(%extent : index)
- acc.reduction_accumulate_array %arg0 bounds(%bounds) <add> : memref<2x?xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate_array %arg0 bounds(%bounds) <add> : memref<2x?xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -239,8 +239,8 @@ func.func @dynamic_rank_two_array_reduction(
func.func @rank_two_partial_bounds_strided_layout() {
%c1 = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) {
%lb = arith.constant 5 : index
%step = arith.constant 2 : index
@@ -250,7 +250,7 @@ func.func @rank_two_partial_bounds_strided_layout() {
stride(%step : index)
acc.reduction_accumulate_array %local bounds(%bounds) <add>
: memref<3x4xi32, strided<[8, 2]>>
- {par_dims = #acc<par_dims[block_x, thread_x]>}
+ <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -265,14 +265,14 @@ func.func @rank_two_partial_bounds_strided_layout() {
func.func @partial_thread_x_reduction() {
%c1 = arith.constant 1 : index
%c16 = arith.constant 16 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c16 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c16 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) {
%c2 = arith.constant 2 : index
%local = memref.alloca() : memref<2xi32>
%bounds = acc.bounds extent(%c2 : index)
acc.reduction_accumulate_array %local bounds(%bounds) <add>
- : memref<2xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ : memref<2xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -285,14 +285,14 @@ func.func @partial_thread_x_reduction() {
func.func @thread_y_reduction_still_aligned() {
%c1 = arith.constant 1 : index
%c16 = arith.constant 16 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %ty = acc.par_width %c16 {par_dim = #acc.par_dim<thread_y>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %ty = acc.par_width %c16 par_dim(#acc.par_dim<thread_y>)
acc.compute_region launch(%kbx = %bx, %kty = %ty) {
%c0_i32 = arith.constant 0 : i32
%local = memref.alloca() : memref<i32>
acc.reduction_accumulate %c0_i32 to %local <add>
: i32 -> memref<i32>
- {par_dims = #acc<par_dims[block_x, thread_y]>}
+ <{par_dims = #acc<par_dims[block_x, thread_y]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -309,15 +309,15 @@ func.func @thread_x_reduction_with_thread_y_width() {
%c1 = arith.constant 1 : index
%c2 = arith.constant 2 : index
%c16 = arith.constant 16 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c16 {par_dim = #acc.par_dim<thread_x>}
- %ty = acc.par_width %c2 {par_dim = #acc.par_dim<thread_y>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c16 par_dim(#acc.par_dim<thread_x>)
+ %ty = acc.par_width %c2 par_dim(#acc.par_dim<thread_y>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx, %kty = %ty) {
%c0_i32 = arith.constant 0 : i32
%local = memref.alloca() : memref<i32>
acc.reduction_accumulate %c0_i32 to %local <add>
: i32 -> memref<i32>
- {par_dims = #acc<par_dims[block_x, thread_x]>}
+ <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -334,15 +334,15 @@ func.func @thread_x_reduction_with_thread_z_width() {
%c1 = arith.constant 1 : index
%c3 = arith.constant 3 : index
%c341 = arith.constant 341 : index
- %bx = acc.par_width %c1 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c341 {par_dim = #acc.par_dim<thread_x>}
- %tz = acc.par_width %c3 {par_dim = #acc.par_dim<thread_z>}
+ %bx = acc.par_width %c1 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c341 par_dim(#acc.par_dim<thread_x>)
+ %tz = acc.par_width %c3 par_dim(#acc.par_dim<thread_z>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx, %ktz = %tz) {
%c0_i32 = arith.constant 0 : i32
%local = memref.alloca() : memref<i32>
acc.reduction_accumulate %c0_i32 to %local <add>
: i32 -> memref<i32>
- {par_dims = #acc<par_dims[block_x, thread_x]>}
+ <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
@@ -360,7 +360,7 @@ func.func @thread_x_reduction_with_thread_z_width() {
// CHECK: }
func.func @thread_only_array_reduction_single_block() {
%c128 = arith.constant 128 : index
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%ktx = %tx) {
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
@@ -372,7 +372,7 @@ func.func @thread_only_array_reduction_single_block() {
}
%bounds = acc.bounds extent(%c8 : index)
acc.reduction_accumulate_array %local bounds(%bounds) <add>
- : memref<8xi32> {par_dims = #acc<par_dims[thread_x]>}
+ : memref<8xi32> <{par_dims = #acc<par_dims[thread_x]>}>
acc.yield
} {origin = "acc.parallel"}
return
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-block-combine-no-reload.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-block-combine-no-reload.mlir
index 70506c6b719b6..4b8fb316f298b 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-block-combine-no-reload.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-block-combine-no-reload.mlir
@@ -24,8 +24,8 @@ module attributes {gpu.container_module} {
func.func @test_block_combine_no_reload(%arg_slot: memref<i32>, %arg_res: memref<i32>) {
%c1_pw = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1_pw {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1_pw par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%a_slot = %arg_slot, %a_res = %arg_res) : (memref<i32>, memref<i32>) {
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
@@ -47,7 +47,7 @@ module attributes {gpu.container_module} {
scf.reduce.return %sum : i32
}
} {acc.par_dims = #acc<par_dims[sequential]>}
- acc.reduction_accumulate %inner_red to %a_slot <add> : i32 -> memref<i32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate %inner_red to %a_slot <add> : i32 -> memref<i32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
scf.reduce
} {acc.par_dims = #acc<par_dims[thread_x]>}
scf.reduce
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-combine-region-private-dest.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-combine-region-private-dest.mlir
index 79137a42d9619..6da7e328dcc9f 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-combine-region-private-dest.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-combine-region-private-dest.mlir
@@ -19,8 +19,8 @@
func.func @combine_region_private_dest(%arg: memref<i32>) {
%c1_pw = arith.constant 1 : index
%c128 = arith.constant 128 : index
- %bx = acc.par_width %c1_pw {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %bx = acc.par_width %c1_pw par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
%pv_outer = acc.privatize {acc.par_dims = #acc<par_dims[block_x, thread_x]>} : () -> !acc.private_type<memref<i32>>
%pv_inner = acc.privatize {acc.par_dims = #acc<par_dims[block_x, thread_x]>} : () -> !acc.private_type<memref<i32>>
acc.compute_region launch(%kbx = %bx, %ktx = %tx) ins(%a_res = %arg, %po = %pv_outer, %pi = %pv_inner) : (memref<i32>, !acc.private_type<memref<i32>>, !acc.private_type<memref<i32>>) {
@@ -49,7 +49,7 @@ func.func @combine_region_private_dest(%arg: memref<i32>) {
memref.store %c1_i32, %inner[] : memref<i32>
}
%v = memref.load %inner[] : memref<i32>
- acc.reduction_accumulate %v to %inner <add> : i32 -> memref<i32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate %v to %inner <add> : i32 -> memref<i32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
acc.predicate_region {
acc.reduction_combine_region %inner into %outer : memref<i32> {
%la = memref.load %outer[] : memref<i32>
@@ -62,7 +62,7 @@ func.func @combine_region_private_dest(%arg: memref<i32>) {
scf.reduce
} {acc.par_dims = #acc<par_dims[sequential]>}
%ov = memref.load %outer[] : memref<i32>
- acc.reduction_accumulate %ov to %outer <add> : i32 -> memref<i32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate %ov to %outer <add> : i32 -> memref<i32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
scf.reduce
} {acc.par_dims = #acc<par_dims[thread_x]>}
scf.reduce
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reuse-barrier-sibling-region-privatize.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reuse-barrier-sibling-region-privatize.mlir
index e0f8d3391c054..5f802b5b87ed9 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reuse-barrier-sibling-region-privatize.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reuse-barrier-sibling-region-privatize.mlir
@@ -22,8 +22,8 @@
func.func @sibling_regions_share_seq_loop() {
%c256_pw = arith.constant 256 : index
%c1024_pw = arith.constant 1024 : index
- %par_bx = acc.par_width %c256_pw {par_dim = #acc.par_dim<block_x>}
- %par_tx = acc.par_width %c1024_pw {par_dim = #acc.par_dim<thread_x>}
+ %par_bx = acc.par_width %c256_pw par_dim(#acc.par_dim<block_x>)
+ %par_tx = acc.par_width %c1024_pw par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%priv0 = acc.privatize : () -> !acc.private_type<memref<i64>>
%priv1 = acc.privatize : () -> !acc.private_type<memref<i64>>
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-worker-call-with-thread-y-reduction.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-worker-call-with-thread-y-reduction.mlir
index 26bc974d45892..3ee0c837b7b8d 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-worker-call-with-thread-y-reduction.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-worker-call-with-thread-y-reduction.mlir
@@ -34,9 +34,9 @@ module attributes {gpu.container_module} {
func.func @test_worker_routine_with_thread_y_reduction(%arg0: memref<16xi32>) {
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %bx = acc.par_width %c4 {par_dim = #acc.par_dim<block_x>}
- %tx = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
- %ty = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
+ %bx = acc.par_width %c4 par_dim(#acc.par_dim<block_x>)
+ %tx = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
+ %ty = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
%priv = acc.privatize : () -> !acc.private_type<memref<i32>>
acc.compute_region launch(%kbx = %bx, %ktx = %tx, %kty = %ty)
ins(%arg10 = %priv, %arg11 = %arg0)
@@ -62,7 +62,7 @@ module attributes {gpu.container_module} {
scf.reduce.return %sum : i32
}
} {acc.par_dims = #acc<par_dims[sequential]>}
- acc.reduction_accumulate %loop_red to %out_priv <add> : i32 -> memref<i32> {par_dims = #acc<par_dims[thread_y]>}
+ acc.reduction_accumulate %loop_red to %out_priv <add> : i32 -> memref<i32> <{par_dims = #acc<par_dims[thread_y]>}>
scf.reduce
} {acc.par_dims = #acc<par_dims[thread_y]>}
scf.reduce
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-dynamic-nw.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-dynamic-nw.mlir
index 5df3d986fa5b0..ff257a10ea381 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-dynamic-nw.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-dynamic-nw.mlir
@@ -6,9 +6,9 @@
func.func @test_worker_private_dynamic_nw(%nw: index) {
%c32 = arith.constant 32 : index
%c5 = arith.constant 5 : index
- %block_x = acc.par_width %c5 {par_dim = #acc.par_dim<block_x>}
- %thread_y = acc.par_width %nw {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_x = acc.par_width %c5 par_dim(#acc.par_dim<block_x>)
+ %thread_y = acc.par_width %nw par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%priv = acc.privatize : () -> !acc.private_type<memref<2xi32>>
// expected-error @below {{failed to legalize operation 'acc.compute_region'}}
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-foldable-nw.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-foldable-nw.mlir
index 0ede030fe05ac..31f25579fe575 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-foldable-nw.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-foldable-nw.mlir
@@ -9,9 +9,9 @@ func.func @test_worker_private_foldable_nw() {
%c5 = arith.constant 5 : index
%c32 = arith.constant 32 : index
%nw = arith.addi %c1, %c1 : index
- %block_x = acc.par_width %c5 {par_dim = #acc.par_dim<block_x>}
- %thread_y = acc.par_width %nw {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_x = acc.par_width %c5 par_dim(#acc.par_dim<block_x>)
+ %thread_y = acc.par_width %nw par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%priv = acc.privatize : () -> !acc.private_type<memref<2xi32>>
acc.compute_region launch(%arg0 = %block_x, %arg1 = %thread_y, %arg2 = %thread_x) ins(%arg10 = %priv) : (!acc.private_type<memref<2xi32>>) {
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine-mixed-scope.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine-mixed-scope.mlir
index 7f22fd20aa89e..34659f1de7dd5 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine-mixed-scope.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine-mixed-scope.mlir
@@ -6,9 +6,9 @@ func.func @mixed_scope_worker_reduction_combine(
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %block_y = acc.par_width %c1 {par_dim = #acc.par_dim<block_y>}
- %thread_y = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_y = acc.par_width %c1 par_dim(#acc.par_dim<block_y>)
+ %thread_y = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%private = acc.privatize [#acc<par_dims[thread_y]>]
: () -> !acc.private_type<memref<i32>>
@@ -46,9 +46,9 @@ func.func @worker_combine_with_single_store(%result: memref<i32>) {
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %block_y = acc.par_width %c1 {par_dim = #acc.par_dim<block_y>}
- %thread_y = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_y = acc.par_width %c1 par_dim(#acc.par_dim<block_y>)
+ %thread_y = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%private = acc.privatize [#acc<par_dims[thread_y]>]
: () -> !acc.private_type<memref<i32>>
@@ -86,9 +86,9 @@ func.func @worker_combine_with_atomic_update(%result: memref<i32>) {
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %block_y = acc.par_width %c1 {par_dim = #acc.par_dim<block_y>}
- %thread_y = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_y = acc.par_width %c1 par_dim(#acc.par_dim<block_y>)
+ %thread_y = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%private = acc.privatize [#acc<par_dims[thread_y]>]
: () -> !acc.private_type<memref<i32>>
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine.mlir
index 0de030eda1e59..f21e2977219da 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-combine.mlir
@@ -15,9 +15,9 @@ func.func @worker_reduction_combine(%result: memref<i32>) {
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %block_y = acc.par_width %c1 {par_dim = #acc.par_dim<block_y>}
- %thread_y = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_y = acc.par_width %c1 par_dim(#acc.par_dim<block_y>)
+ %thread_y = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%private = acc.privatize [#acc<par_dims[thread_y]>]
: () -> !acc.private_type<memref<i32>>
@@ -59,9 +59,9 @@ func.func @worker_reduction_combine_region(%result: memref<i32>) {
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %block_y = acc.par_width %c1 {par_dim = #acc.par_dim<block_y>}
- %thread_y = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_y = acc.par_width %c1 par_dim(#acc.par_dim<block_y>)
+ %thread_y = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%private = acc.privatize [#acc<par_dims[thread_y]>]
: () -> !acc.private_type<memref<i32>>
@@ -109,9 +109,9 @@ func.func @nested_worker_reduction_combines(
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %block_y = acc.par_width %c1 {par_dim = #acc.par_dim<block_y>}
- %thread_y = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_y = acc.par_width %c1 par_dim(#acc.par_dim<block_y>)
+ %thread_y = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%private = acc.privatize [#acc<par_dims[thread_y]>]
: () -> !acc.private_type<memref<i32>>
@@ -157,9 +157,9 @@ func.func @worker_combine_in_scf_if(%result: memref<i32>) {
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %block_y = acc.par_width %c1 {par_dim = #acc.par_dim<block_y>}
- %thread_y = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %thread_x = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block_y = acc.par_width %c1 par_dim(#acc.par_dim<block_y>)
+ %thread_y = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %thread_x = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%private = acc.privatize [#acc<par_dims[thread_y]>]
: () -> !acc.private_type<memref<i32>>
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-private.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-private.mlir
index 3866c8057f129..6ae54a07fb5dc 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-private.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-reduction-private.mlir
@@ -8,9 +8,9 @@ func.func @worker_reduction_private() {
%c2 = arith.constant 2 : index
%c4 = arith.constant 4 : index
%c32 = arith.constant 32 : index
- %block = acc.par_width %c2 {par_dim = #acc.par_dim<block_x>}
- %worker = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
- %vector = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %block = acc.par_width %c2 par_dim(#acc.par_dim<block_x>)
+ %worker = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
+ %vector = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%private = acc.privatize [#acc<par_dims[thread_y]>] : () -> !acc.private_type<memref<i32>>
acc.compute_region launch(%bx = %block, %wy = %worker, %vx = %vector)
@@ -29,7 +29,7 @@ func.func @worker_reduction_private() {
} {acc.par_dims = #acc<par_dims[thread_y]>}
%value = memref.load %local[] : memref<i32>
acc.reduction_accumulate %value to %local <add>
- : i32 -> memref<i32> {par_dims = #acc<par_dims[thread_y]>}
+ : i32 -> memref<i32> <{par_dims = #acc<par_dims[thread_y]>}>
scf.reduce
} {acc.par_dims = #acc<par_dims[sequential]>}
scf.reduce
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-reuse-barrier.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-reuse-barrier.mlir
index 48670229b28f2..d5a97dd054667 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-reuse-barrier.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-reuse-barrier.mlir
@@ -26,9 +26,9 @@ func.func @worker_seq_vector_reuse() {
%c256_pw = arith.constant 256 : index
%c4_pw = arith.constant 4 : index
%c32_pw = arith.constant 32 : index
- %par_bx = acc.par_width %c256_pw {par_dim = #acc.par_dim<block_x>}
- %par_ty = acc.par_width %c4_pw {par_dim = #acc.par_dim<thread_y>}
- %par_tx = acc.par_width %c32_pw {par_dim = #acc.par_dim<thread_x>}
+ %par_bx = acc.par_width %c256_pw par_dim(#acc.par_dim<block_x>)
+ %par_ty = acc.par_width %c4_pw par_dim(#acc.par_dim<thread_y>)
+ %par_tx = acc.par_width %c32_pw par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%priv0 = acc.privatize : () -> !acc.private_type<memref<32xf32>>
acc.compute_region launch(%grid = %par_bx, %worker = %par_ty, %block = %par_tx) ins(%arg10 = %priv0) : (!acc.private_type<memref<32xf32>>) {
diff --git a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-subgroup-align.mlir b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-subgroup-align.mlir
index 86db31c9f8136..62d0eb6fc5cd0 100644
--- a/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-subgroup-align.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-vector-subgroup-align.mlir
@@ -18,9 +18,9 @@ func.func @worker_divergent_subgroup_barrier() {
%c256_pw = arith.constant 256 : index
%c4_pw = arith.constant 4 : index
%c16_pw = arith.constant 16 : index
- %par_bx = acc.par_width %c256_pw {par_dim = #acc.par_dim<block_x>}
- %par_ty = acc.par_width %c4_pw {par_dim = #acc.par_dim<thread_y>}
- %par_tx = acc.par_width %c16_pw {par_dim = #acc.par_dim<thread_x>}
+ %par_bx = acc.par_width %c256_pw par_dim(#acc.par_dim<block_x>)
+ %par_ty = acc.par_width %c4_pw par_dim(#acc.par_dim<thread_y>)
+ %par_tx = acc.par_width %c16_pw par_dim(#acc.par_dim<thread_x>)
acc.kernel_environment {
%priv0 = acc.privatize : () -> !acc.private_type<memref<64xf32>>
acc.compute_region launch(%grid = %par_bx, %worker = %par_ty, %block = %par_tx) ins(%arg10 = %priv0) : (!acc.private_type<memref<64xf32>>) {
diff --git a/mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-device-type.mlir b/mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-device-type.mlir
index 572235b89106c..984cd5eb550bb 100644
--- a/mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-device-type.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-device-type.mlir
@@ -10,14 +10,14 @@ func.func @parallel_default_gangs_nvidia_vector_length(%buf: memref<4xi32>) {
%c32_i32 = arith.constant 32 : i32
%dev = acc.copyin varPtr(%buf : memref<4xi32>) -> memref<4xi32>
- // CHECK-NOT: acc.par_width {{.*}} {par_dim = #acc.par_dim<block_x>}
- // CHECK: acc.par_width {{.*}} {par_dim = #acc.par_dim<thread_x>}
+ // CHECK-NOT: acc.par_width {{.*}} par_dim(#acc.par_dim<block_x>)
+ // CHECK: acc.par_width {{.*}} par_dim(#acc.par_dim<thread_x>)
acc.parallel num_gangs({%c4_i32 : i32}) vector_length(%c32_i32 : i32 [#acc.device_type<nvidia>]) dataOperands(%dev : memref<4xi32>) {
acc.loop control(%i : index) = (%c0 : index) to (%c4 : index) step (%c1 : index) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<4xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
diff --git a/mlir/test/Dialect/OpenACC/acc-compute-lowering-compute.mlir b/mlir/test/Dialect/OpenACC/acc-compute-lowering-compute.mlir
index c511d3e4270d1..b85d36914fc1e 100644
--- a/mlir/test/Dialect/OpenACC/acc-compute-lowering-compute.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-compute-lowering-compute.mlir
@@ -10,7 +10,7 @@ func.func @parallel_gang_loop(%buf: memref<1xi32>) {
%dev = acc.copyin varPtr(%buf : memref<1xi32>) -> memref<1xi32>
// CHECK-NOT: acc.parallel
// CHECK: acc.kernel_environment
- // CHECK: acc.par_width {{.*}} {par_dim = #acc.par_dim<block_x>}
+ // CHECK: acc.par_width {{.*}} par_dim(#acc.par_dim<block_x>)
// CHECK: acc.compute_region launch(
// CHECK: scf.parallel
// CHECK: acc.par_dims = #acc<par_dims[block_x]>
@@ -18,7 +18,7 @@ func.func @parallel_gang_loop(%buf: memref<1xi32>) {
acc.loop gang control(%arg0 : i32) = (%c1_i32 : i32) to (%c100_i32 : i32) step (%c1_i32 : i32) {
memref.store %arg0, %dev[%c0] : memref<1xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<1xi32>) to varPtr(%buf : memref<1xi32>)
@@ -37,7 +37,7 @@ func.func @parallel_seq_loop(%buf: memref<4xi32>) {
%dev = acc.copyin varPtr(%buf : memref<4xi32>) -> memref<4xi32>
// CHECK-NOT: acc.parallel
// CHECK: acc.kernel_environment
- // CHECK: acc.par_width {{.*}} {par_dim = #acc.par_dim<block_x>}
+ // CHECK: acc.par_width {{.*}} par_dim(#acc.par_dim<block_x>)
// CHECK: acc.compute_region launch(
// CHECK: scf.for
// CHECK: acc.par_dims = #acc<par_dims[sequential]>
@@ -46,7 +46,7 @@ func.func @parallel_seq_loop(%buf: memref<4xi32>) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<4xi32>
acc.yield
- } attributes {seq = [#acc.device_type<none>]}
+ } seq
acc.yield
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
@@ -64,7 +64,7 @@ func.func @serial_loop(%buf: memref<4xi32>) {
%dev = acc.copyin varPtr(%buf : memref<4xi32>) -> memref<4xi32>
// CHECK-NOT: acc.serial
// CHECK: acc.kernel_environment
- // CHECK: acc.par_width {par_dim = #acc.par_dim<sequential>}
+ // CHECK: acc.par_width par_dim(#acc.par_dim<sequential>)
// CHECK: acc.compute_region launch(
// CHECK: scf.for
// CHECK: acc.par_dims = #acc<par_dims[sequential]>
@@ -73,7 +73,7 @@ func.func @serial_loop(%buf: memref<4xi32>) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<4xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
@@ -99,7 +99,7 @@ func.func @kernels_loop(%buf: memref<8xi32>) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<8xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.terminator
}
acc.copyout accPtr(%dev : memref<8xi32>) to varPtr(%buf : memref<8xi32>)
@@ -117,7 +117,7 @@ func.func @constant_livein_materialized_into_compute_region(%buf: memref<1xi32>)
%c42 = arith.constant 42 : i32
%dev = acc.copyin varPtr(%buf : memref<1xi32>) -> memref<1xi32>
// CHECK: acc.kernel_environment
- // CHECK: acc.par_width {par_dim = #acc.par_dim<sequential>}
+ // CHECK: acc.par_width par_dim(#acc.par_dim<sequential>)
// CHECK: acc.compute_region launch(
// CHECK-SAME: ins({{.*}}) : (memref<1xi32>) {
// CHECK-DAG: arith.constant 42 : i32
@@ -148,7 +148,7 @@ func.func @parallel_unit_launch_serial_loops(%buf: memref<4xi32>) {
%dev = acc.copyin varPtr(%buf : memref<4xi32>) -> memref<4xi32>
// CHECK-NOT: acc.parallel
// CHECK: acc.kernel_environment
- // CHECK: acc.par_width {par_dim = #acc.par_dim<sequential>}
+ // CHECK: acc.par_width par_dim(#acc.par_dim<sequential>)
// CHECK: acc.compute_region launch(
// CHECK: scf.for
// CHECK: acc.par_dims = #acc<par_dims[sequential]>
@@ -157,7 +157,7 @@ func.func @parallel_unit_launch_serial_loops(%buf: memref<4xi32>) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<4xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
@@ -180,7 +180,7 @@ func.func @kernels_unit_launch_serial_loops(%buf: memref<4xi32>) {
%dev = acc.copyin varPtr(%buf : memref<4xi32>) -> memref<4xi32>
// CHECK-NOT: acc.kernels
// CHECK: acc.kernel_environment
- // CHECK: acc.par_width {par_dim = #acc.par_dim<sequential>}
+ // CHECK: acc.par_width par_dim(#acc.par_dim<sequential>)
// CHECK: acc.compute_region launch(
// CHECK: scf.for
// CHECK: acc.par_dims = #acc<par_dims[sequential]>
@@ -189,7 +189,7 @@ func.func @kernels_unit_launch_serial_loops(%buf: memref<4xi32>) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<4xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.terminator
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
@@ -210,11 +210,11 @@ func.func @parallel_vector_length32_independent(%buf: memref<4xi32>) {
// CHECK-NOT: acc.par_dims = #acc<par_dims[sequential]>
// CHECK: acc.par_dims = #acc<par_dims[thread_x]>
acc.parallel num_gangs({%c1_i32 : i32}) num_workers(%c1_i32 : i32) vector_length(%c32_i32 : i32) dataOperands(%dev : memref<4xi32>) {
- acc.loop control(%i : index) = (%c0 : index) to (%c4 : index) step (%c1 : index) {
+ acc.loop vector control(%i : index) = (%c0 : index) to (%c4 : index) step (%c1 : index) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<4xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>], vector = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
@@ -235,11 +235,11 @@ func.func @kernels_num_gangs4_independent(%buf: memref<4xi32>) {
// CHECK-NOT: acc.par_dims = #acc<par_dims[sequential]>
// CHECK: acc.par_dims = #acc<par_dims[thread_x]>
acc.kernels num_gangs({%c4_i32 : i32}) num_workers(%c1_i32 : i32) vector_length(%c1_i32 : i32) dataOperands(%dev : memref<4xi32>) {
- acc.loop control(%i : index) = (%c0 : index) to (%c4 : index) step (%c1 : index) {
+ acc.loop vector control(%i : index) = (%c0 : index) to (%c4 : index) step (%c1 : index) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<4xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>], vector = [#acc.device_type<none>]}
+ } independent
acc.terminator
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
@@ -260,11 +260,11 @@ func.func @parallel_num_gangs_1_2_independent(%buf: memref<4xi32>) {
// CHECK-NOT: acc.par_dims = #acc<par_dims[sequential]>
// CHECK: acc.par_dims = #acc<par_dims[thread_x]>
acc.parallel num_gangs({%c1_i32 : i32, %c2_i32 : i32}) num_workers(%c1_i32 : i32) vector_length(%c1_i32 : i32) dataOperands(%dev : memref<4xi32>) {
- acc.loop control(%i : index) = (%c0 : index) to (%c4 : index) step (%c1 : index) {
+ acc.loop vector control(%i : index) = (%c0 : index) to (%c4 : index) step (%c1 : index) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<4xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>], vector = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
diff --git a/mlir/test/Dialect/OpenACC/acc-compute-lowering-loop-device-type.mlir b/mlir/test/Dialect/OpenACC/acc-compute-lowering-loop-device-type.mlir
index fb7c9b35e0909..8f227dbe13151 100644
--- a/mlir/test/Dialect/OpenACC/acc-compute-lowering-loop-device-type.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-compute-lowering-loop-device-type.mlir
@@ -12,10 +12,10 @@ func.func @parallel_loop_gang_default_vector_nvidia(%buf: memref<1xi32>) {
// CHECK-NOT: acc.par_dims = #acc<par_dims[block_x]>
// CHECK: acc.par_dims = #acc<par_dims[thread_x]>
acc.parallel num_gangs({%c10_i32 : i32}) dataOperands(%dev : memref<1xi32>) {
- acc.loop gang control(%arg0 : i32) = (%c1_i32 : i32) to (%c100_i32 : i32) step (%c1_i32 : i32) {
+ acc.loop gang vector([#acc.device_type<nvidia>]) control(%arg0 : i32) = (%c1_i32 : i32) to (%c100_i32 : i32) step (%c1_i32 : i32) {
memref.store %arg0, %dev[%c0] : memref<1xi32>
acc.yield
- } attributes {auto_ = [#acc.device_type<none>], gang = [#acc.device_type<none>], vector = [#acc.device_type<nvidia>]}
+ } auto_
acc.yield
}
acc.copyout accPtr(%dev : memref<1xi32>) to varPtr(%buf : memref<1xi32>)
diff --git a/mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir b/mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
index 0772e6a2a536d..e05056398cf34 100644
--- a/mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
@@ -17,7 +17,7 @@ func.func @parallel_independent_loop(%buf: memref<16xi32>) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%i] : memref<16xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<16xi32>) to varPtr(%buf : memref<16xi32>)
@@ -46,7 +46,7 @@ func.func @parallel_loop_multi_block_body(%buf: memref<4xi32>) {
cf.br ^bb1
^bb1:
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<4xi32>) to varPtr(%buf : memref<4xi32>)
@@ -74,7 +74,7 @@ func.func @parallel_loop_auto_collapse(%buf: memref<1xi32>, %lb0 : index, %ub0 :
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%c0] : memref<1xi32>
acc.yield
- } attributes {auto_ = [#acc.device_type<none>]}
+ } auto_
acc.yield
}
acc.copyout accPtr(%dev : memref<1xi32>) to varPtr(%buf : memref<1xi32>)
@@ -102,7 +102,7 @@ func.func @parallel_loop_collapse(%buf: memref<1xi32>, %lb0 : index, %ub0 : inde
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%c0] : memref<1xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<1xi32>) to varPtr(%buf : memref<1xi32>)
@@ -121,7 +121,7 @@ func.func @serial_loop_normalized(%buf: memref<1xi32>) {
%dev = acc.copyin varPtr(%buf : memref<1xi32>) -> memref<1xi32>
// CHECK-NOT: acc.serial
// CHECK: acc.kernel_environment
- // CHECK: acc.par_width {par_dim = #acc.par_dim<sequential>}
+ // CHECK: acc.par_width par_dim(#acc.par_dim<sequential>)
// CHECK: acc.compute_region launch(
// CHECK: scf.for
// CHECK-DAG: arith.muli
@@ -132,7 +132,7 @@ func.func @serial_loop_normalized(%buf: memref<1xi32>) {
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%c0] : memref<1xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<1xi32>) to varPtr(%buf : memref<1xi32>)
@@ -154,7 +154,7 @@ func.func @orphan_loop(%buf: memref<8xi32>) {
acc.loop control(%i : index) = (%c0 : index) to (%c8 : index) step (%c1 : index) {
memref.store %c0_i32, %buf[%i] : memref<8xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -177,7 +177,7 @@ func.func @device_routine_with_loop(%buf: memref<8xi32>) attributes {acc.special
acc.loop control(%i : index) = (%c0 : index) to (%c8 : index) step (%c1 : index) {
memref.store %c0_i32, %buf[%i] : memref<8xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -197,10 +197,10 @@ func.func @device_routine_vector_with_loop(%buf: memref<8xi32>) attributes {acc.
%c8 = arith.constant 8 : index
%c0_i32 = arith.constant 0 : i32
- acc.loop control(%i : index) = (%c0 : index) to (%c8 : index) step (%c1 : index) {
+ acc.loop vector control(%i : index) = (%c0 : index) to (%c8 : index) step (%c1 : index) {
memref.store %c0_i32, %buf[%i] : memref<8xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>], vector = [#acc.device_type<none>]}
+ } independent
return
}
@@ -217,7 +217,7 @@ func.func @parallel_loop_auto_gang(%buf: memref<1xi32>) {
%dev = acc.copyin varPtr(%buf : memref<1xi32>) -> memref<1xi32>
// CHECK-NOT: acc.parallel
// CHECK: acc.kernel_environment
- // CHECK: acc.par_width {{.*}} {par_dim = #acc.par_dim<block_x>}
+ // CHECK: acc.par_width {{.*}} par_dim(#acc.par_dim<block_x>)
// CHECK: acc.compute_region launch(
// CHECK: scf.for
// CHECK-NOT: scf.parallel
@@ -226,7 +226,7 @@ func.func @parallel_loop_auto_gang(%buf: memref<1xi32>) {
acc.loop gang control(%arg0 : i32) = (%c1_i32 : i32) to (%c100_i32 : i32) step (%c1_i32 : i32) {
memref.store %arg0, %dev[%c0] : memref<1xi32>
acc.yield
- } attributes {auto_ = [#acc.device_type<none>]}
+ } auto_
acc.yield
}
acc.copyout accPtr(%dev : memref<1xi32>) to varPtr(%buf : memref<1xi32>)
diff --git a/mlir/test/Dialect/OpenACC/acc-compute-lowering-unstructured.mlir b/mlir/test/Dialect/OpenACC/acc-compute-lowering-unstructured.mlir
index f22d7872ecc32..bcfc066302cc4 100644
--- a/mlir/test/Dialect/OpenACC/acc-compute-lowering-unstructured.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-compute-lowering-unstructured.mlir
@@ -26,7 +26,7 @@ func.func @parallel_unstructured_loop(%buf: memref<10xi32>) {
cf.br ^header(%iv_next : index)
^exit:
acc.yield
- } attributes {independent = [#acc.device_type<none>], unstructured}
+ } independent unstructured
acc.yield
}
acc.copyout accPtr(%dev : memref<10xi32>) to varPtr(%buf : memref<10xi32>)
diff --git a/mlir/test/Dialect/OpenACC/acc-emit-remarks-data.mlir b/mlir/test/Dialect/OpenACC/acc-emit-remarks-data.mlir
index 5ca798e516530..cb89aa620ea6f 100644
--- a/mlir/test/Dialect/OpenACC/acc-emit-remarks-data.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-emit-remarks-data.mlir
@@ -44,41 +44,29 @@ func.func @structured_data(
%arg6: memref<f32>, %arg7: memref<f32>, %arg8: memref<f32>,
%arg9: memref<f32>, %arg10: memref<f32>, %arg11: memref<f32>) {
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating copyin(a) [if not already present]"
- %copyin = acc.copyin varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "a"}
+ %copyin = acc.copyin varPtr(%arg0 : memref<f32>) name("a") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating copyin(readonly:b) [if not already present]"
- %copyin_readonly = acc.copyin varPtr(%arg1 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_copyin_readonly>, name = "b"}
+ %copyin_readonly = acc.copyin varPtr(%arg1 : memref<f32>) dataClause(acc_copyin_readonly) name("b") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating copy(c) [if not already present]"
- %copy = acc.copyin varPtr(%arg2 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_copy>, name = "c"}
+ %copy = acc.copyin varPtr(%arg2 : memref<f32>) dataClause(acc_copy) name("c") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating copyout(d) [if not already present]"
- %copyout = acc.create varPtr(%arg3 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_copyout>, name = "d"}
+ %copyout = acc.create varPtr(%arg3 : memref<f32>) dataClause(acc_copyout) name("d") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating copyout(zero:e) [if not already present]"
- %copyout_zero = acc.create varPtr(%arg4 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_copyout_zero>, name = "e"}
+ %copyout_zero = acc.create varPtr(%arg4 : memref<f32>) dataClause(acc_copyout_zero) name("e") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating present(f)"
- %present = acc.present varPtr(%arg5 : memref<f32>) -> memref<f32>
- {name = "f"}
+ %present = acc.present varPtr(%arg5 : memref<f32>) name("f") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating create(g) [if not already present]"
- %create = acc.create varPtr(%arg6 : memref<f32>) -> memref<f32>
- {name = "g"}
+ %create = acc.create varPtr(%arg6 : memref<f32>) name("g") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating create(zero:h) [if not already present]"
- %create_zero = acc.create varPtr(%arg7 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_create_zero>, name = "h"}
+ %create_zero = acc.create varPtr(%arg7 : memref<f32>) dataClause(acc_create_zero) name("h") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating attach(i)"
- %attach = acc.attach varPtr(%arg8 : memref<f32>) -> memref<f32>
- {name = "i"}
+ %attach = acc.attach varPtr(%arg8 : memref<f32>) name("i") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating no_create(j) [if not already present]"
- %no_create = acc.nocreate varPtr(%arg9 : memref<f32>) -> memref<f32>
- {name = "j"}
+ %no_create = acc.nocreate varPtr(%arg9 : memref<f32>) name("j") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating deviceptr(k)"
- %deviceptr = acc.deviceptr varPtr(%arg10 : memref<f32>) -> memref<f32>
- {name = "k"}
+ %deviceptr = acc.deviceptr varPtr(%arg10 : memref<f32>) name("k") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_data | Remark="Generating copy(l) [if not already present]"
- %reduction_copy = acc.copyin varPtr(%arg11 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_reduction>, name = "l"}
+ %reduction_copy = acc.copyin varPtr(%arg11 : memref<f32>) dataClause(acc_reduction) name("l") -> memref<f32>
acc.data dataOperands(%copyin, %copyin_readonly, %copy, %copyout,
%copyout_zero, %present, %create, %create_zero, %attach, %no_create,
%deviceptr, %reduction_copy : memref<f32>, memref<f32>, memref<f32>,
@@ -92,14 +80,12 @@ func.func @structured_data(
// Each data construct in a function is reported independently.
func.func @multiple_data_constructs(%arg0: memref<f32>, %arg1: memref<f32>) {
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=multiple_data_constructs | Remark="Generating copyin(a) [if not already present]"
- %copyin0 = acc.copyin varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "a"}
+ %copyin0 = acc.copyin varPtr(%arg0 : memref<f32>) name("a") -> memref<f32>
acc.data dataOperands(%copyin0 : memref<f32>) {
acc.terminator
}
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=multiple_data_constructs | Remark="Generating copyin(b) [if not already present]"
- %copyin1 = acc.copyin varPtr(%arg1 : memref<f32>) -> memref<f32>
- {name = "b"}
+ %copyin1 = acc.copyin varPtr(%arg1 : memref<f32>) name("b") -> memref<f32>
acc.data dataOperands(%copyin1 : memref<f32>) {
acc.terminator
}
@@ -113,26 +99,22 @@ func.func @kernel_environment(
%arg3: memref<f32>, %arg4: memref<f32>, %arg5: memref<f32>,
%arg6: memref<f32>) {
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=kernel_environment | Remark="Generating copyin(a) [if not already present]"
- %copyin = acc.copyin varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "a"}
+ %copyin = acc.copyin varPtr(%arg0 : memref<f32>) name("a") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=kernel_environment | Remark="Generating private(b)"
%private = acc.private varPtr(%arg1 : memref<f32>)
- recipe(@privatization_memref_f32) -> memref<f32> {name = "b"}
+ recipe(@privatization_memref_f32) name("b") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=kernel_environment | Remark="Generating firstprivate(c)"
%firstprivate = acc.firstprivate varPtr(%arg2 : memref<f32>)
- recipe(@firstprivatization_memref_f32) -> memref<f32> {name = "c"}
+ recipe(@firstprivatization_memref_f32) name("c") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=kernel_environment | Remark="Generating use_device(d)"
- %use_device = acc.use_device varPtr(%arg3 : memref<f32>) -> memref<f32>
- {name = "d"}
+ %use_device = acc.use_device varPtr(%arg3 : memref<f32>) name("d") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=kernel_environment | Remark="Generating reduction(e)"
%reduction = acc.reduction varPtr(%arg4 : memref<f32>)
- recipe(@reduction_add_memref_f32) -> memref<f32> {name = "e"}
+ recipe(@reduction_add_memref_f32) name("e") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=kernel_environment | Remark="Generating cache(f)"
- %cache = acc.cache varPtr(%arg5 : memref<f32>) -> memref<f32>
- {name = "f"}
+ %cache = acc.cache varPtr(%arg5 : memref<f32>) name("f") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=kernel_environment | Remark="Generating cache(readonly:g)"
- %cache_readonly = acc.cache varPtr(%arg6 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_cache_readonly>, name = "g"}
+ %cache_readonly = acc.cache varPtr(%arg6 : memref<f32>) dataClause(acc_cache_readonly) name("g") -> memref<f32>
acc.kernel_environment dataOperands(%copyin, %private, %firstprivate,
%use_device, %reduction, %cache, %cache_readonly : memref<f32>,
memref<f32>, memref<f32>, memref<f32>, memref<f32>, memref<f32>,
@@ -148,19 +130,17 @@ func.func @kernel_environment(
func.func @structured_declare(
%arg0: memref<f32>, %arg1: memref<f32>, %arg2: memref<f32>) {
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_declare | Remark="Generating create(a) [if not already present]"
- %create = acc.create varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "a"}
+ %create = acc.create varPtr(%arg0 : memref<f32>) name("a") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_declare | Remark="Generating device_resident(b)"
%device_resident = acc.declare_device_resident varPtr(%arg1 : memref<f32>)
- -> memref<f32> {name = "b"}
+ name("b") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=structured_declare | Remark="Generating link(c)"
- %link = acc.declare_link varPtr(%arg2 : memref<f32>) -> memref<f32>
- {name = "c"}
+ %link = acc.declare_link varPtr(%arg2 : memref<f32>) name("c") -> memref<f32>
%token = acc.declare_enter dataOperands(%create, %device_resident, %link
: memref<f32>, memref<f32>, memref<f32>)
acc.declare_exit token(%token) dataOperands(%create : memref<f32>)
acc.delete accPtr(%create : memref<f32>)
- {dataClause = #acc<data_clause acc_create>}
+ dataClause(acc_create)
return
}
@@ -168,14 +148,11 @@ func.func @structured_declare(
func.func @enter_data(
%arg0: memref<f32>, %arg1: memref<f32>, %arg2: memref<f32>) {
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=enter_data | Remark="Generating enter data copyin(a) [if not already present]"
- %copyin = acc.copyin varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "a"}
+ %copyin = acc.copyin varPtr(%arg0 : memref<f32>) name("a") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=enter_data | Remark="Generating enter data create(b) [if not already present]"
- %create = acc.create varPtr(%arg1 : memref<f32>) -> memref<f32>
- {name = "b"}
+ %create = acc.create varPtr(%arg1 : memref<f32>) name("b") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=enter_data | Remark="Generating enter data attach(c)"
- %attach = acc.attach varPtr(%arg2 : memref<f32>) -> memref<f32>
- {name = "c"}
+ %attach = acc.attach varPtr(%arg2 : memref<f32>) name("c") -> memref<f32>
acc.enter_data dataOperands(%copyin, %create, %attach
: memref<f32>, memref<f32>, memref<f32>)
return
@@ -184,14 +161,11 @@ func.func @enter_data(
func.func @exit_data(
%arg0: memref<f32>, %arg1: memref<f32>, %arg2: memref<f32>) {
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=exit_data | Remark="Generating exit data copyout(a) [if not already present]"
- %copyout = acc.getdeviceptr varPtr(%arg0 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_copyout>, name = "a"}
+ %copyout = acc.getdeviceptr varPtr(%arg0 : memref<f32>) dataClause(acc_copyout) name("a") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=exit_data | Remark="Generating exit data delete(b)"
- %delete = acc.getdeviceptr varPtr(%arg1 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_delete>, name = "b"}
+ %delete = acc.getdeviceptr varPtr(%arg1 : memref<f32>) dataClause(acc_delete) name("b") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=exit_data | Remark="Generating exit data detach(c)"
- %detach = acc.getdeviceptr varPtr(%arg2 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_detach>, name = "c"}
+ %detach = acc.getdeviceptr varPtr(%arg2 : memref<f32>) dataClause(acc_detach) name("c") -> memref<f32>
acc.exit_data dataOperands(%copyout, %delete, %detach
: memref<f32>, memref<f32>, memref<f32>)
acc.copyout accPtr(%copyout : memref<f32>) to varPtr(%arg0 : memref<f32>)
@@ -204,21 +178,18 @@ func.func @exit_data(
func.func @update(
%arg0: memref<f32>, %arg1: memref<f32>, %arg2: memref<f32>) {
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=update | Remark="Generating update_host(a)"
- %update_host = acc.getdeviceptr varPtr(%arg0 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_update_host>, name = "a"}
+ %update_host = acc.getdeviceptr varPtr(%arg0 : memref<f32>) dataClause(acc_update_host) name("a") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=update | Remark="Generating update_self(b)"
- %update_self = acc.getdeviceptr varPtr(%arg1 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_update_self>, name = "b"}
+ %update_self = acc.getdeviceptr varPtr(%arg1 : memref<f32>) dataClause(acc_update_self) name("b") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=update | Remark="Generating update_device(c)"
- %update_device = acc.update_device varPtr(%arg2 : memref<f32>) -> memref<f32>
- {name = "c"}
+ %update_device = acc.update_device varPtr(%arg2 : memref<f32>) name("c") -> memref<f32>
acc.update dataOperands(%update_host, %update_self, %update_device
: memref<f32>, memref<f32>, memref<f32>)
acc.update_host accPtr(%update_host : memref<f32>)
to varPtr(%arg0 : memref<f32>)
acc.update_host accPtr(%update_self : memref<f32>)
to varPtr(%arg1 : memref<f32>)
- {dataClause = #acc<data_clause acc_update_self>}
+ dataClause(acc_update_self)
return
}
@@ -226,11 +197,10 @@ func.func @update(
// from a default clause are marked as default.
func.func @implicit_and_default(%arg0: memref<f32>, %arg1: memref<f32>) {
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=implicit_and_default | Remark="Generating default copyin(a) [if not already present]"
- %from_default = acc.copyin varPtr(%arg0 : memref<f32>) -> memref<f32>
- {acc.from_default, name = "a"}
+ %from_default = acc.copyin varPtr(%arg0 : memref<f32>) name("a") -> memref<f32>
+ {acc.from_default}
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=implicit_and_default | Remark="Generating implicit present(b)"
- %implicit = acc.present varPtr(%arg1 : memref<f32>) -> memref<f32>
- {implicit = true, name = "b"}
+ %implicit = acc.present varPtr(%arg1 : memref<f32>) implicit(true) name("b") -> memref<f32>
acc.data dataOperands(%from_default, %implicit : memref<f32>, memref<f32>) {
acc.terminator
}
@@ -243,19 +213,14 @@ func.func @implicit_and_default(%arg0: memref<f32>, %arg1: memref<f32>) {
func.func @grouping_and_sorting(
%arg0: memref<f32>, %arg1: memref<f32>, %arg2: memref<f32>,
%arg3: memref<f32>, %arg4: memref<f32>) {
- %copyin_z = acc.copyin varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "z"}
+ %copyin_z = acc.copyin varPtr(%arg0 : memref<f32>) name("z") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=grouping_and_sorting | Remark="Generating copyin(x, y, z) [if not already present]"
- %copyin_x = acc.copyin varPtr(%arg1 : memref<f32>) -> memref<f32>
- {name = "x"}
- %copyin_y = acc.copyin varPtr(%arg2 : memref<f32>) -> memref<f32>
- {name = "y"}
+ %copyin_x = acc.copyin varPtr(%arg1 : memref<f32>) name("x") -> memref<f32>
+ %copyin_y = acc.copyin varPtr(%arg2 : memref<f32>) name("y") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=grouping_and_sorting | Remark="Generating implicit copyin(i) [if not already present]"
- %copyin_i = acc.copyin varPtr(%arg3 : memref<f32>) -> memref<f32>
- {implicit = true, name = "i"}
+ %copyin_i = acc.copyin varPtr(%arg3 : memref<f32>) implicit(true) name("i") -> memref<f32>
// CHECK: [[@LINE+1]]:{{[0-9]+}}: remark: [Passed] openacc | Category:acc-emit-remarks-data | Function=grouping_and_sorting | Remark="Generating present(p)"
- %present = acc.present varPtr(%arg4 : memref<f32>) -> memref<f32>
- {name = "p"}
+ %present = acc.present varPtr(%arg4 : memref<f32>) name("p") -> memref<f32>
acc.data dataOperands(%copyin_z, %copyin_x, %copyin_y, %copyin_i, %present
: memref<f32>, memref<f32>, memref<f32>, memref<f32>, memref<f32>) {
acc.terminator
@@ -274,8 +239,7 @@ func.func @grouping_and_sorting(
// The synthetic getdeviceptr clause and clauses without a variable name are
// not reported.
func.func @not_reportable_clauses(%arg0: memref<f32>, %arg1: memref<f32>) {
- %synthetic = acc.getdeviceptr varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "synthetic"}
+ %synthetic = acc.getdeviceptr varPtr(%arg0 : memref<f32>) name("synthetic") -> memref<f32>
%unnamed = acc.copyin varPtr(%arg1 : memref<f32>) -> memref<f32>
acc.data dataOperands(%synthetic, %unnamed : memref<f32>, memref<f32>) {
acc.terminator
@@ -287,15 +251,14 @@ func.func @not_reportable_clauses(%arg0: memref<f32>, %arg1: memref<f32>) {
func.func @default_only_data() {
acc.data {
acc.terminator
- } attributes {defaultAttr = #acc<defaultvalue none>}
+ } defaultAttr(none)
return
}
// A declare enter whose token is unused registers the variables for the whole
// program instead of a region, and is not reported.
func.func @unstructured_declare(%arg0: memref<f32>) {
- %create = acc.create varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "a"}
+ %create = acc.create varPtr(%arg0 : memref<f32>) name("a") -> memref<f32>
acc.declare_enter dataOperands(%create : memref<f32>)
return
}
@@ -304,8 +267,7 @@ func.func @unstructured_declare(%arg0: memref<f32>) {
// are reported at the declare enter, and an unstructured declare exit only
// unregisters variables.
func.func @declare_exit(%arg0: memref<f32>) {
- %delete = acc.getdeviceptr varPtr(%arg0 : memref<f32>) -> memref<f32>
- {dataClause = #acc<data_clause acc_delete>, name = "a"}
+ %delete = acc.getdeviceptr varPtr(%arg0 : memref<f32>) dataClause(acc_delete) name("a") -> memref<f32>
acc.declare_exit dataOperands(%delete : memref<f32>)
acc.delete accPtr(%delete : memref<f32>)
return
@@ -314,8 +276,7 @@ func.func @declare_exit(%arg0: memref<f32>) {
// Data clauses on a compute construct are not reported by this pass - they are
// reported once they are outlined into a kernel environment.
func.func @compute_construct(%arg0: memref<f32>) {
- %copyin = acc.copyin varPtr(%arg0 : memref<f32>) -> memref<f32>
- {name = "a"}
+ %copyin = acc.copyin varPtr(%arg0 : memref<f32>) name("a") -> memref<f32>
acc.parallel dataOperands(%copyin : memref<f32>) {
acc.yield
}
diff --git a/mlir/test/Dialect/OpenACC/acc-emit-remarks-loop-pipeline.mlir b/mlir/test/Dialect/OpenACC/acc-emit-remarks-loop-pipeline.mlir
index c559ef68090e2..9f30ba27c30ed 100644
--- a/mlir/test/Dialect/OpenACC/acc-emit-remarks-loop-pipeline.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-emit-remarks-loop-pipeline.mlir
@@ -12,7 +12,7 @@ func.func @parallel_gang_loop(%buf: memref<1xi32>) {
acc.loop gang control(%arg0 : i32) = (%c1_i32 : i32) to (%c100_i32 : i32) step (%c1_i32 : i32) {
memref.store %arg0, %dev[%c0] : memref<1xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
acc.copyout accPtr(%dev : memref<1xi32>) to varPtr(%buf : memref<1xi32>)
@@ -32,7 +32,7 @@ func.func @parallel_loop_auto_collapse(%buf: memref<1xi32>, %lb0 : index, %ub0 :
%vi = arith.index_cast %i : index to i32
memref.store %vi, %dev[%c0] : memref<1xi32>
acc.yield
- } attributes {auto_ = [#acc.device_type<none>]}
+ } auto_
acc.yield
}
acc.copyout accPtr(%dev : memref<1xi32>) to varPtr(%buf : memref<1xi32>)
diff --git a/mlir/test/Dialect/OpenACC/acc-emit-remarks-loop.mlir b/mlir/test/Dialect/OpenACC/acc-emit-remarks-loop.mlir
index 0c310510652e7..28d76ff751feb 100644
--- a/mlir/test/Dialect/OpenACC/acc-emit-remarks-loop.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-emit-remarks-loop.mlir
@@ -5,7 +5,7 @@
func.func @vector_loop() {
%c128 = arith.constant 128 : index
acc.kernel_environment {
- %w0 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w0) {
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
@@ -25,7 +25,7 @@ func.func @vector_loop() {
func.func @gang_loop() {
%c8 = arith.constant 8 : index
acc.kernel_environment {
- %w0 = acc.par_width %c8 {par_dim = #acc.par_dim<block_x>}
+ %w0 = acc.par_width %c8 par_dim(#acc.par_dim<block_x>)
acc.compute_region launch(%arg0 = %w0) {
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
@@ -45,7 +45,7 @@ func.func @gang_loop() {
func.func @worker_loop() {
%c4 = arith.constant 4 : index
acc.kernel_environment {
- %w0 = acc.par_width %c4 {par_dim = #acc.par_dim<thread_y>}
+ %w0 = acc.par_width %c4 par_dim(#acc.par_dim<thread_y>)
acc.compute_region launch(%arg0 = %w0) {
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
@@ -84,8 +84,8 @@ func.func @block_and_vector() {
%c8 = arith.constant 8 : index
%c128 = arith.constant 128 : index
acc.kernel_environment {
- %w0 = acc.par_width %c8 {par_dim = #acc.par_dim<block_x>}
- %w1 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width %c8 par_dim(#acc.par_dim<block_x>)
+ %w1 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w0, %arg1 = %w1) {
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
@@ -140,7 +140,7 @@ func.func @collapse_loop() {
func.func @percent_separator() {
%c128 = arith.constant 128 : index
acc.kernel_environment {
- %w0 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w0) {
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
diff --git a/mlir/test/Dialect/OpenACC/acc-emit-remarks-private.mlir b/mlir/test/Dialect/OpenACC/acc-emit-remarks-private.mlir
index b388ad51208a2..1ec0b5e49f44d 100644
--- a/mlir/test/Dialect/OpenACC/acc-emit-remarks-private.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-emit-remarks-private.mlir
@@ -39,7 +39,7 @@ func.func @firstpriv_implicit() {
%c1336 = arith.constant 1336 : i32
%alloc = memref.alloca() : memref<i32>
memref.store %c1336, %alloc[] : memref<i32>
- %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_memref_i32) -> memref<i32> {implicit = true, name = "t"}
+ %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_memref_i32) implicit(true) name("t") -> memref<i32>
acc.parallel firstprivate(%fp : memref<i32>) {
%c1 = arith.constant 1 : i32
%v = memref.load %fp[] : memref<i32>
@@ -55,7 +55,7 @@ func.func @firstpriv_explicit() {
%c1336 = arith.constant 1336 : i32
%alloc = memref.alloca() : memref<i32>
memref.store %c1336, %alloc[] : memref<i32>
- %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_memref_i32) -> memref<i32> {name = "t"}
+ %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_memref_i32) name("t") -> memref<i32>
acc.parallel firstprivate(%fp : memref<i32>) {
%c1 = arith.constant 1 : i32
%v = memref.load %fp[] : memref<i32>
@@ -70,12 +70,12 @@ func.func @firstpriv_explicit() {
func.func @private_loop_implicit(%arg0 : memref<i64>) {
%c16 = arith.constant 16 : index
%c1 = arith.constant 1 : index
- %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) -> memref<i64> {implicit = true, name = "x"}
+ %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) implicit(true) name("x") -> memref<i64>
acc.loop private(%priv : memref<i64>) control(%siv : index) = (%c1 : index) to (%c16 : index) step (%c1 : index) {
%iv_i64 = arith.index_cast %siv : index to i64
memref.store %iv_i64, %priv[] : memref<i64>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -83,12 +83,12 @@ func.func @private_loop_implicit(%arg0 : memref<i64>) {
func.func @private_loop_unknown(%arg0 : memref<i64>) {
%c16 = arith.constant 16 : index
%c1 = arith.constant 1 : index
- %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) -> memref<i64> {implicit = true, name = ""}
+ %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) implicit(true) name("") -> memref<i64>
acc.loop private(%priv : memref<i64>) control(%siv : index) = (%c1 : index) to (%c16 : index) step (%c1 : index) {
%iv_i64 = arith.index_cast %siv : index to i64
memref.store %iv_i64, %priv[] : memref<i64>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -96,13 +96,13 @@ func.func @private_loop_unknown(%arg0 : memref<i64>) {
func.func @private_explicit(%arg0 : memref<i64>) {
%c16 = arith.constant 16 : index
%c1 = arith.constant 1 : index
- %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) -> memref<i64> {name = "x"}
+ %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) name("x") -> memref<i64>
acc.parallel private(%priv : memref<i64>) {
acc.loop control(%siv : index) = (%c1 : index) to (%c16 : index) step (%c1 : index) {
%iv_i64 = arith.index_cast %siv : index to i64
memref.store %iv_i64, %priv[] : memref<i64>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
return
@@ -110,8 +110,8 @@ func.func @private_explicit(%arg0 : memref<i64>) {
// CHECK-LABEL: func.func @multi_private_implicit
func.func @multi_private_implicit(%arg0 : memref<i64>, %arg1 : memref<i64>) {
- %privA = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) -> memref<i64> {implicit = true, name = "a"}
- %privB = acc.private varPtr(%arg1 : memref<i64>) recipe(@privatization_memref_i64) -> memref<i64> {implicit = true, name = "b"}
+ %privA = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) implicit(true) name("a") -> memref<i64>
+ %privB = acc.private varPtr(%arg1 : memref<i64>) recipe(@privatization_memref_i64) implicit(true) name("b") -> memref<i64>
acc.parallel private(%privA, %privB : memref<i64>, memref<i64>) {
acc.yield
}
diff --git a/mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir b/mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
index cbdf9a1018804..f43744647f313 100644
--- a/mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
@@ -10,12 +10,12 @@ func.func @test_parallel_if(%arg0: memref<10xi32>, %cond: i1) {
%c10 = arith.constant 10 : index
%copyin = acc.copyin varPtr(%arg0 : memref<10xi32>) -> memref<10xi32>
- %create = acc.create varPtr(%arg0 : memref<10xi32>) -> memref<10xi32> {dataClause = #acc<data_clause acc_copyout>}
+ %create = acc.create varPtr(%arg0 : memref<10xi32>) dataClause(acc_copyout) -> memref<10xi32>
// CHECK-NOT: acc.parallel if
// CHECK: scf.if %{{.*}} {
// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr(%{{.*}}) -> memref<10xi32>
- // CHECK: %[[CREATE:.*]] = acc.create varPtr(%{{.*}}) -> memref<10xi32>
+ // CHECK: %[[CREATE:.*]] = acc.create varPtr(%{{.*}}) dataClause(acc_copyout) -> memref<10xi32>
// CHECK: acc.parallel dataOperands(%[[COPYIN]], %[[CREATE]] : memref<10xi32>, memref<10xi32>) {
// CHECK: scf.for
// CHECK: acc.yield
@@ -83,7 +83,7 @@ func.func @test_kernels_if(%arg0: memref<5xi32>, %cond: i1) {
%c5 = arith.constant 5 : index
%copyin = acc.copyin varPtr(%arg0 : memref<5xi32>) -> memref<5xi32>
- %create = acc.create varPtr(%arg0 : memref<5xi32>) -> memref<5xi32> {dataClause = #acc<data_clause acc_copyout>}
+ %create = acc.create varPtr(%arg0 : memref<5xi32>) dataClause(acc_copyout) -> memref<5xi32>
// CHECK-NOT: acc.kernels if
// CHECK: scf.if %{{.*}} {
@@ -120,7 +120,7 @@ func.func @test_serial_if(%arg0: memref<8xi32>, %cond: i1) {
%c8 = arith.constant 8 : index
%copyin = acc.copyin varPtr(%arg0 : memref<8xi32>) -> memref<8xi32>
- %create = acc.create varPtr(%arg0 : memref<8xi32>) -> memref<8xi32> {dataClause = #acc<data_clause acc_copyout>}
+ %create = acc.create varPtr(%arg0 : memref<8xi32>) dataClause(acc_copyout) -> memref<8xi32>
// CHECK-NOT: acc.serial if
// CHECK: scf.if %{{.*}} {
@@ -200,7 +200,7 @@ func.func @test_reduction_if(%r: memref<f32>, %a: memref<8xf32>, %cond: i1) {
%c8_i32 = arith.constant 8 : i32
%c1_i32 = arith.constant 1 : i32
- %copyin = acc.copyin varPtr(%r : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_reduction>, implicit = true}
+ %copyin = acc.copyin varPtr(%r : memref<f32>) dataClause(acc_reduction) implicit(true) -> memref<f32>
// CHECK: scf.if
// CHECK: acc.parallel
@@ -223,11 +223,11 @@ func.func @test_reduction_if(%r: memref<f32>, %a: memref<8xf32>, %cond: i1) {
%new_r = arith.addf %r_val, %elem : f32
memref.store %new_r, %r[] : memref<f32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.yield
}
- acc.copyout accPtr(%copyin : memref<f32>) to varPtr(%r : memref<f32>) {dataClause = #acc<data_clause acc_reduction>, implicit = true}
+ acc.copyout accPtr(%copyin : memref<f32>) to varPtr(%r : memref<f32>) dataClause(acc_reduction) implicit(true)
return
}
diff --git a/mlir/test/Dialect/OpenACC/acc-implicit-data-defaultnone.mlir b/mlir/test/Dialect/OpenACC/acc-implicit-data-defaultnone.mlir
index c8e550af001cf..618eb1c900399 100644
--- a/mlir/test/Dialect/OpenACC/acc-implicit-data-defaultnone.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-implicit-data-defaultnone.mlir
@@ -11,7 +11,7 @@ func.func @test_scalar_parallel_defaultnone() {
acc.parallel {
%load = memref.load %alloc[] : memref<f32>
acc.yield
- } attributes {defaultAttr = #acc<defaultvalue none>}
+ } defaultAttr(none)
return
}
@@ -20,4 +20,4 @@ func.func @test_scalar_parallel_defaultnone() {
// CHECK-NOT: acc.copyin
// ENABLED-LABEL: func.func @test_scalar_parallel_defaultnone
-// ENABLED: acc.firstprivate varPtr({{.*}} : memref<f32>) recipe({{.*}}) -> memref<f32> {implicit = true, name = ""}
+// ENABLED: acc.firstprivate varPtr({{.*}} : memref<f32>) recipe({{.*}}) implicit(true) name("") -> memref<f32>
diff --git a/mlir/test/Dialect/OpenACC/acc-implicit-data-reduction.mlir b/mlir/test/Dialect/OpenACC/acc-implicit-data-reduction.mlir
index fed0a4b98ee88..f744618030477 100644
--- a/mlir/test/Dialect/OpenACC/acc-implicit-data-reduction.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-implicit-data-reduction.mlir
@@ -28,13 +28,13 @@ func.func @test_reduction_implicit_copy() {
memref.store %c0_i32, %r[] : memref<i32>
acc.parallel {
- %red_var = acc.reduction varPtr(%r : memref<i32>) recipe(@reduction_add_memref_i32) -> memref<i32> {name = "r"}
+ %red_var = acc.reduction varPtr(%r : memref<i32>) recipe(@reduction_add_memref_i32) name("r") -> memref<i32>
acc.loop reduction(%red_var : memref<i32>) control(%iv : i32) = (%c1_i32 : i32) to (%c100_i32 : i32) step (%c1_i32 : i32) {
%load = memref.load %red_var[] : memref<i32>
%add = arith.addi %load, %c1_i32 : i32
memref.store %add, %red_var[] : memref<i32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
return
@@ -42,12 +42,12 @@ func.func @test_reduction_implicit_copy() {
// When enable-implicit-reduction-copy=true: expect copyin/copyout for reduction variable
// COPY-LABEL: func.func @test_reduction_implicit_copy
-// COPY: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<i32>) -> memref<i32> {dataClause = #acc<data_clause acc_reduction>, implicit = true, name = ""}
-// COPY: acc.copyout accPtr(%[[COPYIN]] : memref<i32>) to varPtr({{.*}} : memref<i32>) {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
+// COPY: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<i32>) dataClause(acc_reduction) implicit(true) name("") -> memref<i32>
+// COPY: acc.copyout accPtr(%[[COPYIN]] : memref<i32>) to varPtr({{.*}} : memref<i32>) dataClause(acc_copy) implicit(true) name("")
// When enable-implicit-reduction-copy=false: expect firstprivate for reduction variable
// FIRSTPRIVATE-LABEL: func.func @test_reduction_implicit_copy
-// FIRSTPRIVATE: acc.firstprivate varPtr({{.*}} : memref<i32>) recipe({{.*}}) -> memref<i32> {implicit = true, name = ""}
+// FIRSTPRIVATE: acc.firstprivate varPtr({{.*}} : memref<i32>) recipe({{.*}}) implicit(true) name("") -> memref<i32>
// FIRSTPRIVATE-NOT: acc.copyin
// FIRSTPRIVATE-NOT: acc.copyout
@@ -79,31 +79,31 @@ func.func @test_reduction_with_usage_outside_loop() {
%out = memref.alloca() : memref<i32>
memref.store %c0_i32, %r[] : memref<i32>
- %out_create = acc.create varPtr(%out : memref<i32>) -> memref<i32> {dataClause = #acc<data_clause acc_copyout>, name = "out"}
+ %out_create = acc.create varPtr(%out : memref<i32>) dataClause(acc_copyout) name("out") -> memref<i32>
acc.parallel dataOperands(%out_create : memref<i32>) {
- %red_var = acc.reduction varPtr(%r : memref<i32>) recipe(@reduction_add_memref_i32_2) -> memref<i32> {name = "r"}
+ %red_var = acc.reduction varPtr(%r : memref<i32>) recipe(@reduction_add_memref_i32_2) name("r") -> memref<i32>
acc.loop reduction(%red_var : memref<i32>) control(%iv : i32) = (%c1_i32 : i32) to (%c100_i32 : i32) step (%c1_i32 : i32) {
%load = memref.load %red_var[] : memref<i32>
%add = arith.addi %load, %c1_i32 : i32
memref.store %add, %red_var[] : memref<i32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
// out = r (usage of r outside the loop)
%final_r = memref.load %r[] : memref<i32>
memref.store %final_r, %out_create[] : memref<i32>
acc.yield
}
- acc.copyout accPtr(%out_create : memref<i32>) to varPtr(%out : memref<i32>) {dataClause = #acc<data_clause acc_copyout>, name = "out"}
+ acc.copyout accPtr(%out_create : memref<i32>) to varPtr(%out : memref<i32>) dataClause(acc_copyout) name("out")
return
}
// In this case, r should be firstprivate regardless of the flag setting
// because it's used outside the reduction context
// COPY-LABEL: func.func @test_reduction_with_usage_outside_loop
-// COPY: acc.firstprivate varPtr({{.*}} : memref<i32>) recipe({{.*}}) -> memref<i32> {implicit = true, name = ""}
+// COPY: acc.firstprivate varPtr({{.*}} : memref<i32>) recipe({{.*}}) implicit(true) name("") -> memref<i32>
// COPY-NOT: acc.copyin varPtr({{.*}} : memref<i32>) -> memref<i32> {{.*}} name = ""
// FIRSTPRIVATE-LABEL: func.func @test_reduction_with_usage_outside_loop
-// FIRSTPRIVATE: acc.firstprivate varPtr({{.*}} : memref<i32>) recipe({{.*}}) -> memref<i32> {implicit = true, name = ""}
+// FIRSTPRIVATE: acc.firstprivate varPtr({{.*}} : memref<i32>) recipe({{.*}}) implicit(true) name("") -> memref<i32>
// FIRSTPRIVATE-NOT: acc.copyin varPtr({{.*}} : memref<i32>) -> memref<i32> {{.*}} name = ""
diff --git a/mlir/test/Dialect/OpenACC/acc-implicit-data.mlir b/mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
index 3b6b5e1ade5e0..1ad0abb78b9ec 100644
--- a/mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-implicit-data.mlir
@@ -13,7 +13,7 @@ func.func @test_scalar_in_serial() {
}
// CHECK-LABEL: func.func @test_scalar_in_serial
-// CHECK: acc.firstprivate varPtr({{.*}} : memref<i64>) recipe({{.*}}) -> memref<i64> {implicit = true, name = ""}
+// CHECK: acc.firstprivate varPtr({{.*}} : memref<i64>) recipe({{.*}}) implicit(true) name("") -> memref<i64>
// -----
@@ -28,7 +28,7 @@ func.func @test_scalar_in_parallel() {
}
// CHECK-LABEL: func.func @test_scalar_in_parallel
-// CHECK: acc.firstprivate varPtr({{.*}} : memref<f32>) recipe({{.*}}) -> memref<f32> {implicit = true, name = ""}
+// CHECK: acc.firstprivate varPtr({{.*}} : memref<f32>) recipe({{.*}}) implicit(true) name("") -> memref<f32>
// -----
@@ -43,8 +43,8 @@ func.func @test_scalar_in_kernels() {
}
// CHECK-LABEL: func.func @test_scalar_in_kernels
-// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<f64>) -> memref<f64> {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
-// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<f64>) to varPtr({{.*}} : memref<f64>) {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
+// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<f64>) dataClause(acc_copy) implicit(true) name("") -> memref<f64>
+// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<f64>) to varPtr({{.*}} : memref<f64>) dataClause(acc_copy) implicit(true) name("")
// -----
@@ -54,7 +54,7 @@ func.func @test_scalar_parallel_defaultnone() {
acc.parallel {
%load = memref.load %alloc[] : memref<f32>
acc.yield
- } attributes {defaultAttr = #acc<defaultvalue none>}
+ } defaultAttr(none)
return
}
@@ -76,8 +76,8 @@ func.func @test_array_in_parallel() {
}
// CHECK-LABEL: func.func @test_array_in_parallel
-// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
-// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<10xf32>) to varPtr({{.*}} : memref<10xf32>) {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
+// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<10xf32>) dataClause(acc_copy) implicit(true) name("") -> memref<10xf32>
+// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<10xf32>) to varPtr({{.*}} : memref<10xf32>) dataClause(acc_copy) implicit(true) name("")
// -----
@@ -93,8 +93,8 @@ func.func @test_array_in_kernels() {
}
// CHECK-LABEL: func.func @test_array_in_kernels
-// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<20xi32>) -> memref<20xi32> {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
-// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<20xi32>) to varPtr({{.*}} : memref<20xi32>) {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
+// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<20xi32>) dataClause(acc_copy) implicit(true) name("") -> memref<20xi32>
+// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<20xi32>) to varPtr({{.*}} : memref<20xi32>) dataClause(acc_copy) implicit(true) name("")
// -----
@@ -105,13 +105,13 @@ func.func @test_array_parallel_defaultpresent() {
%c0 = arith.constant 0 : index
%load = memref.load %alloc[%c0] : memref<10xf32>
acc.yield
- } attributes {defaultAttr = #acc<defaultvalue present>}
+ } defaultAttr(present)
return
}
// CHECK-LABEL: func.func @test_array_parallel_defaultpresent
-// CHECK: %[[PRESENT:.*]] = acc.present varPtr({{.*}} : memref<10xf32>) -> memref<10xf32> {acc.from_default, implicit = true, name = ""}
-// CHECK: acc.delete accPtr(%[[PRESENT]] : memref<10xf32>) {dataClause = #acc<data_clause acc_present>, implicit = true, name = ""}
+// CHECK: %[[PRESENT:.*]] = acc.present varPtr({{.*}} : memref<10xf32>) implicit(true) name("") -> memref<10xf32> {acc.from_default}
+// CHECK: acc.delete accPtr(%[[PRESENT]] : memref<10xf32>) dataClause(acc_present) implicit(true) name("")
// -----
@@ -121,12 +121,12 @@ func.func @test_scalar_parallel_defaultpresent() {
acc.parallel {
%load = memref.load %alloc[] : memref<f32>
acc.yield
- } attributes {defaultAttr = #acc<defaultvalue present>}
+ } defaultAttr(present)
return
}
// CHECK-LABEL: func.func @test_scalar_parallel_defaultpresent
-// CHECK: acc.firstprivate varPtr({{.*}} : memref<f32>) recipe({{.*}}) -> memref<f32> {implicit = true, name = ""}
+// CHECK: acc.firstprivate varPtr({{.*}} : memref<f32>) recipe({{.*}}) implicit(true) name("") -> memref<f32>
// -----
@@ -143,8 +143,8 @@ func.func @test_multidim_array_in_parallel() {
}
// CHECK-LABEL: func.func @test_multidim_array_in_parallel
-// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<8x16xf32>) -> memref<8x16xf32> {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
-// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<8x16xf32>) to varPtr({{.*}} : memref<8x16xf32>) {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
+// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<8x16xf32>) dataClause(acc_copy) implicit(true) name("") -> memref<8x16xf32>
+// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<8x16xf32>) to varPtr({{.*}} : memref<8x16xf32>) dataClause(acc_copy) implicit(true) name("")
// -----
@@ -160,26 +160,26 @@ func.func @test_dynamic_array(%size: index) {
}
// CHECK-LABEL: func.func @test_dynamic_array
-// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<?xf64>) -> memref<?xf64> {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
-// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<?xf64>) to varPtr({{.*}} : memref<?xf64>) {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
+// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<?xf64>) dataClause(acc_copy) implicit(true) name("") -> memref<?xf64>
+// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<?xf64>) to varPtr({{.*}} : memref<?xf64>) dataClause(acc_copy) implicit(true) name("")
// -----
// Test variable with explicit data clause - implicit should recognize it
func.func @test_with_explicit_copyin() {
%alloc = memref.alloca() : memref<100xf32>
- %copyin = acc.copyin varPtr(%alloc : memref<100xf32>) -> memref<100xf32> {name = "explicit"}
+ %copyin = acc.copyin varPtr(%alloc : memref<100xf32>) name("explicit") -> memref<100xf32>
acc.parallel dataOperands(%copyin : memref<100xf32>) {
%c0 = arith.constant 0 : index
%load = memref.load %alloc[%c0] : memref<100xf32>
acc.yield
}
- acc.copyout accPtr(%copyin : memref<100xf32>) to varPtr(%alloc : memref<100xf32>) {name = "explicit"}
+ acc.copyout accPtr(%copyin : memref<100xf32>) to varPtr(%alloc : memref<100xf32>) name("explicit")
return
}
// CHECK-LABEL: func.func @test_with_explicit_copyin
-// CHECK: acc.present varPtr({{.*}} : memref<100xf32>) -> memref<100xf32> {implicit = true, name = ""}
+// CHECK: acc.present varPtr({{.*}} : memref<100xf32>) implicit(true) name("") -> memref<100xf32>
// -----
@@ -197,9 +197,9 @@ func.func @test_multiple_variables() {
}
// CHECK-LABEL: func.func @test_multiple_variables
-// CHECK: acc.firstprivate varPtr({{.*}} : memref<f32>) recipe({{.*}}) -> memref<f32> {implicit = true, name = ""}
-// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<10xi32>) -> memref<10xi32> {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
-// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<10xi32>) to varPtr({{.*}} : memref<10xi32>) {dataClause = #acc<data_clause acc_copy>, implicit = true, name = ""}
+// CHECK: acc.firstprivate varPtr({{.*}} : memref<f32>) recipe({{.*}}) implicit(true) name("") -> memref<f32>
+// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr({{.*}} : memref<10xi32>) dataClause(acc_copy) implicit(true) name("") -> memref<10xi32>
+// CHECK: acc.copyout accPtr(%[[COPYIN]] : memref<10xi32>) to varPtr({{.*}} : memref<10xi32>) dataClause(acc_copy) implicit(true) name("")
// -----
@@ -207,7 +207,7 @@ func.func @test_multiple_variables() {
func.func @test_memref_view(%size: index) {
%c0 = arith.constant 0 : index
%buffer = memref.alloca(%size) : memref<?xi8>
- %copyin = acc.copyin varPtr(%buffer : memref<?xi8>) -> memref<?xi8> {name = "buffer"}
+ %copyin = acc.copyin varPtr(%buffer : memref<?xi8>) name("buffer") -> memref<?xi8>
%view = memref.view %buffer[%c0][] : memref<?xi8> to memref<8x64xf32>
acc.kernels dataOperands(%copyin : memref<?xi8>) {
%c0_0 = arith.constant 0 : index
@@ -215,12 +215,12 @@ func.func @test_memref_view(%size: index) {
%load = memref.load %view[%c0_0, %c0_1] : memref<8x64xf32>
acc.terminator
}
- acc.copyout accPtr(%copyin : memref<?xi8>) to varPtr(%buffer : memref<?xi8>) {name = "buffer"}
+ acc.copyout accPtr(%copyin : memref<?xi8>) to varPtr(%buffer : memref<?xi8>) name("buffer")
return
}
// CHECK-LABEL: func.func @test_memref_view
-// CHECK: acc.present varPtr({{.*}} : memref<8x64xf32>) -> memref<8x64xf32> {implicit = true, name = ""}
+// CHECK: acc.present varPtr({{.*}} : memref<8x64xf32>) implicit(true) name("") -> memref<8x64xf32>
// -----
@@ -236,7 +236,7 @@ func.func @test_device_data_in_parallel() {
}
// CHECK-LABEL: func.func @test_device_data_in_parallel
-// CHECK: acc.deviceptr varPtr({{.*}} : memref<10xf32, #gpu.address_space<global>>) -> memref<10xf32, #gpu.address_space<global>> {implicit = true, name = ""}
+// CHECK: acc.deviceptr varPtr({{.*}} : memref<10xf32, #gpu.address_space<global>>) implicit(true) name("") -> memref<10xf32, #gpu.address_space<global>>
// CHECK-NOT: acc.copyin
// CHECK-NOT: acc.copyout
@@ -256,7 +256,7 @@ func.func @test_device_global_in_parallel() {
}
// CHECK-LABEL: func.func @test_device_global_in_parallel
-// CHECK: acc.deviceptr varPtr({{.*}} : memref<10xf32, #gpu.address_space<global>>) -> memref<10xf32, #gpu.address_space<global>> {implicit = true, name = ""}
+// CHECK: acc.deviceptr varPtr({{.*}} : memref<10xf32, #gpu.address_space<global>>) implicit(true) name("") -> memref<10xf32, #gpu.address_space<global>>
// CHECK-NOT: acc.copyin
// CHECK-NOT: acc.copyout
@@ -266,7 +266,7 @@ func.func @test_device_global_in_parallel() {
func.func @test_declare_deviceptr_arg_in_parallel(%arg0: memref<?xi8>) {
%c0 = arith.constant 0 : index
%view = memref.view %arg0[%c0][] {acc.declare = #acc.declare<dataClause = acc_deviceptr>} : memref<?xi8> to memref<10xf32>
- %devptr = acc.deviceptr varPtr(%view : memref<10xf32>) -> memref<10xf32> {name = "arg0"}
+ %devptr = acc.deviceptr varPtr(%view : memref<10xf32>) name("arg0") -> memref<10xf32>
%token = acc.declare_enter dataOperands(%devptr : memref<10xf32>)
acc.parallel {
%c0_1 = arith.constant 0 : index
@@ -279,9 +279,9 @@ func.func @test_declare_deviceptr_arg_in_parallel(%arg0: memref<?xi8>) {
// CHECK-LABEL: func.func @test_declare_deviceptr_arg_in_parallel
// CHECK: %[[VIEW:.*]] = memref.view %{{.*}}[{{.*}}][] {acc.declare = #acc.declare<dataClause = acc_deviceptr>} : memref<?xi8> to memref<10xf32>
-// CHECK: %[[DEVPTR:.*]] = acc.deviceptr varPtr(%[[VIEW]] : memref<10xf32>) -> memref<10xf32> {name = "arg0"}
+// CHECK: %[[DEVPTR:.*]] = acc.deviceptr varPtr(%[[VIEW]] : memref<10xf32>) name("arg0") -> memref<10xf32>
// CHECK: %[[TOKEN:.*]] = acc.declare_enter dataOperands(%[[DEVPTR]] : memref<10xf32>)
-// CHECK: %[[IMPLICIT_DEVPTR:.*]] = acc.deviceptr varPtr(%{{.*}} : memref<?xi8>) -> memref<?xi8> {implicit = true, name = ""}
+// CHECK: %[[IMPLICIT_DEVPTR:.*]] = acc.deviceptr varPtr(%{{.*}} : memref<?xi8>) implicit(true) name("") -> memref<?xi8>
// CHECK: acc.parallel dataOperands(%[[IMPLICIT_DEVPTR]] : memref<?xi8>) {
// CHECK: memref.load %[[IMPLICIT_DEVPTR]][{{.*}}] : memref<?xi8>
// CHECK: acc.declare_exit token(%[[TOKEN]]) dataOperands(%[[DEVPTR]] : memref<10xf32>)
diff --git a/mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir b/mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
index 41f4763d2bd8a..20122dc0170c8 100644
--- a/mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
@@ -61,7 +61,7 @@ module {
acc.loop control(%i : index) = (%c1 : index) to (%c10 : index) step (%c1 : index) {
func.call @loop_callee() : () -> ()
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
return
diff --git a/mlir/test/Dialect/OpenACC/acc-loop-tiling-invalid.mlir b/mlir/test/Dialect/OpenACC/acc-loop-tiling-invalid.mlir
index 53b0467976658..4214b367c42cc 100644
--- a/mlir/test/Dialect/OpenACC/acc-loop-tiling-invalid.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-loop-tiling-invalid.mlir
@@ -10,7 +10,7 @@ func.func @tile_wider_than_iv(%arg0: memref<100xf32>) {
// expected-error @+1 {{not yet implemented: tile size type (i64) is wider than loop IV type (i32)}}
acc.loop tile({%c4_i64 : i64}) control(%i : i32) = (%c0 : i32) to (%c100 : i32) step (%c1 : i32) {
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -33,6 +33,6 @@ func.func @tile_with_collapse(%arg0: memref<100x50xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i, %j] : memref<100x50xf32>
acc.yield
- } attributes {collapse = [2], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
+ } collapse([2]) collapseDeviceType([#acc.device_type<none>]) independent
return
}
diff --git a/mlir/test/Dialect/OpenACC/acc-loop-tiling-remarks.mlir b/mlir/test/Dialect/OpenACC/acc-loop-tiling-remarks.mlir
index bff904744b315..efd2a6c47b07e 100644
--- a/mlir/test/Dialect/OpenACC/acc-loop-tiling-remarks.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-loop-tiling-remarks.mlir
@@ -13,7 +13,7 @@ func.func @single_loop_remark(%arg0: memref<100xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i] : memref<100xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -31,7 +31,7 @@ func.func @nested_loop_remark(%arg0: memref<100x50xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i, %j] : memref<100x50xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -50,7 +50,7 @@ func.func @unknown_tile_remark(%arg0: memref<1000xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i] : memref<1000xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -70,6 +70,6 @@ func.func @multiple_unknown_tiles_remark(%arg0: memref<100x100xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i, %j] : memref<100x100xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
diff --git a/mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir b/mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
index 724fba48b7595..ad23945df7687 100644
--- a/mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
@@ -14,9 +14,9 @@
// CHECK: %[[MIN_UB:.*]] = arith.minsi %[[NEW_UB]], %[[C10]] : index
// CHECK: acc.loop control(%[[INNER_IV:.*]] : index) = (%[[IV]] : index) to (%[[MIN_UB]] : index) step (%[[C1]] : index) {
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
func.func @single_loop_tile(%arg0: memref<10xf32>) {
%c0 = arith.constant 0 : index
%c10 = arith.constant 10 : index
@@ -27,7 +27,7 @@ func.func @single_loop_tile(%arg0: memref<10xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i] : memref<10xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -49,9 +49,9 @@ func.func @single_loop_tile(%arg0: memref<10xf32>) {
// Element-group loop with vector.
// CHECK: acc.loop vector control(%{{.*}} : index, %{{.*}} : index) = (%[[I]], %[[J]] : index, index) to (%[[MUB0]], %[[MUB1]] : index, index) step (%[[C1]], %[[C1]] : index, index) {
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
func.func @nested_loop_tile(%arg0: memref<100x50xf32>) {
%c0 = arith.constant 0 : index
%c100 = arith.constant 100 : index
@@ -65,7 +65,7 @@ func.func @nested_loop_tile(%arg0: memref<100x50xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i, %j] : memref<100x50xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -81,9 +81,9 @@ func.func @nested_loop_tile(%arg0: memref<100x50xf32>) {
// CHECK: acc.loop control(%{{.*}} : index, %{{.*}} : index) = (%[[I]], %[[J]] : index, index) to ({{.*}}) step ({{.*}}) {
// CHECK-NOT: gang
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
func.func @gang_static_with_multi_dim_tile(%arg0: memref<100x50xf32>) {
%c0 = arith.constant 0 : index
%c100 = arith.constant 100 : index
@@ -98,7 +98,7 @@ func.func @gang_static_with_multi_dim_tile(%arg0: memref<100x50xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i, %j] : memref<100x50xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -116,9 +116,9 @@ func.func @gang_static_with_multi_dim_tile(%arg0: memref<100x50xf32>) {
// CHECK: acc.loop vector control(%{{.*}} : index, %{{.*}} : index) = (%[[I]], %[[J]] : index, index) to ({{.*}}) step ({{.*}}) {
// CHECK-NOT: worker
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
func.func @worker_num_with_multi_dim_tile(%arg0: memref<100x50xf32>) {
%c0 = arith.constant 0 : index
%c100 = arith.constant 100 : index
@@ -133,7 +133,7 @@ func.func @worker_num_with_multi_dim_tile(%arg0: memref<100x50xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i, %j] : memref<100x50xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -162,7 +162,7 @@ func.func @unknown_tile_size(%arg0: memref<1000xf32>) {
%fval = arith.sitofp %val : i32 to f32
memref.store %fval, %arg0[%i] : memref<1000xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -179,7 +179,7 @@ func.func @no_tile_values() {
%c1 = arith.constant 1 : index
acc.loop control(%i : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -213,6 +213,6 @@ func.func @body_with_nested_region(%arg0: memref<10xi32>) {
}
memref.store %val, %arg0[%i] : memref<10xi32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
diff --git a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate-two-allocs.mlir b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate-two-allocs.mlir
index 66c112b7ca841..66e6b48dfa3af 100644
--- a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate-two-allocs.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate-two-allocs.mlir
@@ -27,7 +27,7 @@ acc.firstprivate.recipe @firstprivatization_two_allocs : memref<i32> init {
func.func @firstpriv_two_allocs() {
%alloc = memref.alloca() : memref<i32>
- %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_two_allocs) -> memref<i32> {name = "t"}
+ %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_two_allocs) name("t") -> memref<i32>
acc.parallel firstprivate(%fp : memref<i32>) {
acc.yield
}
@@ -44,7 +44,7 @@ func.func @firstpriv_two_allocs() {
func.func @firstpriv_two_allocs_no_name() {
%alloc = memref.alloca() : memref<i32>
- %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_two_allocs) -> memref<i32> {name = ""}
+ %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_two_allocs) name("") -> memref<i32>
acc.parallel firstprivate(%fp : memref<i32>) {
acc.yield
}
diff --git a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate.mlir b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate.mlir
index e100ec2df139b..564d02684be8e 100644
--- a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate.mlir
@@ -37,7 +37,7 @@ func.func @firstpriv() {
%c1336 = arith.constant 1336 : i32
%alloc = memref.alloca() : memref<i32>
memref.store %c1336, %alloc[] : memref<i32>
- %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_memref_i32) -> memref<i32> {implicit = true, name = "t"}
+ %fp = acc.firstprivate varPtr(%alloc : memref<i32>) recipe(@firstprivatization_memref_i32) implicit(true) name("t") -> memref<i32>
acc.parallel firstprivate(%fp : memref<i32>) {
%c1 = arith.constant 1 : i32
%v = memref.load %fp[] : memref<i32>
diff --git a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-kernel-private.mlir b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-kernel-private.mlir
index 76a2cfb1750a3..66c3822ceff53 100644
--- a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-kernel-private.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-kernel-private.mlir
@@ -17,8 +17,8 @@ func.func @kpriv_(%arg0: memref<i32>, %arg1: memref<32xi32>) {
%iv_alloc = memref.alloca() : memref<i32>
%start = memref.load %arg0[] : memref<i32>
memref.store %start, %iv_alloc[] : memref<i32>
- %copy = acc.copyin varPtr(%arg1 : memref<32xi32>) -> memref<32xi32> {dataClause = #acc<data_clause acc_copy>, implicit = true, name = "a"}
- %priv = acc.private varPtr(%iv_alloc : memref<i32>) recipe(@privatization_memref_i32) -> memref<i32> {implicit = true, name = "s"}
+ %copy = acc.copyin varPtr(%arg1 : memref<32xi32>) dataClause(acc_copy) implicit(true) name("a") -> memref<32xi32>
+ %priv = acc.private varPtr(%iv_alloc : memref<i32>) recipe(@privatization_memref_i32) implicit(true) name("s") -> memref<i32>
acc.kernels dataOperands(%copy : memref<32xi32>) private(%priv : memref<i32>) {
acc.loop control(%arg2 : index) = (%c1 : index) to (%c32 : index) step (%c1 : index) {
%iv = arith.index_cast %arg2 : index to i32
@@ -26,9 +26,9 @@ func.func @kpriv_(%arg0: memref<i32>, %arg1: memref<32xi32>) {
%s_val = memref.load %priv[] : memref<i32>
memref.store %s_val, %copy[%arg2] : memref<32xi32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.terminator
}
- acc.copyout accPtr(%copy : memref<32xi32>) to varPtr(%arg1 : memref<32xi32>) {dataClause = #acc<data_clause acc_copy>, implicit = true, name = "a"}
+ acc.copyout accPtr(%copy : memref<32xi32>) to varPtr(%arg1 : memref<32xi32>) dataClause(acc_copy) implicit(true) name("a")
return
}
diff --git a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-loc.mlir b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-loc.mlir
index 87f07da1483fe..bfc5f10d05170 100644
--- a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-loc.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-loc.mlir
@@ -47,12 +47,12 @@ acc.reduction.recipe @reduction_add_memref_index : memref<index> reduction_opera
func.func @private_loc(%arg0: memref<index>) {
%c1 = arith.constant 1 : index
- %0 = acc.private varPtr(%arg0 : memref<index>) recipe(@privatization_memref_index) -> memref<index> {implicit = true, name = "priv0"}
+ %0 = acc.private varPtr(%arg0 : memref<index>) recipe(@privatization_memref_index) implicit(true) name("priv0") -> memref<index>
acc.parallel private(%0 : memref<index>) {
memref.store %c1, %0[] : memref<index>
acc.yield
} attributes {independent = [#acc.device_type<none>]}
- %1 = acc.private varPtr(%arg0 : memref<index>) recipe(@privatization_memref_index) -> memref<index> {implicit = true, name = "priv1"}
+ %1 = acc.private varPtr(%arg0 : memref<index>) recipe(@privatization_memref_index) implicit(true) name("priv1") -> memref<index>
acc.parallel private(%1 : memref<index>) {
memref.store %c1, %1[] : memref<index>
acc.yield
@@ -73,12 +73,12 @@ func.func @firstprivate_loc() {
%c1 = arith.constant 1 : index
%alloca = memref.alloca() : memref<index>
memref.store %c0, %alloca[] : memref<index>
- %0 = acc.firstprivate varPtr(%alloca : memref<index>) recipe(@firstprivatization_memref_index) -> memref<index> {implicit = true, name = "firstpriv0"}
+ %0 = acc.firstprivate varPtr(%alloca : memref<index>) recipe(@firstprivatization_memref_index) implicit(true) name("firstpriv0") -> memref<index>
acc.parallel firstprivate(%0 : memref<index>) {
memref.store %c1, %0[] : memref<index>
acc.yield
}
- %1 = acc.firstprivate varPtr(%alloca : memref<index>) recipe(@firstprivatization_memref_index) -> memref<index> {implicit = true, name = "firstpriv1"}
+ %1 = acc.firstprivate varPtr(%alloca : memref<index>) recipe(@firstprivatization_memref_index) implicit(true) name("firstpriv1") -> memref<index>
acc.parallel firstprivate(%1 : memref<index>) {
memref.store %c1, %1[] : memref<index>
acc.yield
@@ -99,12 +99,12 @@ func.func @firstprivate_loc() {
func.func @reduction_loc(%arg0: memref<index>) {
%c1 = arith.constant 1 : index
- %0 = acc.reduction varPtr(%arg0 : memref<index>) recipe(@reduction_add_memref_index) -> memref<index> {name = "r0"}
+ %0 = acc.reduction varPtr(%arg0 : memref<index>) recipe(@reduction_add_memref_index) name("r0") -> memref<index>
acc.parallel reduction(%0 : memref<index>) {
memref.store %c1, %0[] : memref<index>
acc.yield
}
- %1 = acc.reduction varPtr(%arg0 : memref<index>) recipe(@reduction_add_memref_index) -> memref<index> {name = "r1"}
+ %1 = acc.reduction varPtr(%arg0 : memref<index>) recipe(@reduction_add_memref_index) name("r1") -> memref<index>
acc.parallel reduction(%1 : memref<index>) {
memref.store %c1, %1[] : memref<index>
acc.yield
diff --git a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir
index bdce6f3c75653..101d5a254bd6e 100644
--- a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-parallel.mlir
@@ -35,7 +35,7 @@ acc.reduction.recipe @reduction_add_memref_f64 : memref<f64> reduction_operator
}
func.func @par_reduction_clause_(%arg0: memref<f64>) {
%cst = arith.constant 1.000000e+00 : f64
- %0 = acc.reduction varPtr(%arg0 : memref<f64>) recipe(@reduction_add_memref_f64) -> memref<f64> {name = "tmp"}
+ %0 = acc.reduction varPtr(%arg0 : memref<f64>) recipe(@reduction_add_memref_f64) name("tmp") -> memref<f64>
acc.parallel reduction(%0 : memref<f64>) {
%1 = memref.load %0[] : memref<f64>
%2 = arith.addf %1, %cst fastmath<contract> : f64
diff --git a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-private.mlir b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-private.mlir
index c5b415a4f8601..07d5b91c7b45f 100644
--- a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-private.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-private.mlir
@@ -19,12 +19,12 @@ acc.private.recipe @privatization_memref_i64 : memref<i64> init {
func.func @private_i64(%arg0 : memref<i64>) {
%c16 = arith.constant 16 : index
%c1 = arith.constant 1 : index
- %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) -> memref<i64> {implicit = true, name = ""}
+ %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) implicit(true) name("") -> memref<i64>
acc.loop private(%priv : memref<i64>) control(%siv : index) = (%c1 : index) to (%c16 : index) step (%c1 : index) {
%iv_i64 = arith.index_cast %siv : index to i64
memref.store %iv_i64, %priv[] : memref<i64>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -37,13 +37,13 @@ func.func @private_i64(%arg0 : memref<i64>) {
func.func @par_private_i64(%arg0 : memref<i64>) {
%c16 = arith.constant 16 : index
%c1 = arith.constant 1 : index
- %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) -> memref<i64> {implicit = true, name = ""}
+ %priv = acc.private varPtr(%arg0 : memref<i64>) recipe(@privatization_memref_i64) implicit(true) name("") -> memref<i64>
acc.parallel private(%priv : memref<i64>) {
acc.loop control(%siv : index) = (%c1 : index) to (%c16 : index) step (%c1 : index) {
%iv_i64 = arith.index_cast %siv : index to i64
memref.store %iv_i64, %priv[] : memref<i64>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
return
diff --git a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
index e5dc884d37d20..e7d24ddcecce0 100644
--- a/mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-recipe-materialization-reduction.mlir
@@ -42,7 +42,7 @@ acc.reduction.recipe @reduction_add_memref_f64 : memref<f64> reduction_operator
func.func @par_reduction_clause_(%arg0: memref<f64>) {
%cst = arith.constant 1.000000e+00 : f64
- %red = acc.reduction varPtr(%arg0 : memref<f64>) recipe(@reduction_add_memref_f64) -> memref<f64> {name = "tmp"}
+ %red = acc.reduction varPtr(%arg0 : memref<f64>) recipe(@reduction_add_memref_f64) name("tmp") -> memref<f64>
acc.parallel reduction(%red : memref<f64>) {
%3 = memref.load %red[] : memref<f64>
%4 = arith.addf %3, %cst fastmath<contract> : f64
@@ -74,7 +74,7 @@ func.func @par_reduction_clause_(%arg0: memref<f64>) {
func.func @par_reduction_clause_serial(%arg0: memref<f64>) {
%c1_i32 = arith.constant 1 : i32
%cst = arith.constant 1.000000e+00 : f64
- %red = acc.reduction varPtr(%arg0 : memref<f64>) recipe(@reduction_add_memref_f64) -> memref<f64> {name = "tmp"}
+ %red = acc.reduction varPtr(%arg0 : memref<f64>) recipe(@reduction_add_memref_f64) name("tmp") -> memref<f64>
acc.parallel num_gangs({%c1_i32 : i32}) num_workers(%c1_i32 : i32) vector_length(%c1_i32 : i32) reduction(%red : memref<f64>) {
%3 = memref.load %red[] : memref<f64>
%4 = arith.addf %3, %cst fastmath<contract> : f64
diff --git a/mlir/test/Dialect/OpenACC/acc-routine-lowering.mlir b/mlir/test/Dialect/OpenACC/acc-routine-lowering.mlir
index d2a57e7da5407..5914bde1d3187 100644
--- a/mlir/test/Dialect/OpenACC/acc-routine-lowering.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-routine-lowering.mlir
@@ -6,7 +6,7 @@ acc.routine @routine_seq func(@host_foo) seq
// CHECK: acc.routine @routine_seq func(@
// CHECK: acc.specialized_routine = #acc.specialized_routine<@routine_seq, <seq>, "host_foo">
// CHECK-NOT: acc.kernel_environment
-// CHECK: acc.par_width {par_dim = #acc.par_dim<sequential>}
+// CHECK: acc.par_width par_dim(#acc.par_dim<sequential>)
// CHECK: acc.compute_region
// CHECK: origin = "acc.routine"
func.func @host_foo(%buf: memref<8xi32>) {
@@ -23,7 +23,7 @@ acc.routine @routine_vec func(@host_bar) vector
// CHECK: acc.routine @routine_vec func(@
// CHECK: acc.specialized_routine = #acc.specialized_routine<@routine_vec, <vector>, "host_bar">
// CHECK-NOT: acc.kernel_environment
-// CHECK: acc.par_width {par_dim = #acc.par_dim<thread_x>}
+// CHECK: acc.par_width par_dim(#acc.par_dim<thread_x>)
// CHECK: acc.compute_region
// CHECK: origin = "acc.routine"
func.func @host_bar(%buf: memref<4xi32>) {
@@ -39,7 +39,7 @@ func.func @host_bar(%buf: memref<4xi32>) {
acc.routine @routine_worker func(@host_worker) worker
// CHECK: acc.routine @routine_worker func(@
// CHECK: acc.specialized_routine = #acc.specialized_routine<@routine_worker, <worker>, "host_worker">
-// CHECK: acc.par_width {par_dim = #acc.par_dim<thread_y>}
+// CHECK: acc.par_width par_dim(#acc.par_dim<thread_y>)
// CHECK: acc.compute_region
// CHECK: origin = "acc.routine"
func.func @host_worker(%x: i32) {
@@ -52,7 +52,7 @@ func.func @host_worker(%x: i32) {
acc.routine @routine_gang func(@host_gang) gang
// CHECK: acc.routine @routine_gang func(@
// CHECK: acc.specialized_routine = #acc.specialized_routine<@routine_gang, <gang_dim1>, "host_gang">
-// CHECK: acc.par_width {par_dim = #acc.par_dim<block_x>}
+// CHECK: acc.par_width par_dim(#acc.par_dim<block_x>)
// CHECK: acc.compute_region
// CHECK: origin = "acc.routine"
func.func @host_gang() {
@@ -81,7 +81,7 @@ func.func @host_ret(%cond: i1) -> i32 {
acc.routine @routine_cf func(@host_cf) seq
// CHECK: acc.routine @routine_cf func(@
// CHECK: acc.specialized_routine = #acc.specialized_routine<@routine_cf, <seq>, "host_cf">
-// CHECK: acc.par_width {par_dim = #acc.par_dim<sequential>}
+// CHECK: acc.par_width par_dim(#acc.par_dim<sequential>)
// CHECK: %[[CR:[0-9]+]] = acc.compute_region
// CHECK: %[[EXE:[0-9]+]] = scf.execute_region
// CHECK: scf.yield %{{.*}} : i32
@@ -116,10 +116,10 @@ acc.routine @r_a func(@f_a) seq
acc.routine @r_b func(@f_a) vector
// CHECK: acc.routine @r_a func(@
// CHECK: acc.specialized_routine = #acc.specialized_routine<@r_a, <seq>, "f_a">
-// CHECK: acc.par_width {par_dim = #acc.par_dim<sequential>}
+// CHECK: acc.par_width par_dim(#acc.par_dim<sequential>)
// CHECK: acc.routine @r_b func(@
// CHECK: acc.specialized_routine = #acc.specialized_routine<@r_b, <vector>, "f_a">
-// CHECK: acc.par_width {par_dim = #acc.par_dim<thread_x>}
+// CHECK: acc.par_width par_dim(#acc.par_dim<thread_x>)
func.func @f_a() {
return
}
diff --git a/mlir/test/Dialect/OpenACC/acc-specialize-for-host-deep-nesting.mlir b/mlir/test/Dialect/OpenACC/acc-specialize-for-host-deep-nesting.mlir
index 4d7940dbda462..0e4bd7d8217ee 100644
--- a/mlir/test/Dialect/OpenACC/acc-specialize-for-host-deep-nesting.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-specialize-for-host-deep-nesting.mlir
@@ -30,36 +30,36 @@ func.func @deeply_nested_orphan_loops(%arg0 : memref<i32>) attributes {acc.routi
acc.loop control(%iv15 : i32) = (%c0 : i32) to (%c10 : i32) step (%c1 : i32) {
memref.store %iv15, %arg0[] : memref<i32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
return
}
diff --git a/mlir/test/Dialect/OpenACC/acc-specialize-for-host.mlir b/mlir/test/Dialect/OpenACC/acc-specialize-for-host.mlir
index 0ef76d0766759..0f6e23560f80b 100644
--- a/mlir/test/Dialect/OpenACC/acc-specialize-for-host.mlir
+++ b/mlir/test/Dialect/OpenACC/acc-specialize-for-host.mlir
@@ -167,7 +167,7 @@ func.func @loop_inside_parallel(%arg0 : memref<i32>) attributes {acc.routine_inf
%c5 = arith.constant 5 : i32
memref.store %c5, %arg0[] : memref<i32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
acc.yield
}
return
@@ -192,7 +192,7 @@ func.func @private_attached_to_loop(%arg0 : memref<i32>) attributes {acc.routine
%c1_i32 = arith.constant 1 : i32
memref.store %c1_i32, %0[] : memref<i32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
return
}
@@ -212,7 +212,7 @@ func.func @orphan_loop(%arg0 : memref<i32>) attributes {acc.routine_info = #acc.
acc.loop control(%iv : i32) = (%c0 : i32) to (%c10 : i32) step (%c1 : i32) {
memref.store %iv, %arg0[] : memref<i32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) seq
return
}
@@ -230,7 +230,7 @@ func.func @nested_orphan_loop(%arg0 : memref<i32>) attributes {acc.routine_info
%sum = arith.addi %iv0, %iv1 : i32
memref.store %sum, %arg0[] : memref<i32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true, true>, seq = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true, true>) seq
return
}
@@ -275,7 +275,7 @@ func.func @orphan_unstructured_loop(%arg0 : memref<32xi32>) attributes {acc.rout
cf.br ^bb1
^bb3:
acc.yield
- } attributes {independent = [#acc.device_type<none>], unstructured}
+ } independent unstructured
return
}
@@ -304,7 +304,7 @@ func.func @orphan_loop_with_reduction(%arg0 : memref<i32>, %arg1 : memref<100xi3
%new_r = arith.addi %r_val, %elem : i32
memref.store %new_r, %arg0[] : memref<i32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
return
}
@@ -325,7 +325,7 @@ func.func @orphan_loop_variable_bounds(%arg0 : memref<i32>, %arg1 : memref<i32>,
acc.loop vector control(%iv : i32) = (%lb : i32) to (%ub : i32) step (%c1 : i32) {
memref.store %iv, %arg2[] : memref<i32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
return
}
@@ -370,7 +370,7 @@ func.func @orphan_between_compute_regions(%arg0 : memref<i32>, %arg1 : memref<8x
%idx = arith.index_cast %iv : i32 to index
memref.store %c1_i32, %arg1[%idx] : memref<8xi32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.yield
}
@@ -387,7 +387,7 @@ func.func @orphan_between_compute_regions(%arg0 : memref<i32>, %arg1 : memref<8x
%mul = arith.muli %t, %c2_i32 : i32
memref.store %mul, %arg0[] : memref<i32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
// Second compute region - should NOT be converted
acc.parallel combined(loop) {
@@ -397,7 +397,7 @@ func.func @orphan_between_compute_regions(%arg0 : memref<i32>, %arg1 : memref<8x
%idx = arith.index_cast %iv : i32 to index
memref.store %iv, %arg1[%idx] : memref<8xi32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.yield
}
return
diff --git a/mlir/test/Dialect/OpenACC/canonicalize.mlir b/mlir/test/Dialect/OpenACC/canonicalize.mlir
index 8f25a67814ef9..70900942d96c4 100644
--- a/mlir/test/Dialect/OpenACC/canonicalize.mlir
+++ b/mlir/test/Dialect/OpenACC/canonicalize.mlir
@@ -116,10 +116,10 @@ func.func @testhostdataop(%a: memref<f32>, %ifCond: i1) -> () {
acc.host_data dataOperands(%0 : memref<f32>) if(%false) {
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.terminator
}
return
@@ -243,6 +243,6 @@ func.func @kernel_environment_canonicalization(%q1: i32, %q2: i32, %q3: i32) {
// CHECK-SAME: ([[Q1:%.*]]: i32, [[Q2:%.*]]: i32, [[Q3:%.*]]: i32)
// CHECK-NOT: acc.kernel_environment
// CHECK: acc.wait([[Q1]], [[Q2]] : i32, i32)
-// CHECK: acc.wait
+// CHECK: acc.wait{{ *$}}
// CHECK: acc.wait([[Q3]] : i32)
// CHECK: return
diff --git a/mlir/test/Dialect/OpenACC/cse.mlir b/mlir/test/Dialect/OpenACC/cse.mlir
index 1d617a77eede8..f92975e7b833d 100644
--- a/mlir/test/Dialect/OpenACC/cse.mlir
+++ b/mlir/test/Dialect/OpenACC/cse.mlir
@@ -23,9 +23,9 @@ func.func @cse_across_acc_set(%a: memref<10xf32>, %i: index) -> (f32, f32) {
// distinct workgroup-memory slot.
// CHECK-LABEL: @cse_gpu_shared_memory_not_merged
func.func @cse_gpu_shared_memory_not_merged() -> (memref<8xf32, #gpu.address_space<workgroup>>, memref<8xf32, #gpu.address_space<workgroup>>) {
- %0 = acc.gpu_shared_memory {num_copies = 1 : i64, static_upper_bound_bytes = 256 : i64}
+ %0 = acc.gpu_shared_memory <{num_copies = 1 : i64, static_upper_bound_bytes = 256 : i64}>
: () -> memref<8xf32, #gpu.address_space<workgroup>>
- %1 = acc.gpu_shared_memory {num_copies = 1 : i64, static_upper_bound_bytes = 256 : i64}
+ %1 = acc.gpu_shared_memory <{num_copies = 1 : i64, static_upper_bound_bytes = 256 : i64}>
: () -> memref<8xf32, #gpu.address_space<workgroup>>
// CHECK: acc.gpu_shared_memory
// CHECK: acc.gpu_shared_memory
diff --git a/mlir/test/Dialect/OpenACC/invalid-cg.mlir b/mlir/test/Dialect/OpenACC/invalid-cg.mlir
index 16facc94efa54..a234db34b1d2d 100644
--- a/mlir/test/Dialect/OpenACC/invalid-cg.mlir
+++ b/mlir/test/Dialect/OpenACC/invalid-cg.mlir
@@ -32,12 +32,12 @@ acc.compute_region launch(%arg0 = %c32) {
// Use generic form to introduce an extra block argument.
%c64 = arith.constant 64 : index
-%w = acc.par_width %c64 {par_dim = #acc.par_dim<thread_x>}
+%w = acc.par_width %c64 par_dim(#acc.par_dim<thread_x>)
// expected-error at +1 {{'acc.compute_region' op expected 1 block arguments (launch + input), got 2}}
-"acc.compute_region"(%w) <{operandSegmentSizes = array<i32: 1, 0, 0>}> ({
+"acc.compute_region"(%w) <{operandSegmentSizes = array<i32: 1, 0, 0>, origin = "acc.parallel"}> ({
^bb0(%arg0: index, %extra: index):
"acc.yield"() : () -> ()
-}) {origin = "acc.parallel"} : (index) -> ()
+}) : (index) -> ()
// -----
@@ -45,7 +45,7 @@ func.func @reduction_accumulate_invalid_operator() {
%partial = arith.constant 1.0 : f32
%private = memref.alloca() : memref<f32>
acc.reduction_accumulate %partial to %private <addi>
- : f32 -> memref<f32> {par_dims = #acc<par_dims[thread_x]>}
+ : f32 -> memref<f32> <{par_dims = #acc<par_dims[thread_x]>}>
// expected-error at -2 {{expected ::mlir::acc::ReductionOperator to be one of}}
// expected-error at -3 {{failed to parse OpenACC_ReductionOperatorAttr}}
return
@@ -58,7 +58,7 @@ func.func @reduction_accumulate_type_mismatch() {
%private_i32 = memref.alloca() : memref<i32>
// expected-error at +1 {{pointer-like element type must match value type}}
acc.reduction_accumulate %wrong_ty to %private_i32 <add>
- : f32 -> memref<i32> {par_dims = #acc<par_dims[thread_x]>}
+ : f32 -> memref<i32> <{par_dims = #acc<par_dims[thread_x]>}>
return
}
@@ -69,7 +69,7 @@ func.func @reduction_accumulate_empty_par_dims() {
%private4 = memref.alloca() : memref<i32>
// expected-error at +1 {{par_dims must specify at least one parallel dimension}}
acc.reduction_accumulate %partial3 to %private4 <add>
- : i32 -> memref<i32> {par_dims = #acc<par_dims[]>}
+ : i32 -> memref<i32> <{par_dims = #acc<par_dims[]>}>
return
}
@@ -77,7 +77,7 @@ func.func @reduction_accumulate_empty_par_dims() {
func.func @reduction_accumulate_array_invalid_operator(%private: memref<4xi32>, %bounds: !acc.data_bounds_ty) {
acc.reduction_accumulate_array %private bounds(%bounds) <addi>
- : memref<4xi32> {par_dims = #acc<par_dims[thread_x]>}
+ : memref<4xi32> <{par_dims = #acc<par_dims[thread_x]>}>
// expected-error at -2 {{expected ::mlir::acc::ReductionOperator to be one of}}
// expected-error at -3 {{failed to parse OpenACC_ReductionOperatorAttr}}
return
@@ -88,7 +88,7 @@ func.func @reduction_accumulate_array_invalid_operator(%private: memref<4xi32>,
func.func @reduction_accumulate_array_empty_par_dims(%private: memref<4xi32>, %bounds: !acc.data_bounds_ty) {
// expected-error at +1 {{par_dims must specify at least one parallel dimension}}
acc.reduction_accumulate_array %private bounds(%bounds) <add>
- : memref<4xi32> {par_dims = #acc<par_dims[]>}
+ : memref<4xi32> <{par_dims = #acc<par_dims[]>}>
return
}
@@ -133,9 +133,9 @@ func.func @predicate_region_outside_compute_region() {
func.func @gpu_shared_memory_mismatched_runtime_attrs() {
// expected-error at +1 {{dynamic_shared_memory_scaling_bytes and dynamic_shared_memory_fixed_bytes must both be present or both be absent}}
%sm = acc.gpu_shared_memory()
- {num_copies = 1 : i64,
+ <{num_copies = 1 : i64,
static_upper_bound_bytes = 512 : i64,
- dynamic_shared_memory_scaling_bytes = 4 : i64}
+ dynamic_shared_memory_scaling_bytes = 4 : i64}>
: () -> memref<8xf32, #gpu.address_space<workgroup>>
return
}
@@ -145,7 +145,7 @@ func.func @gpu_shared_memory_mismatched_runtime_attrs() {
func.func @gpu_shared_memory_non_workgroup_memref() {
// expected-error at +1 {{result memref must use #gpu.address_space<workgroup>}}
%sm = acc.gpu_shared_memory()
- {num_copies = 1 : i64, static_upper_bound_bytes = 512 : i64}
+ <{num_copies = 1 : i64, static_upper_bound_bytes = 512 : i64}>
: () -> memref<8xf32>
return
}
@@ -155,7 +155,7 @@ func.func @gpu_shared_memory_non_workgroup_memref() {
func.func @gpu_shared_memory_zero_num_copies() {
// expected-error at +1 {{num_copies must be positive}}
%sm = acc.gpu_shared_memory()
- {num_copies = 0 : i64, static_upper_bound_bytes = 512 : i64}
+ <{num_copies = 0 : i64, static_upper_bound_bytes = 512 : i64}>
: () -> memref<8xf32, #gpu.address_space<workgroup>>
return
}
@@ -165,10 +165,10 @@ func.func @gpu_shared_memory_zero_num_copies() {
func.func @gpu_shared_memory_negative_scaling_bytes() {
// expected-error at +1 {{dynamic_shared_memory_scaling_bytes must be non-negative}}
%sm = acc.gpu_shared_memory()
- {num_copies = 1 : i64,
+ <{num_copies = 1 : i64,
static_upper_bound_bytes = 512 : i64,
dynamic_shared_memory_scaling_bytes = -1 : i64,
- dynamic_shared_memory_fixed_bytes = 24 : i64}
+ dynamic_shared_memory_fixed_bytes = 24 : i64}>
: () -> memref<8xf32, #gpu.address_space<workgroup>>
return
}
@@ -178,10 +178,10 @@ func.func @gpu_shared_memory_negative_scaling_bytes() {
func.func @gpu_shared_memory_negative_fixed_bytes() {
// expected-error at +1 {{dynamic_shared_memory_fixed_bytes must be non-negative}}
%sm = acc.gpu_shared_memory()
- {num_copies = 1 : i64,
+ <{num_copies = 1 : i64,
static_upper_bound_bytes = 512 : i64,
dynamic_shared_memory_scaling_bytes = 12 : i64,
- dynamic_shared_memory_fixed_bytes = -1 : i64}
+ dynamic_shared_memory_fixed_bytes = -1 : i64}>
: () -> memref<8xf32, #gpu.address_space<workgroup>>
return
}
diff --git a/mlir/test/Dialect/OpenACC/invalid.mlir b/mlir/test/Dialect/OpenACC/invalid.mlir
index bbb3d41d74971..e319e17d74fb5 100644
--- a/mlir/test/Dialect/OpenACC/invalid.mlir
+++ b/mlir/test/Dialect/OpenACC/invalid.mlir
@@ -3,111 +3,111 @@
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
-acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
+acc.loop gang control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
-} attributes {seq = [#acc.device_type<none>], gang = [#acc.device_type<none>]}
+} seq
// -----
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
-acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
+acc.loop worker control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
-} attributes {seq = [#acc.device_type<none>], worker = [#acc.device_type<none>]}
+} seq
// -----
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
-acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
+acc.loop vector control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
-} attributes {seq = [#acc.device_type<none>], vector = [#acc.device_type<none>]}
+} seq
// -----
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
-acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
+acc.loop gang worker control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
-} attributes {seq = [#acc.device_type<none>], worker = [#acc.device_type<none>], gang = [#acc.device_type<none>]}
+} seq
// -----
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
-acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
+acc.loop gang vector control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
-} attributes {seq = [#acc.device_type<none>], vector = [#acc.device_type<none>], gang = [#acc.device_type<none>]}
+} seq
// -----
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
-acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
+acc.loop worker vector control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
-} attributes {seq = [#acc.device_type<none>], vector = [#acc.device_type<none>], worker = [#acc.device_type<none>]}
+} seq
// -----
%1 = arith.constant 1 : i32
%2 = arith.constant 10 : i32
// expected-error at +1 {{gang, worker or vector cannot appear with seq}}
-acc.loop {
+acc.loop gang worker vector {
"test.openacc_dummy_op"() : () -> ()
acc.yield
-} attributes {seq = [#acc.device_type<none>], vector = [#acc.device_type<none>], worker = [#acc.device_type<none>], gang = [#acc.device_type<none>]}
+} seq
// -----
// expected-error at +1 {{expected non-empty body.}}
acc.loop {
-} attributes {independent = [#acc.device_type<none>]}
+} independent
// -----
// expected-error at +1 {{'acc.loop' op duplicate device_type `none` found in gang attribute}}
-acc.loop {
+acc.loop gang([#acc.device_type<none>, #acc.device_type<none>]) {
acc.yield
-} attributes {gang = [#acc.device_type<none>, #acc.device_type<none>]}
+}
// -----
// expected-error at +1 {{'acc.loop' op duplicate device_type `none` found in worker attribute}}
-acc.loop {
- acc.yield
-} attributes {worker = [#acc.device_type<none>, #acc.device_type<none>]}
+"acc.loop"() <{operandSegmentSizes = array<i32: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0>, worker = [#acc.device_type<none>, #acc.device_type<none>]}> ({
+ "acc.yield"() : () -> ()
+}) : () -> ()
// -----
// expected-error at +1 {{'acc.loop' op duplicate device_type `none` found in vector attribute}}
-acc.loop {
- acc.yield
-} attributes {vector = [#acc.device_type<none>, #acc.device_type<none>]}
+"acc.loop"() <{operandSegmentSizes = array<i32: 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0>, vector = [#acc.device_type<none>, #acc.device_type<none>]}> ({
+ "acc.yield"() : () -> ()
+}) : () -> ()
// -----
// expected-error at +1 {{'acc.loop' op duplicate device_type `nvidia` found in gang attribute}}
-acc.loop {
+acc.loop gang([#acc.device_type<nvidia>, #acc.device_type<nvidia>]) {
acc.yield
-} attributes {gang = [#acc.device_type<nvidia>, #acc.device_type<nvidia>]}
+}
// -----
// expected-error at +1 {{'acc.loop' op duplicate device_type `none` found in collapseDeviceType attribute}}
acc.loop {
acc.yield
-} attributes {collapse = [1, 1], collapseDeviceType = [#acc.device_type<none>, #acc.device_type<none>], independent = [#acc.device_type<none>]}
+} collapse([1, 1]) collapseDeviceType([#acc.device_type<none>, #acc.device_type<none>]) independent
// -----
@@ -115,7 +115,7 @@ acc.loop {
// expected-error at +1 {{'acc.loop' op duplicate device_type `none` found in workerNumOperandsDeviceType attribute}}
acc.loop worker(%i64value: i64, %i64value: i64) {
acc.yield
-} attributes {workerNumOperandsDeviceType = [#acc.device_type<none>, #acc.device_type<none>], independent = [#acc.device_type<none>]}
+} independent
// -----
@@ -123,7 +123,7 @@ acc.loop worker(%i64value: i64, %i64value: i64) {
// expected-error at +1 {{'acc.loop' op duplicate device_type `none` found in vectorOperandsDeviceType attribute}}
acc.loop vector(%i64value: i64, %i64value: i64) {
acc.yield
-} attributes {vectorOperandsDeviceType = [#acc.device_type<none>, #acc.device_type<none>], independent = [#acc.device_type<none>]}
+} independent
// -----
@@ -140,7 +140,7 @@ func.func @acc_routine_parallelism() -> () {
// expected-error at +1 {{only one of auto, independent, seq can be present at the same time}}
acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.yield
-} attributes {auto_ = [#acc.device_type<none>], seq = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
+} auto_ seq inclusiveUpperbound(array<i1: true>)
// -----
@@ -168,7 +168,7 @@ acc.update
%value = memref.alloc() : memref<f32>
%0 = acc.update_device varPtr(%value : memref<f32>) -> memref<f32>
// expected-error at +1 {{asyncOnly attribute cannot appear with asyncOperand}}
-acc.update async(%cst: index) dataOperands(%0 : memref<f32>) attributes {asyncOnly = [#acc.device_type<none>]}
+"acc.update"(%cst, %0) <{operandSegmentSizes = array<i32: 0, 1, 0, 1>, asyncOperandsDeviceType = [#acc.device_type<none>], asyncOnly = [#acc.device_type<none>]}> : (index, memref<f32>) -> ()
// -----
@@ -176,7 +176,7 @@ acc.update async(%cst: index) dataOperands(%0 : memref<f32>) attributes {asyncOn
%value = memref.alloc() : memref<f32>
%0 = acc.update_device varPtr(%value : memref<f32>) -> memref<f32>
// expected-error at +1 {{wait attribute cannot appear with waitOperands}}
-acc.update wait({%cst: index}) dataOperands(%0: memref<f32>) attributes {waitOnly = [#acc.device_type<none>]}
+"acc.update"(%cst, %0) <{operandSegmentSizes = array<i32: 0, 0, 1, 1>, waitOperandsDeviceType = [#acc.device_type<none>], waitOperandsSegments = array<i32: 1>, hasWaitDevnum = [false], waitOnly = [#acc.device_type<none>]}> : (index, memref<f32>) -> ()
// -----
@@ -188,7 +188,7 @@ acc.wait wait_devnum(%cst: index)
%cst = arith.constant 1 : index
// expected-error at +1 {{async attribute cannot appear with asyncOperand}}
-acc.wait async(%cst: index) attributes {async}
+"acc.wait"(%cst) <{operandSegmentSizes = array<i32: 0, 1, 0, 0>, async}> : (index) -> ()
// -----
@@ -206,7 +206,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32){
// expected-error at +1 {{'acc.init' op cannot be nested in a compute operation}}
acc.init
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+} inclusiveUpperbound(array<i1: true>) independent
// -----
@@ -224,7 +224,7 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
// expected-error at +1 {{'acc.shutdown' op cannot be nested in a compute operation}}
acc.shutdown
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+} inclusiveUpperbound(array<i1: true>) independent
// -----
@@ -236,12 +236,12 @@ acc.loop control(%iv : i32) = (%1 : i32) to (%2 : i32) step (%1 : i32) {
acc.shutdown
}) : () -> ()
acc.yield
-} attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+} inclusiveUpperbound(array<i1: true>) independent
// -----
// expected-error at +1 {{at least one operand must be present in dataOperands on the exit data operation}}
-acc.exit_data attributes {async}
+acc.exit_data async
// -----
@@ -249,7 +249,7 @@ acc.exit_data attributes {async}
%value = memref.alloc() : memref<f32>
%0 = acc.getdeviceptr varPtr(%value : memref<f32>) -> memref<f32>
// expected-error at +1 {{async attribute cannot appear with asyncOperand}}
-acc.exit_data async(%cst: index) dataOperands(%0 : memref<f32>) attributes {async}
+"acc.exit_data"(%cst, %0) <{operandSegmentSizes = array<i32: 0, 1, 0, 0, 1>, async}> : (index, memref<f32>) -> ()
acc.delete accPtr(%0 : memref<f32>)
// -----
@@ -264,7 +264,7 @@ acc.delete accPtr(%0 : memref<f32>)
// -----
// expected-error at +1 {{at least one operand must be present in dataOperands on the enter data operation}}
-acc.enter_data attributes {async}
+acc.enter_data async
// -----
@@ -272,7 +272,7 @@ acc.enter_data attributes {async}
%value = memref.alloc() : memref<f32>
%0 = acc.create varPtr(%value : memref<f32>) -> memref<f32>
// expected-error at +1 {{async attribute cannot appear with asyncOperand}}
-acc.enter_data async(%cst: index) dataOperands(%0 : memref<f32>) attributes {async}
+"acc.enter_data"(%cst, %0) <{operandSegmentSizes = array<i32: 0, 1, 0, 0, 1>, async}> : (index, memref<f32>) -> ()
// -----
@@ -280,7 +280,7 @@ acc.enter_data async(%cst: index) dataOperands(%0 : memref<f32>) attributes {asy
%value = memref.alloc() : memref<f32>
%0 = acc.create varPtr(%value : memref<f32>) -> memref<f32>
// expected-error at +1 {{wait attribute cannot appear with waitOperands}}
-acc.enter_data wait(%cst: index) dataOperands(%0 : memref<f32>) attributes {wait}
+"acc.enter_data"(%cst, %0) <{operandSegmentSizes = array<i32: 0, 0, 0, 1, 1>, wait}> : (index, memref<f32>) -> ()
// -----
@@ -526,7 +526,7 @@ acc.loop gang({static=%i64Value: i64, ) control(%iv : i32) = (%1 : i32) to (%2 :
// expected-error at +1 {{unstructured acc.loop must not have induction variables}}
acc.loop control(%iv : i32) = (%i1 : i32) to (%i2 : i32) step (%i1 : i32) {
acc.yield
-} attributes {independent = [#acc.device_type<none>], unstructured}
+} independent unstructured
// -----
@@ -555,7 +555,7 @@ acc.parallel num_gangs({%i64value: i64, %i64value : i64, %i64value : i64, %i64va
%i64value = arith.constant 1 : i64
acc.parallel {
// expected-error at +1 {{'acc.set' op cannot be nested in a compute operation}}
- acc.set attributes {device_type = #acc.device_type<nvidia>}
+ acc.set device_type(#acc.device_type<nvidia>)
acc.yield
}
@@ -835,7 +835,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
+ } collapse([2]) collapseDeviceType([#acc.device_type<none>]) independent
return
}
@@ -854,7 +854,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
+ } collapse([3]) collapseDeviceType([#acc.device_type<none>]) independent
return
}
@@ -862,13 +862,13 @@ func.func @acc_loop_container() {
%value = memref.alloc() : memref<f32>
// expected-error @below {{no data clause modifiers are allowed}}
-%0 = acc.private varPtr(%value : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier zero>}
+%0 = acc.private varPtr(%value : memref<f32>) <{modifiers = #acc<data_clause_modifier zero>}> -> memref<f32>
// -----
%value = memref.alloc() : memref<f32>
// expected-error @below {{invalid data clause modifiers: readonly}}
-%0 = acc.create varPtr(%value : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier readonly,zero,capture,always>}
+%0 = acc.create varPtr(%value : memref<f32>) <{modifiers = #acc<data_clause_modifier readonly,zero,capture,always>}> -> memref<f32>
// -----
diff --git a/mlir/test/Dialect/OpenACC/legalize-data.mlir b/mlir/test/Dialect/OpenACC/legalize-data.mlir
index c7ef47ccc7e97..84e62621c03c8 100644
--- a/mlir/test/Dialect/OpenACC/legalize-data.mlir
+++ b/mlir/test/Dialect/OpenACC/legalize-data.mlir
@@ -96,7 +96,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
return
@@ -109,7 +109,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[CREATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
// CHECK: acc.yield
// CHECK: }
@@ -134,7 +134,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
return
@@ -147,7 +147,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
// CHECK: acc.yield
// CHECK: }
@@ -172,7 +172,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop private(%p1 : memref<10xf32>) control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.yield
}
return
@@ -185,7 +185,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop private(%[[PRIVATE]] : memref<10xf32>) control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>]}
+// CHECK: } independent
// CHECK: acc.yield
// CHECK: }
@@ -210,7 +210,7 @@ func.func @test(%a: memref<10xf32>) {
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
%ci = memref.load %a[%i] : memref<10xf32>
acc.yield
- } attributes {seq = [#acc.device_type<none>]}
+ } seq
acc.yield
}
return
@@ -223,7 +223,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK: acc.loop control(%[[I:.*]] : index) = (%{{.*}} : index) to (%{{.*}} : index) step (%{{.*}} : index) {
// DEVICE: %{{.*}} = memref.load %[[PRIVATE:.*]][%[[I]]] : memref<10xf32>
// CHECK: acc.yield
-// CHECK: } attributes {seq = [#acc.device_type<none>]}
+// CHECK: } seq
// CHECK: acc.yield
// CHECK: }
@@ -250,7 +250,7 @@ func.func private @foo(memref<10xf32>)
// -----
func.func @test(%a: memref<10xf32>) {
- %declare = acc.create varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {name = "arr"}
+ %declare = acc.create varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) name("arr") -> memref<10xf32>
%token = acc.declare_enter dataOperands(%declare : memref<10xf32>)
acc.kernels dataOperands(%declare : memref<10xf32>) {
%c0 = arith.constant 0 : index
@@ -264,7 +264,7 @@ func.func @test(%a: memref<10xf32>) {
// CHECK-LABEL: func.func @test
// CHECK-SAME: (%[[A:.*]]: memref<10xf32>)
-// CHECK: %[[DECLARE:.*]] = acc.create varPtr(%[[A]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {name = "arr"}
+// CHECK: %[[DECLARE:.*]] = acc.create varPtr(%[[A]] : memref<10xf32>) varType(tensor<10xf32>) name("arr") -> memref<10xf32>
// CHECK: %[[TOKEN:.*]] = acc.declare_enter dataOperands(%[[DECLARE]] : memref<10xf32>)
// CHECK: acc.kernels dataOperands(%[[DECLARE]] : memref<10xf32>) {
// DEVICE: memref.store %{{.*}}, %[[DECLARE]][%{{.*}}] : memref<10xf32>
diff --git a/mlir/test/Dialect/OpenACC/legalize-serial.mlir b/mlir/test/Dialect/OpenACC/legalize-serial.mlir
index 774c6b6f65ce3..81b0fa60174c7 100644
--- a/mlir/test/Dialect/OpenACC/legalize-serial.mlir
+++ b/mlir/test/Dialect/OpenACC/legalize-serial.mlir
@@ -80,7 +80,7 @@ acc.reduction.recipe @reduction_add_memref_i64 : memref<i64> reduction_operator<
// CHECK: %[[VAL_9:.*]] = acc.private varPtr(%[[VAL_2]] : memref<10x10xf32>) recipe(@privatization_memref_10_10_f32) -> memref<10x10xf32>
// CHECK: acc.parallel firstprivate(%[[VAL_6]] : memref<10xf32>) num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) private(%[[VAL_9]] : memref<10x10xf32>) vector_length(%[[VAL_4]] : i32) {
// CHECK: }
-// CHECK: %[[VAL_7:.*]] = acc.copyin varPtr(%[[VAL_0]] : memref<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>}
+// CHECK: %[[VAL_7:.*]] = acc.copyin varPtr(%[[VAL_0]] : memref<10xf32>) dataClause(acc_copy) -> memref<10xf32>
// CHECK: acc.parallel dataOperands(%[[VAL_7]] : memref<10xf32>) num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
// CHECK: }
// CHECK: %[[I64MEM:.*]] = memref.alloca() : memref<i64>
@@ -91,22 +91,22 @@ acc.reduction.recipe @reduction_add_memref_i64 : memref<i64> reduction_operator<
// CHECK: acc.parallel combined(loop) num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
// CHECK: acc.loop combined(serial) control(%{{.*}} : index) = (%[[VAL_5]] : index) to (%[[VAL_5]] : index) step (%[[VAL_5]] : index) {
// CHECK: acc.yield
-// CHECK: } attributes {seq = [#acc.device_type<none>]}
+// CHECK: } seq
// CHECK: acc.terminator
// CHECK: }
// CHECK: acc.parallel num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
-// CHECK: } attributes {defaultAttr = #acc<defaultvalue none>}
-// CHECK: acc.parallel num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
-// CHECK: } attributes {defaultAttr = #acc<defaultvalue present>}
+// CHECK: } defaultAttr(none)
// CHECK: acc.parallel num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
+// CHECK: } defaultAttr(present)
+// CHECK: acc.parallel async num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
// CHECK: }
-// CHECK: acc.parallel num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
+// CHECK: acc.parallel num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) wait {
// CHECK: }
// CHECK: acc.parallel num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
-// CHECK: } attributes {selfAttr}
+// CHECK: } selfAttr
// CHECK: acc.parallel num_gangs({%[[VAL_4]] : i32}) num_workers(%[[VAL_4]] : i32) vector_length(%[[VAL_4]] : i32) {
// CHECK: acc.yield
-// CHECK: } attributes {selfAttr}
+// CHECK: } selfAttr
// CHECK: return
// CHECK: }
@@ -132,7 +132,7 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10
%c_private = acc.private varPtr(%c : memref<10x10xf32>) recipe(@privatization_memref_10_10_f32) -> memref<10x10xf32>
acc.serial private(%c_private : memref<10x10xf32>) firstprivate(%firstprivate : memref<10xf32>) {
}
- %copyinfromcopy = acc.copyin varPtr(%a : memref<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>}
+ %copyinfromcopy = acc.copyin varPtr(%a : memref<10xf32>) dataClause(acc_copy) -> memref<10xf32>
acc.serial dataOperands(%copyinfromcopy : memref<10xf32>) {
}
%i64mem = memref.alloca() : memref<i64>
@@ -143,22 +143,21 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10
acc.serial combined(loop) {
acc.loop combined(serial) control(%arg3 : index) = (%idxValue : index) to (%idxValue : index) step (%idxValue : index) {
acc.yield
- } attributes {seq = [#acc.device_type<none>]}
+ } seq
acc.terminator
}
acc.serial {
- } attributes {defaultAttr = #acc<defaultvalue none>}
- acc.serial {
- } attributes {defaultAttr = #acc<defaultvalue present>}
- acc.serial {
- } attributes {asyncAttr}
+ } defaultAttr(none)
acc.serial {
- } attributes {waitAttr}
+ } defaultAttr(present)
+ acc.serial async {
+ }
+ acc.serial wait {
+ }
acc.serial {
- } attributes {selfAttr}
+ } selfAttr
acc.serial {
acc.yield
- } attributes {selfAttr}
+ } selfAttr
return
}
-
diff --git a/mlir/test/Dialect/OpenACC/ops-cg-privatization.mlir b/mlir/test/Dialect/OpenACC/ops-cg-privatization.mlir
index 2b0af1527a984..9029a364207e3 100644
--- a/mlir/test/Dialect/OpenACC/ops-cg-privatization.mlir
+++ b/mlir/test/Dialect/OpenACC/ops-cg-privatization.mlir
@@ -92,7 +92,7 @@ func.func @privatize_inside_compute_region(%data : memref<64xf32>) {
%copy = acc.copyin varPtr(%data : memref<64xf32>) -> memref<64xf32>
acc.kernel_environment dataOperands(%copy : memref<64xf32>) {
%c64_kw = arith.constant 64 : index
- %w = acc.par_width %c64_kw {par_dim = #acc.par_dim<thread_x>}
+ %w = acc.par_width %c64_kw par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%lw = %w) ins(%d = %copy) : (memref<64xf32>) {
%priv = acc.privatize [#acc<par_dims[thread_x]>] : () -> !acc.private_type<memref<f32>>
%c0 = arith.constant 0 : index
diff --git a/mlir/test/Dialect/OpenACC/ops-cg.mlir b/mlir/test/Dialect/OpenACC/ops-cg.mlir
index 1bfe4c73d9a63..bdeaa71e5d00a 100644
--- a/mlir/test/Dialect/OpenACC/ops-cg.mlir
+++ b/mlir/test/Dialect/OpenACC/ops-cg.mlir
@@ -98,9 +98,9 @@ func.func @compute_region_single_dim(%data: memref<1024xf32>,
%result: memref<f32>) {
%c128 = arith.constant 128 : index
%copyin = acc.copyin varPtr(%data : memref<1024xf32>) -> memref<1024xf32>
- %copy = acc.copyin varPtr(%result : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copy>}
+ %copy = acc.copyin varPtr(%result : memref<f32>) dataClause(acc_copy) -> memref<f32>
acc.kernel_environment dataOperands(%copyin, %copy : memref<1024xf32>, memref<f32>) {
- %w0 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w0)
ins(%arg1 = %copyin, %arg2 = %copy) : (memref<1024xf32>, memref<f32>) {
%c0 = arith.constant 0 : index
@@ -118,11 +118,11 @@ func.func @compute_region_single_dim(%data: memref<1024xf32>,
acc.yield
} {origin = "acc.parallel"}
}
- acc.copyout accPtr(%copy : memref<f32>) to varPtr(%result : memref<f32>) {dataClause = #acc<data_clause acc_copy>}
+ acc.copyout accPtr(%copy : memref<f32>) to varPtr(%result : memref<f32>) dataClause(acc_copy)
acc.delete accPtr(%copyin : memref<1024xf32>)
return
}
-// CHECK: %[[W:.*]] = acc.par_width %{{.*}} {par_dim = #acc.par_dim<thread_x>}
+// CHECK: %[[W:.*]] = acc.par_width %{{.*}} par_dim(#acc.par_dim<thread_x>)
// CHECK: acc.compute_region launch(%{{.*}} = %[[W]]) ins({{.*}}) : (memref<1024xf32>, memref<f32>) {
// CHECK: acc.yield
// CHECK: } {origin = "acc.parallel"}
@@ -135,10 +135,10 @@ func.func @compute_region_two_dims(%data: memref<8xi32>,
%c8 = arith.constant 8 : index
%c128 = arith.constant 128 : index
%copyin_data = acc.copyin varPtr(%data : memref<8xi32>) -> memref<8xi32>
- %copyin_red = acc.copyin varPtr(%reduction_var : memref<i32>) -> memref<i32> {dataClause = #acc<data_clause acc_reduction>}
+ %copyin_red = acc.copyin varPtr(%reduction_var : memref<i32>) dataClause(acc_reduction) -> memref<i32>
acc.kernel_environment dataOperands(%copyin_data, %copyin_red : memref<8xi32>, memref<i32>) {
- %w0 = acc.par_width %c8 {par_dim = #acc.par_dim<block_x>}
- %w1 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width %c8 par_dim(#acc.par_dim<block_x>)
+ %w1 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w0, %arg1 = %w1)
ins(%arg2 = %copyin_data, %arg3 = %copyin_red) : (memref<8xi32>, memref<i32>) {
%c0 = arith.constant 0 : index
@@ -161,12 +161,12 @@ func.func @compute_region_two_dims(%data: memref<8xi32>,
acc.yield
} {origin = "acc.parallel"}
}
- acc.copyout accPtr(%copyin_red : memref<i32>) to varPtr(%reduction_var : memref<i32>) {dataClause = #acc<data_clause acc_reduction>}
+ acc.copyout accPtr(%copyin_red : memref<i32>) to varPtr(%reduction_var : memref<i32>) dataClause(acc_reduction)
acc.delete accPtr(%copyin_data : memref<8xi32>)
return
}
-// CHECK: %[[W0:.*]] = acc.par_width %{{.*}} {par_dim = #acc.par_dim<block_x>}
-// CHECK: %[[W1:.*]] = acc.par_width %{{.*}} {par_dim = #acc.par_dim<thread_x>}
+// CHECK: %[[W0:.*]] = acc.par_width %{{.*}} par_dim(#acc.par_dim<block_x>)
+// CHECK: %[[W1:.*]] = acc.par_width %{{.*}} par_dim(#acc.par_dim<thread_x>)
// CHECK: acc.compute_region launch(%{{.*}} = %[[W0]], %{{.*}} = %[[W1]]) ins({{.*}}) : (memref<8xi32>, memref<i32>) {
// CHECK: acc.yield
// CHECK: } {origin = "acc.parallel"}
@@ -191,7 +191,7 @@ func.func @reduction_init_with_bounds(%arg0: memref<?xi32>, %lb: index, %ext: in
func.func @compute_region_unknown_width(%data: memref<100xf32>) {
%copyin = acc.copyin varPtr(%data : memref<100xf32>) -> memref<100xf32>
acc.kernel_environment dataOperands(%copyin : memref<100xf32>) {
- %w0 = acc.par_width {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w0)
ins(%arg1 = %copyin) : (memref<100xf32>) {
%c0 = arith.constant 0 : index
@@ -206,7 +206,7 @@ func.func @compute_region_unknown_width(%data: memref<100xf32>) {
acc.delete accPtr(%copyin : memref<100xf32>)
return
}
-// CHECK: %[[W:.*]] = acc.par_width {par_dim = #acc.par_dim<thread_x>}
+// CHECK: %[[W:.*]] = acc.par_width par_dim(#acc.par_dim<thread_x>)
// CHECK: acc.compute_region launch(%{{.*}} = %[[W]]) ins({{.*}}) : (memref<100xf32>) {
// CHECK: acc.yield
// CHECK: } {origin = "acc.kernels"}
@@ -215,8 +215,8 @@ func.func @compute_region_unknown_width(%data: memref<100xf32>) {
// CHECK-LABEL: func @compute_region_no_launch
func.func @compute_region_no_launch(%a: memref<i32>, %b: memref<i32>) {
- %copy_a = acc.copyin varPtr(%a : memref<i32>) -> memref<i32> {dataClause = #acc<data_clause acc_copy>}
- %copy_b = acc.copyin varPtr(%b : memref<i32>) -> memref<i32> {dataClause = #acc<data_clause acc_copy>}
+ %copy_a = acc.copyin varPtr(%a : memref<i32>) dataClause(acc_copy) -> memref<i32>
+ %copy_b = acc.copyin varPtr(%b : memref<i32>) dataClause(acc_copy) -> memref<i32>
acc.kernel_environment dataOperands(%copy_a, %copy_b : memref<i32>, memref<i32>) {
acc.compute_region
ins(%arg0 = %copy_a, %arg1 = %copy_b) : (memref<i32>, memref<i32>) {
@@ -226,8 +226,8 @@ func.func @compute_region_no_launch(%a: memref<i32>, %b: memref<i32>) {
acc.yield
} {origin = "acc.serial"}
}
- acc.copyout accPtr(%copy_a : memref<i32>) to varPtr(%a : memref<i32>) {dataClause = #acc<data_clause acc_copy>}
- acc.copyout accPtr(%copy_b : memref<i32>) to varPtr(%b : memref<i32>) {dataClause = #acc<data_clause acc_copy>}
+ acc.copyout accPtr(%copy_a : memref<i32>) to varPtr(%a : memref<i32>) dataClause(acc_copy)
+ acc.copyout accPtr(%copy_b : memref<i32>) to varPtr(%b : memref<i32>) dataClause(acc_copy)
return
}
// CHECK: acc.compute_region ins({{.*}}) : (memref<i32>, memref<i32>) {
@@ -239,13 +239,13 @@ func.func @compute_region_no_launch(%a: memref<i32>, %b: memref<i32>) {
// CHECK-LABEL: func @compute_region_launch_only
func.func @compute_region_launch_only() {
%c32 = arith.constant 32 : index
- %w0 = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width %c32 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w0) {
acc.yield
} {origin = "acc.parallel"}
return
}
-// CHECK: %[[W:.*]] = acc.par_width %{{.*}} {par_dim = #acc.par_dim<thread_x>}
+// CHECK: %[[W:.*]] = acc.par_width %{{.*}} par_dim(#acc.par_dim<thread_x>)
// CHECK: acc.compute_region launch(%{{.*}} = %[[W]]) {
// CHECK: acc.yield
// CHECK: } {origin = "acc.parallel"}
@@ -272,8 +272,8 @@ func.func @compute_region_all_fields(%data: memref<1024xf32>,
%c8 = arith.constant 8 : index
%copyin = acc.copyin varPtr(%data : memref<1024xf32>) -> memref<1024xf32>
acc.kernel_environment dataOperands(%copyin : memref<1024xf32>) {
- %w0 = acc.par_width %c8 {par_dim = #acc.par_dim<block_x>}
- %w1 = acc.par_width %c128 {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width %c8 par_dim(#acc.par_dim<block_x>)
+ %w1 = acc.par_width %c128 par_dim(#acc.par_dim<thread_x>)
acc.compute_region stream(%stream : !gpu.async.token)
launch(%arg0 = %w0, %arg1 = %w1)
ins(%arg2 = %copyin) : (memref<1024xf32>) {
@@ -289,8 +289,8 @@ func.func @compute_region_all_fields(%data: memref<1024xf32>,
acc.delete accPtr(%copyin : memref<1024xf32>)
return
}
-// CHECK: %[[W0:.*]] = acc.par_width %{{.*}} {par_dim = #acc.par_dim<block_x>}
-// CHECK: %[[W1:.*]] = acc.par_width %{{.*}} {par_dim = #acc.par_dim<thread_x>}
+// CHECK: %[[W0:.*]] = acc.par_width %{{.*}} par_dim(#acc.par_dim<block_x>)
+// CHECK: %[[W1:.*]] = acc.par_width %{{.*}} par_dim(#acc.par_dim<thread_x>)
// CHECK: acc.compute_region stream(%[[STREAM]] : !gpu.async.token) launch(%{{.*}} = %[[W0]], %{{.*}} = %[[W1]]) ins({{.*}}) : (memref<1024xf32>) {
// CHECK: acc.yield
// CHECK: } {kernel_func_name = @compute_kernel, kernel_module_name = @device_module, origin = "acc.parallel"}
@@ -314,7 +314,7 @@ func.func @parallel_reduction_pattern(%data: memref<8xi32>, %shared: memref<i32>
}
} {acc.par_dims = #acc<par_dims[thread_x]>}
acc.reduction_accumulate %partial to %private <add>
- : i32 -> memref<i32> {par_dims = #acc<par_dims[thread_x]>}
+ : i32 -> memref<i32> <{par_dims = #acc<par_dims[thread_x]>}>
acc.reduction_combine %private into %shared <add> : memref<i32>
{acc.par_dims = #acc<par_dims[thread_x]>}
return
@@ -322,7 +322,7 @@ func.func @parallel_reduction_pattern(%data: memref<8xi32>, %shared: memref<i32>
// CHECK: memref.alloca() {acc.par_dims = #acc<par_dims[thread_x]>}
// CHECK: scf.parallel
// CHECK: scf.reduce
-// CHECK: acc.reduction_accumulate %{{.*}} to %{{.*}} <add> : i32 -> memref<i32> {par_dims = #acc<par_dims[thread_x]>}
+// CHECK: acc.reduction_accumulate %{{.*}} to %{{.*}} <add> : i32 -> memref<i32> <{par_dims = #acc<par_dims[thread_x]>}>
// CHECK: acc.reduction_combine %{{.*}} into %{{.*}} <add> : memref<i32> {acc.par_dims = #acc<par_dims[thread_x]>}
// -----
@@ -330,42 +330,42 @@ func.func @parallel_reduction_pattern(%data: memref<8xi32>, %shared: memref<i32>
// CHECK-LABEL: func @reduction_accumulate_thread_x
func.func @reduction_accumulate_thread_x(%partial: f32, %private: memref<f32>) {
acc.reduction_accumulate %partial to %private <add>
- : f32 -> memref<f32> {par_dims = #acc<par_dims[thread_x]>}
+ : f32 -> memref<f32> <{par_dims = #acc<par_dims[thread_x]>}>
return
}
-// CHECK: acc.reduction_accumulate %{{.*}} to %{{.*}} <add> : f32 -> memref<f32> {par_dims = #acc<par_dims[thread_x]>}
+// CHECK: acc.reduction_accumulate %{{.*}} to %{{.*}} <add> : f32 -> memref<f32> <{par_dims = #acc<par_dims[thread_x]>}>
// -----
// CHECK-LABEL: func @reduction_accumulate_block_thread
func.func @reduction_accumulate_block_thread(%partial: i32, %private: memref<i32>) {
acc.reduction_accumulate %partial to %private <add>
- : i32 -> memref<i32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ : i32 -> memref<i32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
return
}
-// CHECK: acc.reduction_accumulate %{{.*}} to %{{.*}} <add> : i32 -> memref<i32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+// CHECK: acc.reduction_accumulate %{{.*}} to %{{.*}} <add> : i32 -> memref<i32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
// -----
// CHECK-LABEL: func @reduction_accumulate_array
func.func @reduction_accumulate_array(%private: memref<4xi32>, %bounds: !acc.data_bounds_ty) {
- acc.reduction_accumulate_array %private bounds(%bounds) <add> : memref<4xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+ acc.reduction_accumulate_array %private bounds(%bounds) <add> : memref<4xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
return
}
-// CHECK: acc.reduction_accumulate_array %{{.*}} bounds(%{{.*}}) <add> : memref<4xi32> {par_dims = #acc<par_dims[block_x, thread_x]>}
+// CHECK: acc.reduction_accumulate_array %{{.*}} bounds(%{{.*}}) <add> : memref<4xi32> <{par_dims = #acc<par_dims[block_x, thread_x]>}>
// -----
// CHECK-LABEL: func @compute_region_with_results
func.func @compute_region_with_results() -> i32 {
- %w0 = acc.par_width {par_dim = #acc.par_dim<thread_x>}
+ %w0 = acc.par_width par_dim(#acc.par_dim<thread_x>)
%0 = acc.compute_region launch(%arg0 = %w0) -> i32 {
%c0_i32 = arith.constant 0 : i32
acc.yield %c0_i32 : i32
} {origin = "acc.parallel"}
return %0 : i32
}
-// CHECK: %[[W:.*]] = acc.par_width {par_dim = #acc.par_dim<thread_x>}
+// CHECK: %[[W:.*]] = acc.par_width par_dim(#acc.par_dim<thread_x>)
// CHECK: {{.*}} = acc.compute_region launch(%{{.*}} = %[[W]]) -> i32 {
// CHECK: acc.yield
// CHECK: } {origin = "acc.parallel"}
@@ -376,11 +376,11 @@ func.func @compute_region_with_results() -> i32 {
func.func @predicate_region_gang_vector_atomics(%c1: memref<i32>, %c2: memref<i32>) {
%c3 = arith.constant 3 : index
%c16 = arith.constant 16 : index
- %copy_c1 = acc.copyin varPtr(%c1 : memref<i32>) -> memref<i32> {dataClause = #acc<data_clause acc_copy>}
- %copy_c2 = acc.copyin varPtr(%c2 : memref<i32>) -> memref<i32> {dataClause = #acc<data_clause acc_copy>}
+ %copy_c1 = acc.copyin varPtr(%c1 : memref<i32>) dataClause(acc_copy) -> memref<i32>
+ %copy_c2 = acc.copyin varPtr(%c2 : memref<i32>) dataClause(acc_copy) -> memref<i32>
acc.kernel_environment dataOperands(%copy_c1, %copy_c2 : memref<i32>, memref<i32>) {
- %w_gang = acc.par_width %c3 {par_dim = #acc.par_dim<block_x>}
- %w_vector = acc.par_width %c16 {par_dim = #acc.par_dim<thread_x>}
+ %w_gang = acc.par_width %c3 par_dim(#acc.par_dim<block_x>)
+ %w_vector = acc.par_width %c16 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w_gang, %arg1 = %w_vector)
ins(%arg2 = %copy_c1, %arg3 = %copy_c2) : (memref<i32>, memref<i32>) {
%c1_idx = arith.constant 1 : index
@@ -408,8 +408,8 @@ func.func @predicate_region_gang_vector_atomics(%c1: memref<i32>, %c2: memref<i3
acc.yield
} {origin = "acc.parallel"}
}
- acc.copyout accPtr(%copy_c1 : memref<i32>) to varPtr(%c1 : memref<i32>) {dataClause = #acc<data_clause acc_copy>}
- acc.copyout accPtr(%copy_c2 : memref<i32>) to varPtr(%c2 : memref<i32>) {dataClause = #acc<data_clause acc_copy>}
+ acc.copyout accPtr(%copy_c1 : memref<i32>) to varPtr(%c1 : memref<i32>) dataClause(acc_copy)
+ acc.copyout accPtr(%copy_c2 : memref<i32>) to varPtr(%c2 : memref<i32>) dataClause(acc_copy)
return
}
// CHECK: acc.predicate_region {
@@ -422,11 +422,11 @@ func.func @predicate_region_gang_vector_atomics(%c1: memref<i32>, %c2: memref<i3
func.func @predicate_region_gang_redundant_setup(%idx: memref<i32>, %table: memref<10xi32>) {
%c3 = arith.constant 3 : index
%c16 = arith.constant 16 : index
- %copy_idx = acc.copyin varPtr(%idx : memref<i32>) -> memref<i32> {dataClause = #acc<data_clause acc_copy>}
+ %copy_idx = acc.copyin varPtr(%idx : memref<i32>) dataClause(acc_copy) -> memref<i32>
%copy_table = acc.copyin varPtr(%table : memref<10xi32>) -> memref<10xi32>
acc.kernel_environment dataOperands(%copy_idx, %copy_table : memref<i32>, memref<10xi32>) {
- %w_gang = acc.par_width %c3 {par_dim = #acc.par_dim<block_x>}
- %w_vector = acc.par_width %c16 {par_dim = #acc.par_dim<thread_x>}
+ %w_gang = acc.par_width %c3 par_dim(#acc.par_dim<block_x>)
+ %w_vector = acc.par_width %c16 par_dim(#acc.par_dim<thread_x>)
acc.compute_region launch(%arg0 = %w_gang, %arg1 = %w_vector)
ins(%arg2 = %copy_idx, %arg3 = %copy_table) : (memref<i32>, memref<10xi32>) {
%c0 = arith.constant 0 : index
@@ -448,7 +448,7 @@ func.func @predicate_region_gang_redundant_setup(%idx: memref<i32>, %table: memr
acc.yield
} {origin = "acc.kernels"}
}
- acc.copyout accPtr(%copy_idx : memref<i32>) to varPtr(%idx : memref<i32>) {dataClause = #acc<data_clause acc_copy>}
+ acc.copyout accPtr(%copy_idx : memref<i32>) to varPtr(%idx : memref<i32>) dataClause(acc_copy)
acc.delete accPtr(%copy_table : memref<10xi32>)
return
}
@@ -462,11 +462,11 @@ func.func @predicate_region_gang_redundant_setup(%idx: memref<i32>, %table: memr
func.func @gpu_shared_memory_static() {
%c1024 = arith.constant 1024 : index
%sm = acc.gpu_shared_memory(%c1024)
- {num_copies = 1 : i64, static_upper_bound_bytes = 4096 : i64}
+ <{num_copies = 1 : i64, static_upper_bound_bytes = 4096 : i64}>
: (index) -> memref<?xf32, #gpu.address_space<workgroup>>
return
}
-// CHECK: acc.gpu_shared_memory(%{{.*}}) {num_copies = 1 : i64, static_upper_bound_bytes = 4096 : i64}
+// CHECK: acc.gpu_shared_memory(%{{.*}}) <{num_copies = 1 : i64, static_upper_bound_bytes = 4096 : i64}>
// CHECK-SAME: : (index) -> memref<?xf32, #gpu.address_space<workgroup>>
// -----
@@ -475,22 +475,22 @@ func.func @gpu_shared_memory_static() {
func.func @gpu_shared_memory_runtime_sized() {
%c128 = arith.constant 128 : index
%sm = acc.gpu_shared_memory(%c128)
- {num_copies = 1 : i64,
+ <{num_copies = 1 : i64,
static_upper_bound_bytes = 1560 : i64,
dynamic_shared_memory_scaling_bytes = 12 : i64,
- dynamic_shared_memory_fixed_bytes = 24 : i64}
+ dynamic_shared_memory_fixed_bytes = 24 : i64}>
: (index) -> memref<?xf32, #gpu.address_space<workgroup>>
return
}
-// CHECK: acc.gpu_shared_memory(%{{.*}}) {dynamic_shared_memory_fixed_bytes = 24 : i64, dynamic_shared_memory_scaling_bytes = 12 : i64, num_copies = 1 : i64, static_upper_bound_bytes = 1560 : i64}
+// CHECK: acc.gpu_shared_memory(%{{.*}}) <{dynamic_shared_memory_fixed_bytes = 24 : i64, dynamic_shared_memory_scaling_bytes = 12 : i64, num_copies = 1 : i64, static_upper_bound_bytes = 1560 : i64}>
// -----
// CHECK-LABEL: func @gpu_shared_memory_worker_copies
func.func @gpu_shared_memory_worker_copies() {
%sm = acc.gpu_shared_memory()
- {num_copies = 4 : i64, static_upper_bound_bytes = 256 : i64}
+ <{num_copies = 4 : i64, static_upper_bound_bytes = 256 : i64}>
: () -> memref<8xf32, #gpu.address_space<workgroup>>
return
}
-// CHECK: acc.gpu_shared_memory {num_copies = 4 : i64, static_upper_bound_bytes = 256 : i64}
+// CHECK: acc.gpu_shared_memory <{num_copies = 4 : i64, static_upper_bound_bytes = 256 : i64}>
diff --git a/mlir/test/Dialect/OpenACC/ops.mlir b/mlir/test/Dialect/OpenACC/ops.mlir
index a2775390bf12b..65d49569280d3 100644
--- a/mlir/test/Dialect/OpenACC/ops.mlir
+++ b/mlir/test/Dialect/OpenACC/ops.mlir
@@ -19,7 +19,7 @@ func.func @compute1(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x
%co = arith.addf %cij, %p : f32
memref.store %co, %C[%arg3, %arg4] : memref<10x10xf32>
acc.yield
- } attributes { collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>, independent = [#acc.device_type<none>]}
+ } collapse([3]) collapseDeviceType([#acc.device_type<none>]) inclusiveUpperbound(array<i1: true, true, true>) independent
acc.yield
}
@@ -40,7 +40,7 @@ func.func @compute1(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}, %{{.*}}] : memref<10x10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {collapse = [3], collapseDeviceType = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true, true, true>, independent = [#acc.device_type<none>]}
+// CHECK-NEXT: } inclusiveUpperbound(array<i1: true, true, true>) collapse([3]) collapseDeviceType([#acc.device_type<none>]) independent
// CHECK-NEXT: acc.yield
// CHECK-NEXT: }
// CHECK-NEXT: return %{{.*}} : memref<10x10xf32>
@@ -66,7 +66,7 @@ func.func @compute2(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x
}
}
acc.yield
- } attributes {seq = [#acc.device_type<none>], inclusiveUpperbound = array<i1: true>}
+ } seq inclusiveUpperbound(array<i1: true>)
acc.yield
}
@@ -90,7 +90,7 @@ func.func @compute2(%A: memref<10x10xf32>, %B: memref<10x10xf32>, %C: memref<10x
// CHECK-NEXT: }
// CHECK-NEXT: }
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, seq = [#acc.device_type<none>]}
+// CHECK-NEXT: } inclusiveUpperbound(array<i1: true>) seq
// CHECK-NEXT: acc.yield
// CHECK-NEXT: }
// CHECK-NEXT: return %{{.*}} : memref<10x10xf32>
@@ -129,7 +129,7 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%tmp = arith.addf %axy, %bxy : f32
memref.store %tmp, %c[%y] : memref<10xf32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop control(%i : index) = (%lb : index) to (%c10 : index) step (%st : index) {
// for i = 0 to 10 step 1
@@ -139,9 +139,9 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%z = arith.addf %ci, %dx : f32
memref.store %z, %d[%x] : memref<10xf32>
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>], seq = [#acc.device_type<nvidia>]}
+ } inclusiveUpperbound(array<i1: true>) independent seq([#acc.device_type<nvidia>])
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.yield
}
acc.terminator
@@ -166,16 +166,16 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+// CHECK-NEXT: } inclusiveUpperbound(array<i1: true>) independent
// CHECK-NEXT: acc.loop control(%{{.*}}) = (%{{.*}}) to (%{{.*}}) step (%{{.*}}) {
// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: %{{.*}} = memref.load %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
// CHECK-NEXT: memref.store %{{.*}}, %{{.*}}[%{{.*}}] : memref<10xf32>
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>], seq = [#acc.device_type<nvidia>]}
+// CHECK-NEXT: } inclusiveUpperbound(array<i1: true>) seq ([#acc.device_type<nvidia>]) independent
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+// CHECK-NEXT: } inclusiveUpperbound(array<i1: true>) independent
// CHECK-NEXT: acc.yield
// CHECK-NEXT: }
// CHECK-NEXT: acc.terminator
@@ -196,72 +196,72 @@ func.func @testloopop(%a : memref<10xf32>) -> () {
acc.loop gang vector worker control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop gang({num=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop gang({static=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop worker(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop worker(%i32Value: i32) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop worker(%idxValue: index) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop vector(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop vector(%i32Value: i32) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop vector(%idxValue: index) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop gang({num=%i64Value: i64}) worker vector control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop gang({num=%i64Value: i64, static=%i64Value: i64}) worker(%i64Value: i64) vector(%i64Value: i64) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop gang({num=%i32Value: i32, static=%idxValue: index}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop tile({%i64Value : i64, %i64Value : i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop tile({%i32Value : i32, %i32Value : i32}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop gang({static=%i64Value: i64, num=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.loop gang({dim=%i64Value : i64, static=%i64Value: i64}) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
%b = acc.cache varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32>
acc.loop cache(%b : memref<10xf32>) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
return
}
@@ -271,7 +271,7 @@ func.func @testloopop(%a : memref<10xf32>) -> () {
// CHECK: acc.loop
// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
// CHECK-NEXT: acc.yield
-// CHECK-NEXT: attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+// CHECK-NEXT: inclusiveUpperbound(array<i1: true>) independent
// CHECK: acc.loop gang({num=[[I64VALUE]] : i64})
// CHECK-NEXT: "test.openacc_dummy_op"() : () -> ()
// CHECK-NEXT: acc.yield
@@ -343,7 +343,7 @@ func.func @acc_loop_multiple_block() {
cf.br ^bb1(%22 : index)
^bb3:
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.yield
}
return
@@ -379,7 +379,7 @@ func.func @testloopfirstprivate(%a: memref<10xf32>, %b: memref<10xf32>) -> () {
acc.loop firstprivate(%firstprivate : memref<10xf32>) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
"test.openacc_dummy_op"() : () -> ()
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
return
}
@@ -389,7 +389,7 @@ func.func @testloopfirstprivate(%a: memref<10xf32>, %b: memref<10xf32>) -> () {
// CHECK: acc.loop firstprivate(%[[FIRSTPRIVATE]] : memref<10xf32>) control(%{{.*}}) = (%{{.*}}) to (%{{.*}}) step (%{{.*}}) {
// CHECK: "test.openacc_dummy_op"() : () -> ()
// CHECK: acc.yield
-// CHECK: } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+// CHECK: } inclusiveUpperbound(array<i1: true>) independent
// -----
@@ -470,15 +470,15 @@ func.func @testparallelop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x
acc.parallel private(%private_a, %private_c : memref<10xf32>, memref<10x10xf32>) firstprivate(%firstprivate_b : memref<10xf32>) {
}
acc.parallel {
- } attributes {defaultAttr = #acc<defaultvalue none>}
+ } defaultAttr(none)
acc.parallel {
- } attributes {defaultAttr = #acc<defaultvalue present>}
+ } defaultAttr(present)
acc.parallel async {
}
acc.parallel wait {
}
acc.parallel {
- } attributes {selfAttr}
+ } selfAttr
return
}
@@ -526,15 +526,15 @@ func.func @testparallelop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x
// CHECK-NEXT: acc.parallel firstprivate(%[[FIRSTPRIVATE_B]] : memref<10xf32>) private(%[[PRIVATE_A]], %[[PRIVATE_C]] : memref<10xf32>, memref<10x10xf32>) {
// CHECK-NEXT: }
// CHECK: acc.parallel {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: acc.parallel {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue present>}
+// CHECK-NEXT: } defaultAttr(present)
// CHECK: acc.parallel async {
// CHECK-NEXT: }
// CHECK: acc.parallel wait {
// CHECK-NEXT: }
// CHECK: acc.parallel {
-// CHECK-NEXT: } attributes {selfAttr}
+// CHECK-NEXT: } selfAttr
// -----
@@ -608,18 +608,18 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10
acc.serial private(%private_a, %private_c : memref<10xf32>, memref<10x10xf32>) firstprivate(%firstprivate : memref<10xf32>) {
}
acc.serial {
- } attributes {defaultAttr = #acc<defaultvalue none>}
+ } defaultAttr(none)
acc.serial {
- } attributes {defaultAttr = #acc<defaultvalue present>}
+ } defaultAttr(present)
acc.serial async {
}
acc.serial wait {
}
acc.serial {
- } attributes {selfAttr}
+ } selfAttr
acc.serial {
acc.yield
- } attributes {selfAttr}
+ } selfAttr
return
}
@@ -647,18 +647,18 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10
// CHECK-NEXT: acc.serial firstprivate(%[[FIRSTP]] : memref<10xf32>) private(%[[PRIVATE_A]], %[[PRIVATE_C]] : memref<10xf32>, memref<10x10xf32>) {
// CHECK-NEXT: }
// CHECK: acc.serial {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: acc.serial {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue present>}
+// CHECK-NEXT: } defaultAttr(present)
// CHECK: acc.serial async {
// CHECK-NEXT: }
// CHECK: acc.serial wait {
// CHECK-NEXT: }
// CHECK: acc.serial {
-// CHECK-NEXT: } attributes {selfAttr}
+// CHECK-NEXT: } selfAttr
// CHECK: acc.serial {
// CHECK: acc.yield
-// CHECK-NEXT: } attributes {selfAttr}
+// CHECK-NEXT: } selfAttr
// -----
@@ -682,18 +682,18 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10
acc.kernels wait({%i64value : i64, %i32value : i32, %idxValue : index}) {
}
acc.kernels {
- } attributes {defaultAttr = #acc<defaultvalue none>}
+ } defaultAttr(none)
acc.kernels {
- } attributes {defaultAttr = #acc<defaultvalue present>}
+ } defaultAttr(present)
acc.kernels async {
}
acc.kernels wait {
}
acc.kernels {
- } attributes {selfAttr}
+ } selfAttr
acc.kernels {
acc.terminator
- } attributes {selfAttr}
+ } selfAttr
return
}
@@ -716,18 +716,18 @@ func.func @testserialop(%a: memref<10xf32>, %b: memref<10xf32>, %c: memref<10x10
// CHECK: acc.kernels wait({[[I64VALUE]] : i64, [[I32VALUE]] : i32, [[IDXVALUE]] : index}) {
// CHECK-NEXT: }
// CHECK: acc.kernels {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: acc.kernels {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue present>}
+// CHECK-NEXT: } defaultAttr(present)
// CHECK: acc.kernels async {
// CHECK-NEXT: }
// CHECK: acc.kernels wait {
// CHECK-NEXT: }
// CHECK: acc.kernels {
-// CHECK-NEXT: } attributes {selfAttr}
+// CHECK-NEXT: } selfAttr
// CHECK: acc.kernels {
// CHECK: acc.terminator
-// CHECK-NEXT: } attributes {selfAttr}
+// CHECK-NEXT: } selfAttr
// -----
@@ -807,47 +807,47 @@ func.func @testdataop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
acc.data dataOperands(%5, %6, %7 : memref<f32>, memref<f32>, memref<f32>) {
}
- %8 = acc.copyin varPtr(%a : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyin_readonly>}
- %9 = acc.copyin varPtr(%b : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyin_readonly>}
- %10 = acc.copyin varPtr(%c : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyin_readonly>}
+ %8 = acc.copyin varPtr(%a : memref<f32>) dataClause(acc_copyin_readonly) -> memref<f32>
+ %9 = acc.copyin varPtr(%b : memref<f32>) dataClause(acc_copyin_readonly) -> memref<f32>
+ %10 = acc.copyin varPtr(%c : memref<f32>) dataClause(acc_copyin_readonly) -> memref<f32>
acc.data dataOperands(%8, %9, %10 : memref<f32>, memref<f32>, memref<f32>) {
}
- %11 = acc.create varPtr(%a : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
- %12 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
- %13 = acc.create varPtr(%c : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
+ %11 = acc.create varPtr(%a : memref<f32>) dataClause(acc_copyout) -> memref<f32>
+ %12 = acc.create varPtr(%b : memref<f32>) dataClause(acc_copyout) -> memref<f32>
+ %13 = acc.create varPtr(%c : memref<f32>) dataClause(acc_copyout) -> memref<f32>
acc.data dataOperands(%11, %12, %13 : memref<f32>, memref<f32>, memref<f32>) {
}
acc.copyout accPtr(%11 : memref<f32>) to varPtr(%a : memref<f32>)
acc.copyout accPtr(%12 : memref<f32>) to varPtr(%b : memref<f32>)
acc.copyout accPtr(%13 : memref<f32>) to varPtr(%c : memref<f32>)
- %14 = acc.create varPtr(%a : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout_zero>}
- %15 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout_zero>}
- %16 = acc.create varPtr(%c : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout_zero>}
+ %14 = acc.create varPtr(%a : memref<f32>) dataClause(acc_copyout_zero) -> memref<f32>
+ %15 = acc.create varPtr(%b : memref<f32>) dataClause(acc_copyout_zero) -> memref<f32>
+ %16 = acc.create varPtr(%c : memref<f32>) dataClause(acc_copyout_zero) -> memref<f32>
acc.data dataOperands(%14, %15, %16 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.copyout accPtr(%14 : memref<f32>) to varPtr(%a : memref<f32>) {dataClause = #acc<data_clause acc_copyout_zero>}
- acc.copyout accPtr(%15 : memref<f32>) to varPtr(%b : memref<f32>) {dataClause = #acc<data_clause acc_copyout_zero>}
- acc.copyout accPtr(%16 : memref<f32>) to varPtr(%c : memref<f32>) {dataClause = #acc<data_clause acc_copyout_zero>}
+ acc.copyout accPtr(%14 : memref<f32>) to varPtr(%a : memref<f32>) dataClause(acc_copyout_zero)
+ acc.copyout accPtr(%15 : memref<f32>) to varPtr(%b : memref<f32>) dataClause(acc_copyout_zero)
+ acc.copyout accPtr(%16 : memref<f32>) to varPtr(%c : memref<f32>) dataClause(acc_copyout_zero)
%17 = acc.create varPtr(%a : memref<f32>) -> memref<f32>
%18 = acc.create varPtr(%b : memref<f32>) -> memref<f32>
%19 = acc.create varPtr(%c : memref<f32>) -> memref<f32>
acc.data dataOperands(%17, %18, %19 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.delete accPtr(%17 : memref<f32>) {dataClause = #acc<data_clause acc_create>}
- acc.delete accPtr(%18 : memref<f32>) {dataClause = #acc<data_clause acc_create>}
- acc.delete accPtr(%19 : memref<f32>) {dataClause = #acc<data_clause acc_create>}
+ acc.delete accPtr(%17 : memref<f32>) dataClause(acc_create)
+ acc.delete accPtr(%18 : memref<f32>) dataClause(acc_create)
+ acc.delete accPtr(%19 : memref<f32>) dataClause(acc_create)
- %20 = acc.create varPtr(%a : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_create_zero>}
- %21 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_create_zero>}
- %22 = acc.create varPtr(%c : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_create_zero>}
+ %20 = acc.create varPtr(%a : memref<f32>) dataClause(acc_create_zero) -> memref<f32>
+ %21 = acc.create varPtr(%b : memref<f32>) dataClause(acc_create_zero) -> memref<f32>
+ %22 = acc.create varPtr(%c : memref<f32>) dataClause(acc_create_zero) -> memref<f32>
acc.data dataOperands(%20, %21, %22 : memref<f32>, memref<f32>, memref<f32>) {
}
- acc.delete accPtr(%20 : memref<f32>) {dataClause = #acc<data_clause acc_create_zero>}
- acc.delete accPtr(%21 : memref<f32>) {dataClause = #acc<data_clause acc_create_zero>}
- acc.delete accPtr(%22 : memref<f32>) {dataClause = #acc<data_clause acc_create_zero>}
+ acc.delete accPtr(%20 : memref<f32>) dataClause(acc_create_zero)
+ acc.delete accPtr(%21 : memref<f32>) dataClause(acc_create_zero)
+ acc.delete accPtr(%22 : memref<f32>) dataClause(acc_create_zero)
%23 = acc.nocreate varPtr(%a : memref<f32>) -> memref<f32>
%24 = acc.nocreate varPtr(%b : memref<f32>) -> memref<f32>
@@ -868,7 +868,7 @@ func.func @testdataop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
}
%32 = acc.copyin varPtr(%a : memref<f32>) -> memref<f32>
- %33 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
+ %33 = acc.create varPtr(%b : memref<f32>) dataClause(acc_copyout) -> memref<f32>
%34 = acc.present varPtr(%c : memref<f32>) -> memref<f32>
acc.data dataOperands(%32, %33, %34 : memref<f32>, memref<f32>, memref<f32>) {
}
@@ -876,33 +876,33 @@ func.func @testdataop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
%35 = acc.present varPtr(%a : memref<f32>) -> memref<f32>
acc.data dataOperands(%35 : memref<f32>) {
- } attributes { defaultAttr = #acc<defaultvalue none> }
+ } defaultAttr(none)
%36 = acc.present varPtr(%a : memref<f32>) -> memref<f32>
acc.data dataOperands(%36 : memref<f32>) {
- } attributes { defaultAttr = #acc<defaultvalue present> }
+ } defaultAttr(present)
acc.data {
- } attributes { defaultAttr = #acc<defaultvalue none> }
+ } defaultAttr(none)
acc.data async {
- } attributes { defaultAttr = #acc<defaultvalue none> }
+ } defaultAttr(none)
%a1 = arith.constant 1 : i64
acc.data async(%a1 : i64) {
- } attributes { defaultAttr = #acc<defaultvalue none> }
+ } defaultAttr(none)
acc.data wait {
- } attributes { defaultAttr = #acc<defaultvalue none> }
+ } defaultAttr(none)
%w1 = arith.constant 1 : i64
acc.data wait({%w1 : i64}) {
- } attributes { defaultAttr = #acc<defaultvalue none> }
+ } defaultAttr(none)
%wd1 = arith.constant 1 : i64
acc.data wait({devnum: %wd1 : i64, %w1 : i64}) {
- } attributes { defaultAttr = #acc<defaultvalue none> }
+ } defaultAttr(none)
return
}
@@ -930,29 +930,29 @@ func.func @testdataop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
// CHECK: acc.data dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyin_readonly>}
-// CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyin_readonly>}
-// CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyin_readonly>}
+// CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[ARGA]] : memref<f32>) dataClause(acc_copyin_readonly) -> memref<f32>
+// CHECK: %[[COPYIN_B:.*]] = acc.copyin varPtr(%[[ARGB]] : memref<f32>) dataClause(acc_copyin_readonly) -> memref<f32>
+// CHECK: %[[COPYIN_C:.*]] = acc.copyin varPtr(%[[ARGC]] : memref<f32>) dataClause(acc_copyin_readonly) -> memref<f32>
// CHECK: acc.data dataOperands(%[[COPYIN_A]], %[[COPYIN_B]], %[[COPYIN_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
-// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
-// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
+// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) dataClause(acc_copyout) -> memref<f32>
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) dataClause(acc_copyout) -> memref<f32>
+// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) dataClause(acc_copyout) -> memref<f32>
// CHECK: acc.data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
// CHECK: acc.copyout accPtr(%[[CREATE_A]] : memref<f32>) to varPtr(%[[ARGA]] : memref<f32>)
// CHECK: acc.copyout accPtr(%[[CREATE_B]] : memref<f32>) to varPtr(%[[ARGB]] : memref<f32>)
// CHECK: acc.copyout accPtr(%[[CREATE_C]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>)
-// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout_zero>}
-// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout_zero>}
-// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout_zero>}
+// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) dataClause(acc_copyout_zero) -> memref<f32>
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) dataClause(acc_copyout_zero) -> memref<f32>
+// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) dataClause(acc_copyout_zero) -> memref<f32>
// CHECK: acc.data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: acc.copyout accPtr(%[[CREATE_A]] : memref<f32>) to varPtr(%[[ARGA]] : memref<f32>) {dataClause = #acc<data_clause acc_copyout_zero>}
-// CHECK: acc.copyout accPtr(%[[CREATE_B]] : memref<f32>) to varPtr(%[[ARGB]] : memref<f32>) {dataClause = #acc<data_clause acc_copyout_zero>}
-// CHECK: acc.copyout accPtr(%[[CREATE_C]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>) {dataClause = #acc<data_clause acc_copyout_zero>}
+// CHECK: acc.copyout accPtr(%[[CREATE_A]] : memref<f32>) to varPtr(%[[ARGA]] : memref<f32>) dataClause(acc_copyout_zero)
+// CHECK: acc.copyout accPtr(%[[CREATE_B]] : memref<f32>) to varPtr(%[[ARGB]] : memref<f32>) dataClause(acc_copyout_zero)
+// CHECK: acc.copyout accPtr(%[[CREATE_C]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>) dataClause(acc_copyout_zero)
// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32>
@@ -960,9 +960,9 @@ func.func @testdataop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
// CHECK: acc.data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
-// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_create_zero>}
-// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_create_zero>}
-// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_create_zero>}
+// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) dataClause(acc_create_zero) -> memref<f32>
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) dataClause(acc_create_zero) -> memref<f32>
+// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) dataClause(acc_create_zero) -> memref<f32>
// CHECK: acc.data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
@@ -986,7 +986,7 @@ func.func @testdataop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
// CHECK: %[[COPYIN_A:.*]] = acc.copyin varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
-// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) dataClause(acc_copyout) -> memref<f32>
// CHECK: %[[PRESENT_C:.*]] = acc.present varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
// CHECK: acc.data dataOperands(%[[COPYIN_A]], %[[CREATE_B]], %[[PRESENT_C]] : memref<f32>, memref<f32>, memref<f32>) {
// CHECK-NEXT: }
@@ -994,54 +994,54 @@ func.func @testdataop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
// CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
// CHECK: acc.data dataOperands(%[[PRESENT_A]] : memref<f32>) {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: %[[PRESENT_A:.*]] = acc.present varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
// CHECK: acc.data dataOperands(%[[PRESENT_A]] : memref<f32>) {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue present>}
+// CHECK-NEXT: } defaultAttr(present)
// CHECK: acc.data {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: acc.data async {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: acc.data async(%{{.*}} : i64) {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: acc.data wait {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: acc.data wait({%{{.*}} : i64}) {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// CHECK: acc.data wait({devnum: %{{.*}} : i64, %{{.*}} : i64}) {
-// CHECK-NEXT: } attributes {defaultAttr = #acc<defaultvalue none>}
+// CHECK-NEXT: } defaultAttr(none)
// -----
func.func @testdataopmodifiers(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
- %0 = acc.create varPtr(%a : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier capture,zero>}
- %1 = acc.copyin varPtr(%b : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier readonly,capture,always>}
- %2 = acc.copyin varPtr(%c : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier always>}
- %3 = acc.create varPtr(%c : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier always>}
+ %0 = acc.create varPtr(%a : memref<f32>) <{modifiers = #acc<data_clause_modifier capture,zero>}> -> memref<f32>
+ %1 = acc.copyin varPtr(%b : memref<f32>) <{modifiers = #acc<data_clause_modifier readonly,capture,always>}> -> memref<f32>
+ %2 = acc.copyin varPtr(%c : memref<f32>) <{modifiers = #acc<data_clause_modifier always>}> -> memref<f32>
+ %3 = acc.create varPtr(%c : memref<f32>) <{modifiers = #acc<data_clause_modifier always>}> -> memref<f32>
acc.data dataOperands(%0, %1, %2, %3 : memref<f32>, memref<f32>, memref<f32>, memref<f32>) {
}
- acc.copyout accPtr(%0 : memref<f32>) to varPtr(%a : memref<f32>) {modifiers = #acc<data_clause_modifier zero,capture,always>}
- acc.delete accPtr(%2 : memref<f32>) {modifiers = #acc<data_clause_modifier always>}
- acc.copyout accPtr(%3 : memref<f32>) to varPtr(%c : memref<f32>) {modifiers = #acc<data_clause_modifier always>}
+ acc.copyout accPtr(%0 : memref<f32>) to varPtr(%a : memref<f32>) <{modifiers = #acc<data_clause_modifier zero,capture,always>}>
+ acc.delete accPtr(%2 : memref<f32>) <{modifiers = #acc<data_clause_modifier always>}>
+ acc.copyout accPtr(%3 : memref<f32>) to varPtr(%c : memref<f32>) <{modifiers = #acc<data_clause_modifier always>}>
func.return
}
// CHECK: func @testdataopmodifiers(%[[ARGA:.*]]: memref<f32>, %[[ARGB:.*]]: memref<f32>, %[[ARGC:.*]]: memref<f32>) {
-// CHECK: %[[CREATEA:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier zero,capture>}
-// CHECK: %[[COPYINB:.*]] = acc.copyin varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier always,readonly,capture>}
-// CHECK: %[[COPYINC:.*]] = acc.copyin varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier always>}
-// CHECK: %[[CREATEC:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {modifiers = #acc<data_clause_modifier always>}
-// CHECK: acc.copyout accPtr(%[[CREATEA]] : memref<f32>) to varPtr(%[[ARGA]] : memref<f32>) {modifiers = #acc<data_clause_modifier always,zero,capture>}
-// CHECK: acc.delete accPtr(%[[COPYINC]] : memref<f32>) {modifiers = #acc<data_clause_modifier always>}
-// CHECK: acc.copyout accPtr(%[[CREATEC]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>) {modifiers = #acc<data_clause_modifier always>}
+// CHECK: %[[CREATEA:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) <{modifiers = #acc<data_clause_modifier zero,capture>}> -> memref<f32>
+// CHECK: %[[COPYINB:.*]] = acc.copyin varPtr(%[[ARGB]] : memref<f32>) <{modifiers = #acc<data_clause_modifier always,readonly,capture>}> -> memref<f32>
+// CHECK: %[[COPYINC:.*]] = acc.copyin varPtr(%[[ARGC]] : memref<f32>) <{modifiers = #acc<data_clause_modifier always>}> -> memref<f32>
+// CHECK: %[[CREATEC:.*]] = acc.create varPtr(%[[ARGC]] : memref<f32>) <{modifiers = #acc<data_clause_modifier always>}> -> memref<f32>
+// CHECK: acc.copyout accPtr(%[[CREATEA]] : memref<f32>) to varPtr(%[[ARGA]] : memref<f32>) <{modifiers = #acc<data_clause_modifier always,zero,capture>}>
+// CHECK: acc.delete accPtr(%[[COPYINC]] : memref<f32>) <{modifiers = #acc<data_clause_modifier always>}>
+// CHECK: acc.copyout accPtr(%[[CREATEC]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>) <{modifiers = #acc<data_clause_modifier always>}>
// -----
@@ -1064,7 +1064,7 @@ func.func @testupdateop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> ()
acc.update dataOperands(%0, %1, %2 : memref<f32>, memref<f32>, memref<f32>)
acc.update async dataOperands(%0, %1, %2 : memref<f32>, memref<f32>, memref<f32>)
acc.update wait dataOperands(%0, %1, %2 : memref<f32>, memref<f32>, memref<f32>)
- acc.update dataOperands(%0, %1, %2 : memref<f32>, memref<f32>, memref<f32>) attributes {ifPresent}
+ acc.update dataOperands(%0, %1, %2 : memref<f32>, memref<f32>, memref<f32>) ifPresent
return
}
@@ -1083,7 +1083,7 @@ func.func @testupdateop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> ()
// CHECK: acc.update dataOperands(%{{.*}}, %{{.*}}, %{{.*}} : memref<f32>, memref<f32>, memref<f32>)
// CHECK: acc.update async dataOperands(%{{.*}}, %{{.*}}, %{{.*}} : memref<f32>, memref<f32>, memref<f32>)
// CHECK: acc.update wait dataOperands(%{{.*}}, %{{.*}}, %{{.*}} : memref<f32>, memref<f32>, memref<f32>)
-// CHECK: acc.update dataOperands(%{{.*}}, %{{.*}}, %{{.*}} : memref<f32>, memref<f32>, memref<f32>) attributes {ifPresent}
+// CHECK: acc.update dataOperands(%{{.*}}, %{{.*}}, %{{.*}} : memref<f32>, memref<f32>, memref<f32>) ifPresent
// -----
@@ -1214,7 +1214,7 @@ func.func @testexitdataop(%a: !llvm.ptr) -> () {
acc.delete accPtr(%1 : !llvm.ptr)
%2 = acc.getdeviceptr varPtr(%a : !llvm.ptr) varType(f64) -> !llvm.ptr
- acc.exit_data async dataOperands(%2 : !llvm.ptr) attributes {finalize}
+ acc.exit_data async dataOperands(%2 : !llvm.ptr) finalize
acc.delete accPtr(%2 : !llvm.ptr)
%3 = acc.getdeviceptr varPtr(%a : !llvm.ptr) varType(f64) -> !llvm.ptr
@@ -1263,7 +1263,7 @@ func.func @testexitdataop(%a: !llvm.ptr) -> () {
// CHECK: acc.delete accPtr(%[[DEVPTR]] : !llvm.ptr)
// CHECK: %[[DEVPTR:.*]] = acc.getdeviceptr varPtr(%[[ARGA]] : !llvm.ptr) varType(f64) -> !llvm.ptr
-// CHECK: acc.exit_data async dataOperands(%[[DEVPTR]] : !llvm.ptr) attributes {finalize}
+// CHECK: acc.exit_data async dataOperands(%[[DEVPTR]] : !llvm.ptr) finalize
// CHECK: acc.delete accPtr(%[[DEVPTR]] : !llvm.ptr)
// CHECK: %[[DEVPTR:.*]] = acc.getdeviceptr varPtr(%[[ARGA]] : !llvm.ptr) varType(f64) -> !llvm.ptr
@@ -1306,8 +1306,8 @@ func.func @testenterdataop(%a: !llvm.ptr, %b: !llvm.ptr, %c: !llvm.ptr) -> () {
%0 = acc.copyin varPtr(%a : !llvm.ptr) varType(f64) -> !llvm.ptr
acc.enter_data dataOperands(%0 : !llvm.ptr)
%1 = acc.create varPtr(%a : !llvm.ptr) varType(f64) -> !llvm.ptr
- %2 = acc.create varPtr(%b : !llvm.ptr) varType(f64) -> !llvm.ptr {dataClause = #acc<data_clause acc_create_zero>}
- %3 = acc.create varPtr(%c : !llvm.ptr) varType(f64) -> !llvm.ptr {dataClause = #acc<data_clause acc_create_zero>}
+ %2 = acc.create varPtr(%b : !llvm.ptr) varType(f64) dataClause(acc_create_zero) -> !llvm.ptr<0>
+ %3 = acc.create varPtr(%c : !llvm.ptr) varType(f64) dataClause(acc_create_zero) -> !llvm.ptr<0>
acc.enter_data dataOperands(%1, %2, %3 : !llvm.ptr, !llvm.ptr, !llvm.ptr)
%4 = acc.attach varPtr(%a : !llvm.ptr) varType(f64) -> !llvm.ptr
acc.enter_data dataOperands(%4 : !llvm.ptr)
@@ -1335,8 +1335,8 @@ func.func @testenterdataop(%a: !llvm.ptr, %b: !llvm.ptr, %c: !llvm.ptr) -> () {
// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr(%[[ARGA]] : !llvm.ptr) varType(f64) -> !llvm.ptr
// CHECK: acc.enter_data dataOperands(%[[COPYIN]] : !llvm.ptr)
// CHECK: %[[CREATE_A:.*]] = acc.create varPtr(%[[ARGA]] : !llvm.ptr) varType(f64) -> !llvm.ptr
-// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : !llvm.ptr) varType(f64) -> !llvm.ptr {dataClause = #acc<data_clause acc_create_zero>}
-// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : !llvm.ptr) varType(f64) -> !llvm.ptr {dataClause = #acc<data_clause acc_create_zero>}
+// CHECK: %[[CREATE_B:.*]] = acc.create varPtr(%[[ARGB]] : !llvm.ptr) varType(f64) dataClause(acc_create_zero) -> !llvm.ptr
+// CHECK: %[[CREATE_C:.*]] = acc.create varPtr(%[[ARGC]] : !llvm.ptr) varType(f64) dataClause(acc_create_zero) -> !llvm.ptr
// CHECK: acc.enter_data dataOperands(%[[CREATE_A]], %[[CREATE_B]], %[[CREATE_C]] : !llvm.ptr, !llvm.ptr, !llvm.ptr)
// CHECK: %[[ATTACH:.*]] = acc.attach varPtr(%[[ARGA]] : !llvm.ptr) varType(f64) -> !llvm.ptr
// CHECK: acc.enter_data dataOperands(%[[ATTACH]] : !llvm.ptr)
@@ -1356,7 +1356,7 @@ func.func @testenterdataop(%a: !llvm.ptr, %b: !llvm.ptr, %c: !llvm.ptr) -> () {
// -----
func.func @teststructureddataclauseops(%a: memref<10xf32>, %b: memref<memref<10xf32>>, %c: memref<10x20xf32>) -> () {
- %deviceptr = acc.deviceptr varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {name = "arrayA"}
+ %deviceptr = acc.deviceptr varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) name("arrayA") -> memref<10xf32>
acc.parallel dataOperands(%deviceptr : memref<10xf32>) {
}
@@ -1368,36 +1368,36 @@ func.func @teststructureddataclauseops(%a: memref<10xf32>, %b: memref<memref<10x
acc.parallel dataOperands(%copyin : memref<10xf32>) {
}
- %copyinreadonly = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copyin_readonly>}
+ %copyinreadonly = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copyin_readonly) -> memref<10xf32>
acc.kernels dataOperands(%copyinreadonly : memref<10xf32>) {
}
- %copyinfromcopy = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>}
+ %copyinfromcopy = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copy) -> memref<10xf32>
acc.serial dataOperands(%copyinfromcopy : memref<10xf32>) {
}
- acc.copyout accPtr(%copyinfromcopy : memref<10xf32>) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) {dataClause = #acc<data_clause acc_copy>}
+ acc.copyout accPtr(%copyinfromcopy : memref<10xf32>) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copy)
%create = acc.create varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32>
- %createimplicit = acc.create varPtr(%c : memref<10x20xf32>) varType(tensor<10x20xf32>) -> memref<10x20xf32> {implicit = true}
+ %createimplicit = acc.create varPtr(%c : memref<10x20xf32>) varType(tensor<10x20xf32>) implicit(true) -> memref<10x20xf32>
acc.parallel dataOperands(%create, %createimplicit : memref<10xf32>, memref<10x20xf32>) {
}
- acc.delete accPtr(%create : memref<10xf32>) {dataClause = #acc<data_clause acc_create>}
- acc.delete accPtr(%createimplicit : memref<10x20xf32>) {dataClause = #acc<data_clause acc_create>, implicit = true}
+ acc.delete accPtr(%create : memref<10xf32>) dataClause(acc_create)
+ acc.delete accPtr(%createimplicit : memref<10x20xf32>) dataClause(acc_create) implicit(true)
- %copyoutzero = acc.create varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copyout_zero>}
+ %copyoutzero = acc.create varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copyout_zero) -> memref<10xf32>
acc.parallel dataOperands(%copyoutzero: memref<10xf32>) {
}
- acc.copyout accPtr(%copyoutzero : memref<10xf32>) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) {dataClause = #acc<data_clause acc_copyout_zero>}
+ acc.copyout accPtr(%copyoutzero : memref<10xf32>) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copyout_zero)
%attach = acc.attach varPtr(%b : memref<memref<10xf32>>) -> memref<memref<10xf32>>
acc.parallel dataOperands(%attach : memref<memref<10xf32>>) {
}
- acc.detach accPtr(%attach : memref<memref<10xf32>>) {dataClause = #acc<data_clause acc_attach>}
+ acc.detach accPtr(%attach : memref<memref<10xf32>>) dataClause(acc_attach)
- %copyinparent = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) varPtrPtr(%b : memref<memref<10xf32>>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>}
+ %copyinparent = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) varPtrPtr(%b : memref<memref<10xf32>>) dataClause(acc_copy) -> memref<10xf32>
acc.parallel dataOperands(%copyinparent : memref<10xf32>) {
}
- acc.copyout accPtr(%copyinparent : memref<10xf32>) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) {dataClause = #acc<data_clause acc_copy>}
+ acc.copyout accPtr(%copyinparent : memref<10xf32>) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copy)
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
@@ -1407,24 +1407,24 @@ func.func @teststructureddataclauseops(%a: memref<10xf32>, %b: memref<memref<10x
%c20 = arith.constant 20 : index
%bounds1full = acc.bounds lowerbound(%c0 : index) upperbound(%c9 : index) stride(%c1 : index)
- %copyinfullslice1 = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) bounds(%bounds1full) -> memref<10xf32> {name = "arrayA[0:9]"}
+ %copyinfullslice1 = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) bounds(%bounds1full) name("arrayA[0:9]") -> memref<10xf32>
// Specify full-bounds but assume that startIdx of array reference is 1.
- %bounds2full = acc.bounds lowerbound(%c1 : index) upperbound(%c20 : index) extent(%c20 : index) stride(%c4 : index) startIdx(%c1 : index) {strideInBytes = true}
+ %bounds2full = acc.bounds lowerbound(%c1 : index) upperbound(%c20 : index) extent(%c20 : index) stride(%c4 : index) startIdx(%c1 : index) strideInBytes(true)
%copyinfullslice2 = acc.copyin varPtr(%c : memref<10x20xf32>) varType(tensor<10x20xf32>) bounds(%bounds1full, %bounds2full) -> memref<10x20xf32>
acc.parallel dataOperands(%copyinfullslice1, %copyinfullslice2 : memref<10xf32>, memref<10x20xf32>) {
}
%bounds1partial = acc.bounds lowerbound(%c4 : index) upperbound(%c9 : index) stride(%c1 : index)
- %copyinpartial = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) bounds(%bounds1partial) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>}
+ %copyinpartial = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) bounds(%bounds1partial) dataClause(acc_copy) -> memref<10xf32>
acc.parallel dataOperands(%copyinpartial : memref<10xf32>) {
}
- acc.copyout accPtr(%copyinpartial : memref<10xf32>) bounds(%bounds1partial) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) {dataClause = #acc<data_clause acc_copy>}
+ acc.copyout accPtr(%copyinpartial : memref<10xf32>) bounds(%bounds1partial) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copy)
return
}
// CHECK: func.func @teststructureddataclauseops([[ARGA:%.*]]: memref<10xf32>, [[ARGB:%.*]]: memref<memref<10xf32>>, [[ARGC:%.*]]: memref<10x20xf32>) {
-// CHECK: [[DEVICEPTR:%.*]] = acc.deviceptr varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {name = "arrayA"}
+// CHECK: [[DEVICEPTR:%.*]] = acc.deviceptr varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) name("arrayA") -> memref<10xf32>
// CHECK-NEXT: acc.parallel dataOperands([[DEVICEPTR]] : memref<10xf32>) {
// CHECK-NEXT: }
// CHECK: [[PRESENT:%.*]] = acc.present varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32>
@@ -1433,73 +1433,73 @@ func.func @teststructureddataclauseops(%a: memref<10xf32>, %b: memref<memref<10x
// CHECK: [[COPYIN:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32>
// CHECK-NEXT: acc.parallel dataOperands([[COPYIN]] : memref<10xf32>) {
// CHECK-NEXT: }
-// CHECK: [[COPYINRO:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copyin_readonly>}
+// CHECK: [[COPYINRO:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copyin_readonly) -> memref<10xf32>
// CHECK-NEXT: acc.kernels dataOperands([[COPYINRO]] : memref<10xf32>) {
// CHECK-NEXT: }
-// CHECK: [[COPYINCOPY:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>}
+// CHECK: [[COPYINCOPY:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copy) -> memref<10xf32>
// CHECK-NEXT: acc.serial dataOperands([[COPYINCOPY]] : memref<10xf32>) {
// CHECK-NEXT: }
-// CHECK-NEXT: acc.copyout accPtr([[COPYINCOPY]] : memref<10xf32>) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) {dataClause = #acc<data_clause acc_copy>}
+// CHECK-NEXT: acc.copyout accPtr([[COPYINCOPY]] : memref<10xf32>) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copy)
// CHECK: [[CREATE:%.*]] = acc.create varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32>
-// CHECK-NEXT: [[CREATEIMP:%.*]] = acc.create varPtr([[ARGC]] : memref<10x20xf32>) varType(tensor<10x20xf32>) -> memref<10x20xf32> {implicit = true}
+// CHECK-NEXT: [[CREATEIMP:%.*]] = acc.create varPtr([[ARGC]] : memref<10x20xf32>) varType(tensor<10x20xf32>) implicit(true) -> memref<10x20xf32>
// CHECK-NEXT: acc.parallel dataOperands([[CREATE]], [[CREATEIMP]] : memref<10xf32>, memref<10x20xf32>) {
// CHECK-NEXT: }
-// CHECK-NEXT: acc.delete accPtr([[CREATE]] : memref<10xf32>) {dataClause = #acc<data_clause acc_create>}
-// CHECK-NEXT: acc.delete accPtr([[CREATEIMP]] : memref<10x20xf32>) {dataClause = #acc<data_clause acc_create>, implicit = true}
-// CHECK: [[COPYOUTZ:%.*]] = acc.create varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copyout_zero>}
+// CHECK-NEXT: acc.delete accPtr([[CREATE]] : memref<10xf32>) dataClause(acc_create)
+// CHECK-NEXT: acc.delete accPtr([[CREATEIMP]] : memref<10x20xf32>) dataClause(acc_create) implicit(true)
+// CHECK: [[COPYOUTZ:%.*]] = acc.create varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copyout_zero) -> memref<10xf32>
// CHECK-NEXT: acc.parallel dataOperands([[COPYOUTZ]] : memref<10xf32>) {
// CHECK-NEXT: }
-// CHECK-NEXT: acc.copyout accPtr([[COPYOUTZ]] : memref<10xf32>) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) {dataClause = #acc<data_clause acc_copyout_zero>}
+// CHECK-NEXT: acc.copyout accPtr([[COPYOUTZ]] : memref<10xf32>) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copyout_zero)
// CHECK: [[ATTACH:%.*]] = acc.attach varPtr([[ARGB]] : memref<memref<10xf32>>) -> memref<memref<10xf32>>
// CHECK-NEXT: acc.parallel dataOperands([[ATTACH]] : memref<memref<10xf32>>) {
// CHECK-NEXT: }
-// CHECK-NEXT: acc.detach accPtr([[ATTACH]] : memref<memref<10xf32>>) {dataClause = #acc<data_clause acc_attach>}
-// CHECK: [[COPYINP:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) varPtrPtr([[ARGB]] : memref<memref<10xf32>>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>}
+// CHECK-NEXT: acc.detach accPtr([[ATTACH]] : memref<memref<10xf32>>) dataClause(acc_attach)
+// CHECK: [[COPYINP:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) varPtrPtr([[ARGB]] : memref<memref<10xf32>>) dataClause(acc_copy) -> memref<10xf32>
// CHECK-NEXT: acc.parallel dataOperands([[COPYINP]] : memref<10xf32>) {
// CHECK-NEXT: }
-// CHECK-NEXT: acc.copyout accPtr([[COPYINP]] : memref<10xf32>) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) {dataClause = #acc<data_clause acc_copy>}
+// CHECK-NEXT: acc.copyout accPtr([[COPYINP]] : memref<10xf32>) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copy)
// CHECK-DAG: [[CON0:%.*]] = arith.constant 0 : index
// CHECK-DAG: [[CON1:%.*]] = arith.constant 1 : index
// CHECK-DAG: [[CON4:%.*]] = arith.constant 4 : index
// CHECK-DAG: [[CON9:%.*]] = arith.constant 9 : index
// CHECK-DAG: [[CON20:%.*]] = arith.constant 20 : index
// CHECK: [[BOUNDS1F:%.*]] = acc.bounds lowerbound([[CON0]] : index) upperbound([[CON9]] : index) stride([[CON1]] : index)
-// CHECK-NEXT: [[COPYINF1:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) bounds([[BOUNDS1F]]) -> memref<10xf32> {name = "arrayA[0:9]"}
-// CHECK-NEXT: [[BOUNDS2F:%.*]] = acc.bounds lowerbound([[CON1]] : index) upperbound([[CON20]] : index) extent([[CON20]] : index) stride([[CON4]] : index) startIdx([[CON1]] : index) {strideInBytes = true}
+// CHECK-NEXT: [[COPYINF1:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) bounds([[BOUNDS1F]]) name("arrayA[0:9]") -> memref<10xf32>
+// CHECK-NEXT: [[BOUNDS2F:%.*]] = acc.bounds lowerbound([[CON1]] : index) upperbound([[CON20]] : index) extent([[CON20]] : index) stride([[CON4]] : index) startIdx([[CON1]] : index) strideInBytes(true)
// CHECK-NEXT: [[COPYINF2:%.*]] = acc.copyin varPtr([[ARGC]] : memref<10x20xf32>) varType(tensor<10x20xf32>) bounds([[BOUNDS1F]], [[BOUNDS2F]]) -> memref<10x20xf32>
// CHECK-NEXT: acc.parallel dataOperands([[COPYINF1]], [[COPYINF2]] : memref<10xf32>, memref<10x20xf32>) {
// CHECK-NEXT: }
// CHECK: [[BOUNDS1P:%.*]] = acc.bounds lowerbound([[CON4]] : index) upperbound([[CON9]] : index) stride([[CON1]] : index)
-// CHECK-NEXT: [[COPYINPART:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) bounds([[BOUNDS1P]]) -> memref<10xf32> {dataClause = #acc<data_clause acc_copy>}
+// CHECK-NEXT: [[COPYINPART:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) bounds([[BOUNDS1P]]) dataClause(acc_copy) -> memref<10xf32>
// CHECK-NEXT: acc.parallel dataOperands([[COPYINPART]] : memref<10xf32>) {
// CHECK-NEXT: }
-// CHECK-NEXT: acc.copyout accPtr([[COPYINPART]] : memref<10xf32>) bounds([[BOUNDS1P]]) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) {dataClause = #acc<data_clause acc_copy>}
+// CHECK-NEXT: acc.copyout accPtr([[COPYINPART]] : memref<10xf32>) bounds([[BOUNDS1P]]) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copy)
// -----
func.func @testunstructuredclauseops(%a: memref<10xf32>) -> () {
- %copyin = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {structured = false}
+ %copyin = acc.copyin varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) structured(false) -> memref<10xf32>
acc.enter_data dataOperands(%copyin : memref<10xf32>)
- %devptr = acc.getdeviceptr varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copyout>}
+ %devptr = acc.getdeviceptr varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copyout) -> memref<10xf32>
acc.exit_data dataOperands(%devptr : memref<10xf32>)
- acc.copyout accPtr(%devptr : memref<10xf32>) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) {structured = false}
+ acc.copyout accPtr(%devptr : memref<10xf32>) to varPtr(%a : memref<10xf32>) varType(tensor<10xf32>) structured(false)
return
}
// CHECK: func.func @testunstructuredclauseops([[ARGA:%.*]]: memref<10xf32>) {
-// CHECK: [[COPYIN:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {structured = false}
+// CHECK: [[COPYIN:%.*]] = acc.copyin varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) structured(false) -> memref<10xf32>
// CHECK-NEXT: acc.enter_data dataOperands([[COPYIN]] : memref<10xf32>)
-// CHECK: [[DEVPTR:%.*]] = acc.getdeviceptr varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) -> memref<10xf32> {dataClause = #acc<data_clause acc_copyout>}
+// CHECK: [[DEVPTR:%.*]] = acc.getdeviceptr varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) dataClause(acc_copyout) -> memref<10xf32>
// CHECK-NEXT: acc.exit_data dataOperands([[DEVPTR]] : memref<10xf32>)
-// CHECK-NEXT: acc.copyout accPtr([[DEVPTR]] : memref<10xf32>) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) {structured = false}
+// CHECK-NEXT: acc.copyout accPtr([[DEVPTR]] : memref<10xf32>) to varPtr([[ARGA]] : memref<10xf32>) varType(tensor<10xf32>) structured(false)
// -----
func.func @host_device_ops(%a: memref<f32>) -> () {
%devptr = acc.getdeviceptr varPtr(%a : memref<f32>) -> memref<f32>
- acc.update_host accPtr(%devptr : memref<f32>) to varPtr(%a : memref<f32>) {structured = false}
+ acc.update_host accPtr(%devptr : memref<f32>) to varPtr(%a : memref<f32>) structured(false)
acc.update dataOperands(%devptr : memref<f32>)
%accPtr = acc.update_device varPtr(%a : memref<f32>) -> memref<f32>
@@ -1510,7 +1510,7 @@ func.func @host_device_ops(%a: memref<f32>) -> () {
// CHECK-LABEL: func.func @host_device_ops(
// CHECK-SAME: %[[A:.*]]: memref<f32>)
// CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : memref<f32>) -> memref<f32>
-// CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : memref<f32>) to varPtr(%[[A]] : memref<f32>) {structured = false}
+// CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : memref<f32>) to varPtr(%[[A]] : memref<f32>) structured(false)
// CHECK: acc.update dataOperands(%[[DEVPTR_A]] : memref<f32>)
// CHECK: %[[DEVPTR_A:.*]] = acc.update_device varPtr(%[[A]] : memref<f32>) -> memref<f32>
// CHECK: acc.update dataOperands(%[[DEVPTR_A]] : memref<f32>)
@@ -1522,7 +1522,7 @@ func.func @host_data_ops(%a: !llvm.ptr, %ifCond: i1) -> () {
acc.host_data dataOperands(%0: !llvm.ptr) {
}
acc.host_data dataOperands(%0: !llvm.ptr) {
- } attributes {if_present}
+ } ifPresent
acc.host_data if(%ifCond) dataOperands(%0: !llvm.ptr) {
}
return
@@ -1533,7 +1533,7 @@ func.func @host_data_ops(%a: !llvm.ptr, %ifCond: i1) -> () {
// CHECK: %[[PTR:.*]] = acc.use_device varPtr(%[[A]] : !llvm.ptr) varType(f64) -> !llvm.ptr
// CHECK: acc.host_data dataOperands(%[[PTR]] : !llvm.ptr)
// CHECK: acc.host_data dataOperands(%[[PTR]] : !llvm.ptr) {
-// CHECK: } attributes {if_present}
+// CHECK: } ifPresent
// CHECK: acc.host_data if(%[[IFCOND]]) dataOperands(%[[PTR]] : !llvm.ptr)
// -----
@@ -1624,7 +1624,7 @@ func.func @acc_reduc_test(%a : memref<i64>) -> () {
acc.parallel reduction(%reduction_a : memref<i64>) {
acc.loop reduction(%reduction_a : memref<i64>) control(%iv : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {inclusiveUpperbound = array<i1: true>, independent = [#acc.device_type<none>]}
+ } inclusiveUpperbound(array<i1: true>) independent
acc.yield
}
return
@@ -1699,14 +1699,14 @@ func.func @acc_kernels_reduc_test(%a : memref<i64>) -> () {
func.func @testdeclareop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> () {
%0 = acc.copyin varPtr(%a : memref<f32>) -> memref<f32>
// copyin(zero)
- %1 = acc.copyin varPtr(%b : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyin_readonly>}
+ %1 = acc.copyin varPtr(%b : memref<f32>) dataClause(acc_copyin_readonly) -> memref<f32>
// copy
- %2 = acc.copyin varPtr(%c : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copy>}
+ %2 = acc.copyin varPtr(%c : memref<f32>) dataClause(acc_copy) -> memref<f32>
acc.declare_enter dataOperands(%0, %1, %2 : memref<f32>, memref<f32>, memref<f32>)
%3 = acc.create varPtr(%a : memref<f32>) -> memref<f32>
// copyout
- %4 = acc.create varPtr(%b : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
+ %4 = acc.create varPtr(%b : memref<f32>) dataClause(acc_copyout) -> memref<f32>
%5 = acc.present varPtr(%c : memref<f32>) -> memref<f32>
acc.declare_enter dataOperands(%3, %4, %5 : memref<f32>, memref<f32>, memref<f32>)
@@ -1716,18 +1716,18 @@ func.func @testdeclareop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> (
acc.declare_enter dataOperands(%6, %7, %8 : memref<f32>, memref<f32>, memref<f32>)
acc.declare_exit dataOperands(%7, %8 : memref<f32>, memref<f32>)
- acc.delete accPtr(%7 : memref<f32>) {dataClause = #acc<data_clause acc_declare_device_resident> }
- acc.delete accPtr(%8 : memref<f32>) {dataClause = #acc<data_clause acc_declare_link> }
+ acc.delete accPtr(%7 : memref<f32>) dataClause(acc_declare_device_resident)
+ acc.delete accPtr(%8 : memref<f32>) dataClause(acc_declare_link)
acc.declare_exit dataOperands(%3, %4, %5 : memref<f32>, memref<f32>, memref<f32>)
- acc.delete accPtr(%3 : memref<f32>) {dataClause = #acc<data_clause acc_create> }
+ acc.delete accPtr(%3 : memref<f32>) dataClause(acc_create)
acc.copyout accPtr(%4 : memref<f32>) to varPtr(%b : memref<f32>)
- acc.delete accPtr(%5 : memref<f32>) {dataClause = #acc<data_clause acc_present> }
+ acc.delete accPtr(%5 : memref<f32>) dataClause(acc_present)
acc.declare_exit dataOperands(%0, %1, %2 : memref<f32>, memref<f32>, memref<f32>)
- acc.delete accPtr(%0 : memref<f32>) {dataClause = #acc<data_clause acc_copyin> }
- acc.delete accPtr(%1 : memref<f32>) {dataClause = #acc<data_clause acc_copyin_readonly> }
- acc.copyout accPtr(%2 : memref<f32>) to varPtr(%c : memref<f32>) { dataClause = #acc<data_clause acc_copy> }
+ acc.delete accPtr(%0 : memref<f32>) dataClause(acc_copyin)
+ acc.delete accPtr(%1 : memref<f32>) dataClause(acc_copyin_readonly)
+ acc.copyout accPtr(%2 : memref<f32>) to varPtr(%c : memref<f32>) dataClause(acc_copy)
return
}
@@ -1735,11 +1735,11 @@ func.func @testdeclareop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> (
// CHECK-LABEL: func.func @testdeclareop(
// CHECK-SAME: %[[ARGA:.*]]: memref<f32>, %[[ARGB:.*]]: memref<f32>, %[[ARGC:.*]]: memref<f32>)
// CHECK: %[[COPYIN:.*]] = acc.copyin varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
-// CHECK-NEXT: %[[COPYINRO:.*]] = acc.copyin varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyin_readonly>}
-// CHECK-NEXT: %[[COPY:.*]] = acc.copyin varPtr(%[[ARGC]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copy>}
+// CHECK-NEXT: %[[COPYINRO:.*]] = acc.copyin varPtr(%[[ARGB]] : memref<f32>) dataClause(acc_copyin_readonly) -> memref<f32>
+// CHECK-NEXT: %[[COPY:.*]] = acc.copyin varPtr(%[[ARGC]] : memref<f32>) dataClause(acc_copy) -> memref<f32>
// CHECK-NEXT: acc.declare_enter dataOperands(%[[COPYIN]], %[[COPYINRO]], %[[COPY]] : memref<f32>, memref<f32>, memref<f32>)
// CHECK: %[[CREATE:.*]] = acc.create varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
-// CHECK-NEXT: %[[COPYOUT:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) -> memref<f32> {dataClause = #acc<data_clause acc_copyout>}
+// CHECK-NEXT: %[[COPYOUT:.*]] = acc.create varPtr(%[[ARGB]] : memref<f32>) dataClause(acc_copyout) -> memref<f32>
// CHECK-NEXT: %[[PRESENT:.*]] = acc.present varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
// CHECK-NEXT: acc.declare_enter dataOperands(%[[CREATE]], %[[COPYOUT]], %[[PRESENT]] : memref<f32>, memref<f32>, memref<f32>)
// CHECK: %[[DEVICEPTR:.*]] = acc.deviceptr varPtr(%[[ARGA]] : memref<f32>) -> memref<f32>
@@ -1747,16 +1747,16 @@ func.func @testdeclareop(%a: memref<f32>, %b: memref<f32>, %c: memref<f32>) -> (
// CHECK-NEXT: %[[LINK:.*]] = acc.declare_link varPtr(%[[ARGC]] : memref<f32>) -> memref<f32>
// CHECK-NEXT: acc.declare_enter dataOperands(%[[DEVICEPTR]], %[[DEVICERES]], %[[LINK]] : memref<f32>, memref<f32>, memref<f32>)
// CHECK: acc.declare_exit dataOperands(%[[DEVICERES]], %[[LINK]] : memref<f32>, memref<f32>)
-// CHECK-NEXT: acc.delete accPtr(%[[DEVICERES]] : memref<f32>) {dataClause = #acc<data_clause acc_declare_device_resident>}
-// CHECK-NEXT: acc.delete accPtr(%[[LINK]] : memref<f32>) {dataClause = #acc<data_clause acc_declare_link>}
+// CHECK-NEXT: acc.delete accPtr(%[[DEVICERES]] : memref<f32>) dataClause(acc_declare_device_resident)
+// CHECK-NEXT: acc.delete accPtr(%[[LINK]] : memref<f32>) dataClause(acc_declare_link)
// CHECK: acc.declare_exit dataOperands(%[[CREATE]], %[[COPYOUT]], %[[PRESENT]] : memref<f32>, memref<f32>, memref<f32>)
-// CHECK-NEXT: acc.delete accPtr(%[[CREATE]] : memref<f32>) {dataClause = #acc<data_clause acc_create>}
+// CHECK-NEXT: acc.delete accPtr(%[[CREATE]] : memref<f32>) dataClause(acc_create)
// CHECK-NEXT: acc.copyout accPtr(%[[COPYOUT]] : memref<f32>) to varPtr(%[[ARGB]] : memref<f32>)
-// CHECK-NEXT: acc.delete accPtr(%[[PRESENT]] : memref<f32>) {dataClause = #acc<data_clause acc_present>}
+// CHECK-NEXT: acc.delete accPtr(%[[PRESENT]] : memref<f32>) dataClause(acc_present)
// CHECK: acc.declare_exit dataOperands(%[[COPYIN]], %[[COPYINRO]], %[[COPY]] : memref<f32>, memref<f32>, memref<f32>)
-// CHECK-NEXT: acc.delete accPtr(%[[COPYIN]] : memref<f32>) {dataClause = #acc<data_clause acc_copyin>}
-// CHECK-NEXT: acc.delete accPtr(%[[COPYINRO]] : memref<f32>) {dataClause = #acc<data_clause acc_copyin_readonly>}
-// CHECK-NEXT: acc.copyout accPtr(%[[COPY]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>) {dataClause = #acc<data_clause acc_copy>}
+// CHECK-NEXT: acc.delete accPtr(%[[COPYIN]] : memref<f32>) dataClause(acc_copyin)
+// CHECK-NEXT: acc.delete accPtr(%[[COPYINRO]] : memref<f32>) dataClause(acc_copyin_readonly)
+// CHECK-NEXT: acc.copyout accPtr(%[[COPY]] : memref<f32>) to varPtr(%[[ARGC]] : memref<f32>) dataClause(acc_copy)
// -----
@@ -1774,7 +1774,7 @@ acc.global_ctor @acc_constructor {
acc.global_dtor @acc_destructor {
%0 = llvm.mlir.addressof @globalvar { acc.declare = #acc.declare<dataClause = acc_create> } : !llvm.ptr
- %1 = acc.getdeviceptr varPtr(%0 : !llvm.ptr) varType(i32) -> !llvm.ptr {dataClause = #acc<data_clause acc_create>}
+ %1 = acc.getdeviceptr varPtr(%0 : !llvm.ptr) varType(i32) dataClause(acc_create) -> !llvm.ptr<0>
acc.declare_exit dataOperands(%1 : !llvm.ptr)
acc.delete accPtr(%1 : !llvm.ptr)
acc.terminator
@@ -1786,7 +1786,7 @@ acc.global_dtor @acc_destructor {
// CHECK-NEXT: acc.declare_enter dataOperands(%[[CREATE]] : !llvm.ptr)
// CHECK: acc.global_dtor @acc_destructor
// CHECK: %[[ADDR:.*]] = llvm.mlir.addressof @globalvar {acc.declare = #acc.declare<dataClause = acc_create>} : !llvm.ptr
-// CHECK-NEXT: %[[DELETE:.*]] = acc.getdeviceptr varPtr(%[[ADDR]] : !llvm.ptr) varType(i32) -> !llvm.ptr {dataClause = #acc<data_clause acc_create>}
+// CHECK-NEXT: %[[DELETE:.*]] = acc.getdeviceptr varPtr(%[[ADDR]] : !llvm.ptr) varType(i32) dataClause(acc_create) -> !llvm.ptr
// CHECK-NEXT: acc.declare_exit dataOperands(%[[DELETE]] : !llvm.ptr)
// CHECK-NEXT: acc.delete accPtr(%[[DELETE]] : !llvm.ptr)
@@ -1894,7 +1894,7 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%c20 = arith.constant 20 : i32
%alloc = llvm.alloca %c20 x i32 { acc.declare = #acc.declare<dataClause = acc_create, implicit = true> } : (i32) -> !llvm.ptr
- %createlocal = acc.create varPtr(%alloc : !llvm.ptr) varType(!llvm.array<20 x i32>) -> !llvm.ptr {implicit = true}
+ %createlocal = acc.create varPtr(%alloc : !llvm.ptr) varType(!llvm.array<20 x i32>) implicit(true) -> !llvm.ptr<0>
%pa = acc.present varPtr(%a : memref<10x10xf32>) varType(tensor<10x10xf32>) -> memref<10x10xf32>
%pb = acc.present varPtr(%b : memref<10x10xf32>) varType(tensor<10x10xf32>) -> memref<10x10xf32>
@@ -1916,7 +1916,7 @@ func.func @compute3(%a: memref<10x10xf32>, %b: memref<10x10xf32>, %c: memref<10x
%i32Value2 = arith.constant 2 : i32
%idxValue = arith.constant 1 : index
%ifCond = arith.constant true
-acc.set attributes {device_type = #acc.device_type<nvidia>}
+acc.set device_type(#acc.device_type<nvidia>)
acc.set device_num(%i64Value : i64)
acc.set device_num(%i32Value : i32)
acc.set device_num(%idxValue : index)
@@ -1928,7 +1928,7 @@ acc.set default_async(%i32Value : i32)
// CHECK: [[I32VALUE2:%.*]] = arith.constant 2 : i32
// CHECK: [[IDXVALUE:%.*]] = arith.constant 1 : index
// CHECK: [[IFCOND:%.*]] = arith.constant true
-// CHECK: acc.set attributes {device_type = #acc.device_type<nvidia>}
+// CHECK: acc.set device_type(#acc.device_type<nvidia>)
// CHECK: acc.set device_num([[I64VALUE]] : i64)
// CHECK: acc.set device_num([[I32VALUE]] : i32)
// CHECK: acc.set device_num([[IDXVALUE]] : index)
@@ -2142,21 +2142,21 @@ func.func @acc_combined() {
acc.parallel combined(loop) {
acc.loop combined(parallel) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
acc.terminator
}
acc.kernels combined(loop) {
acc.loop combined(kernels) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {auto_ = [#acc.device_type<none>]}
+ } auto_
acc.terminator
}
acc.serial combined(loop) {
acc.loop combined(serial) control(%arg3 : index) = (%c0 : index) to (%c10 : index) step (%c1 : index) {
acc.yield
- } attributes {seq = [#acc.device_type<none>]}
+ } seq
acc.terminator
}
@@ -2286,7 +2286,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes {independent = [#acc.device_type<none>]}
+ } independent
return
}
@@ -2308,7 +2308,7 @@ func.func @acc_loop_container() {
scf.yield
}
acc.yield
- } attributes { collapse = [2], collapseDeviceType = [#acc.device_type<none>], independent = [#acc.device_type<none>]}
+ } collapse([2]) collapseDeviceType([#acc.device_type<none>]) independent
return
}
@@ -2322,14 +2322,14 @@ func.func @acc_loop_container() {
func.func @acc_unstructured_loop() {
acc.loop {
acc.yield
- } attributes {independent = [#acc.device_type<none>], unstructured}
+ } independent unstructured
return
}
// CHECK-LABEL: func.func @acc_unstructured_loop
// CHECK: acc.loop
// CHECK: acc.yield
-// CHECK: } attributes {independent = [#acc.device_type<none>], unstructured}
+// CHECK: } independent unstructured
// -----
diff --git a/mlir/test/Dialect/OpenACC/region-branchop-interface.mlir b/mlir/test/Dialect/OpenACC/region-branchop-interface.mlir
index ea3bf6aec58ec..708b48cbdfe5c 100644
--- a/mlir/test/Dialect/OpenACC/region-branchop-interface.mlir
+++ b/mlir/test/Dialect/OpenACC/region-branchop-interface.mlir
@@ -82,7 +82,7 @@ func.func @last_mod_openacc_data(%arg0: memref<f32>, %mapped: memref<f32>) -> me
memref.load %arg0[] {tag = "acc_data_before"} : memref<f32>
acc.data {
acc.terminator
- } attributes {defaultAttr = #acc<defaultvalue none>}
+ } defaultAttr(none)
memref.load %arg0[] {tag = "acc_data_after"} : memref<f32>
return %arg0 : memref<f32>
}
@@ -141,7 +141,7 @@ func.func @last_mod_openacc_loop(%arg0: memref<f32>) -> memref<f32> {
memref.store %one, %arg0[] {tag_name = "loop_region"} : memref<f32>
memref.load %arg0[] {tag = "acc_loop_inside"} : memref<f32>
acc.yield
- } attributes {auto_ = [#acc.device_type<none>]}
+ } auto_
memref.load %arg0[] {tag = "acc_loop_after"} : memref<f32>
memref.store %zero, %arg0[] {tag_name = "post_loop"} : memref<f32>
memref.load %arg0[] {tag = "acc_loop_post"} : memref<f32>
@@ -191,7 +191,7 @@ func.func @last_mod_openacc_loop_unstructured(%arg0: memref<f32>) -> memref<f32>
^normal_exit:
memref.store %one, %arg0[] {tag_name = "loop_unstructured_normal"} : memref<f32>
acc.yield
- } attributes {auto_ = [#acc.device_type<none>], unstructured}
+ } auto_ unstructured
memref.load %arg0[] {tag = "acc_loop_unstructured_after"} : memref<f32>
return %arg0 : memref<f32>
}
diff --git a/mlir/test/Dialect/OpenACC/support-analysis-varname.mlir b/mlir/test/Dialect/OpenACC/support-analysis-varname.mlir
index af52befb156e4..c6ac309c22e92 100644
--- a/mlir/test/Dialect/OpenACC/support-analysis-varname.mlir
+++ b/mlir/test/Dialect/OpenACC/support-analysis-varname.mlir
@@ -76,7 +76,7 @@ func.func @test_copyin_name() {
%0 = memref.alloca() : memref<10xf32>
// Create an acc.copyin operation with a name
- %1 = acc.copyin varPtr(%0 : memref<10xf32>) -> memref<10xf32> {name = "input_data"}
+ %1 = acc.copyin varPtr(%0 : memref<10xf32>) name("input_data") -> memref<10xf32>
// Mark with test attribute - should find name from copyin operation
%2 = memref.cast %1 {test.var_name} : memref<10xf32> to memref<?xf32>
diff --git a/mlir/test/python/dialects/openacc.py b/mlir/test/python/dialects/openacc.py
index 8f2142a74c7a1..7cb1c1dc51b36 100644
--- a/mlir/test/python/dialects/openacc.py
+++ b/mlir/test/python/dialects/openacc.py
@@ -162,7 +162,7 @@ def testParallelMemcpy():
# CHECK: %[[LOAD_0:.*]] = memref.load %[[COPYIN_0]]{{\[}}%[[INDEX_CAST_0]]] : memref<?xf32>
# CHECK: memref.store %[[LOAD_0]], %[[CREATE_0]]{{\[}}%[[INDEX_CAST_0]]] : memref<?xf32>
# CHECK: acc.yield
- # CHECK: } attributes {independent = [#acc.device_type<none>]}
+ # CHECK: } independent
# CHECK: acc.yield
# CHECK: }
# CHECK: acc.delete accPtr(%[[COPYIN_0]] : memref<?xf32>)
More information about the Mlir-commits
mailing list