[Mlir-commits] [mlir] [mlir][mem2reg] Promote whole-buffer memref to a vector SSA value (PR #211880)

Andrzej WarzyƄski llvmlistbot at llvm.org
Tue Aug 4 07:21:48 PDT 2026


banach-space wrote:

> I think this feature is useful on its own for the mem2reg infrastructure, 

If we take this route (I am still not convinced, TBH, see my point below), then this should not cover cases that can be handled by hoisting (e.g. for `vector.contract` accumulator). Unless there are clearly stated benefits/tradeoffs.

> (which can happen if frontends emit memref for convenience of avoiding SSA construction)

Do you have a specific example? I really want to avoid adding functionality that _theoretically could be helpful_, but is not used in practice. Or that can be avoided by asking frontends to adapt (IMO, upstream MLIR shouldn't be expected to handle every possible corner case).

> it's good to discuss it.

+1

https://github.com/llvm/llvm-project/pull/211880


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