[Mlir-commits] [mlir] [mlir][mem2reg] Promote whole-buffer memref to a vector SSA value (PR #211880)

Théo Degioanni llvmlistbot at llvm.org
Tue Aug 4 05:52:07 PDT 2026


tdegioanni-nvidia wrote:

> This statement in the summary makes me wonder whether this change may be solving a problem for which MLIR already has relevant machinery 😅

With that in mind, I think this feature is useful on its own for the mem2reg infrastructure. It does bring the question of how we control where mem2reg triggers on a case-by-case basis, but I think it makes sense to merge it anyway. Whether or not it properly fits the original use case is a different thing I believe, but it's good to discuss it.

https://github.com/llvm/llvm-project/pull/211880


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