[Mlir-commits] [mlir] [mlir][linalg] Add quantized conv2d operator with FCHW, NCHW order (PR #107740)
Felix Schneider
llvmlistbot at llvm.org
Mon Jul 21 10:02:36 PDT 2025
ubfx wrote:
> @ubfx Just wondering, why the memory layout is expressed right in the name of linalg operation? Shouldn't it be at least an attribute? Or do we need to express it at all? Can't we propagate layouts in scope of some extra passes?
Yes I think the current solution (for all the conv ops in the dialect) isn't ideal and there have been a couple of suggestions and PRs to improve it, [e.g. by expressing layout in attributes](https://github.com/llvm/llvm-project/pull/117688) . Unfortunately, linalg seems to be where all of the individual interests collide which has lead to a certain degree of inertia, so I'm not sure whether fixing this is still actively worked on.
https://github.com/llvm/llvm-project/pull/107740
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