[Mlir-commits] [mlir] [mlir][linalg] Add quantized conv2d operator with FCHW, NCHW order (PR #107740)
Egor Duplenskii
llvmlistbot at llvm.org
Mon Jul 21 08:19:33 PDT 2025
EgorDuplensky wrote:
@ubfx Just wondering, why the memory layout is expressed right in the name of linalg operation?
Shouldn't it be at least an attribute? Or do we need to express it at all? Can't we propagate layouts in scope of some extra passes?
https://github.com/llvm/llvm-project/pull/107740
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