[Mlir-commits] [mlir] [AMDGPU] [MLIR] Add 96 and 128 bit GatherToLDS for gfx950 (PR #147496)

[Jakub Kuderski]

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@@ -1206,11 +1206,11 @@ struct GatherToLDSOpLowering : public ConvertOpToLLVMPattern<GatherToLDSOp> {
     }();
 
     // Currently only 1, 2, 4, 12 and 16 byte loads are supported.
-    if (loadWidth != 1 && loadWidth != 2 && loadWidth != 4 && loadWidth != 12 &&
-        loadWidth != 16)
+    if (!llvm::is_contained(ArrayRef<size_t>{1, 2, 4, 12, 16}, loadWidth))
       return op.emitOpError("chipset unsupported element size");
 
-    if (chipset != kGfx950 && (loadWidth == 12 || loadWidth == 16))
+    if (chipset != kGfx950 &&
+        llvm::is_contained(ArrayRef<size_t>{12, 16}, loadWidth))
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kuhar wrote:

Why do we need `ArrayRef<size_t>`? I'd think that a plain initializer list should work.

https://github.com/llvm/llvm-project/pull/147496