[Mlir-commits] [mlir] [AMDGPU] [MLIR] Add 96 and 128 bit GatherToLDS for gfx950 (PR #147496)
Daniel Hernandez-Juarez
llvmlistbot at llvm.org
Tue Jul 8 07:48:16 PDT 2025
================
@@ -511,8 +511,10 @@ LogicalResult GatherToLDSOp::verify() {
} else {
transferSize = transferType.getIntOrFloatBitWidth();
}
- if (transferSize != 8 && transferSize != 16 && transferSize != 32)
- return emitOpError("Transfering type size must be 8, 16, or 32 bits");
+ if (transferSize != 8 && transferSize != 16 && transferSize != 32 &&
+ transferSize != 96 && transferSize != 128)
----------------
dhernandez0 wrote:
done
https://github.com/llvm/llvm-project/pull/147496
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