[Mlir-commits] [mlir] [MLIR] Support non-atomic RMW option for emulated vector stores (PR #124887)

[Andrzej Warzyński]

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@@ -0,0 +1,123 @@
+// RUN: mlir-opt --test-emulate-narrow-int="arith-compute-bitwidth=1 memref-load-bitwidth=8 atomic-store=false" --cse --split-input-file %s | FileCheck %s
+
+// TODO: remove memref.alloc() in the tests to eliminate noises.
+// memref.alloc exists here because sub-byte vector data types such as i2
+// are currently not supported as input arguments.
+
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banach-space wrote:

[nit] 
```suggestion

///----------------------------------------------------------------------------------------
/// vector.store
///----------------------------------------------------------------------------------------
```

https://github.com/llvm/llvm-project/pull/124887