[Mlir-commits] [mlir] [mlir][linalg] Vectorization support for convolution of i1 type (PR #109480)

[Andrzej Warzyński]

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@@ -2947,12 +2947,14 @@ struct Conv1DGenerator
 
     if (!setOperKind(reduceOp))
       return;
-    auto maybeKind = getCombinerOpKind(reduceOp);
-    if (!maybeKind || (*maybeKind != vector::CombiningKind::ADD &&
+    maybeKind = getCombinerOpKind(reduceOp);
+    // Typically convolution will have a `Add` CombiningKind but for i1 type it
+    // can get strength reduced to `OR` which is also supported.
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banach-space wrote:

Do you know _where_ strength reduction happens?

https://github.com/llvm/llvm-project/pull/109480