[Mlir-commits] [mlir] [mlir][nvvm] Expand sitofp/uitofp to faster ops (PR #107001)

[Christian Sigg]

chsigg wrote:

> > Doing this optimization in LLVM would only work for i16->fp32 because the NVPTX backend has no i8 registers and promotes them to i16.
> 
> I didn't follow this explanation: can you elaborate a bit more which one of the cases in the tests couldn't be done in LLVM IR?

Conversion from less than 16 bit integers seems tricky because 8 bit registers have been [removed](https://github.com/llvm/llvm-project/commit/f8f709172219999dce2fbca83317ad9274dad27b) from the NVPTX backend. I'm not very familiar with LLVM, so it's well possible that it could be done. 

I've been experimenting with https://godbolt.org/z/cvsGTrM5j. I was considering matching `(sint_to_fp (zext i8 to i16))` but that combination only exists intermittently until `zext` gets combined with (also promoted) `ld.param`.

https://github.com/llvm/llvm-project/pull/107001