[Mlir-commits] [mlir] Allow 16 bit floating point operand for LLVM_AtomicRMWOp (PR #110553)
Ilya V
llvmlistbot at llvm.org
Wed Oct 2 02:22:15 PDT 2024
================
@@ -139,6 +139,16 @@ class LLVM_VectorOf<Type element> : Type<
class LLVM_ScalarOrVectorOf<Type element> :
AnyTypeOf<[element, LLVM_VectorOf<element>]>;
+// Type constraint accepting an LLVM fixed vector type with an additional constraint
+// on the vector element type.
+class LLVM_FixedVectorOf<Type element> : Type<
+ And<[LLVM_AnyFixedVector.predicate,
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joviliast wrote:
according to documentation https://llvm.org/docs/LangRef.html#i-store
"fixed vector of floating-point type"
https://github.com/llvm/llvm-project/pull/110553
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