[Mlir-commits] [mlir] [mlir][linalg] Introduce new `linalg.conv` op (PR #117688)

Felix Schneider llvmlistbot at llvm.org
Tue Nov 26 06:45:54 PST 2024


================
@@ -0,0 +1,656 @@
+// RUN: mlir-opt %s -split-input-file -test-linalg-new-conv -linalg-generalize-named-ops | FileCheck %s
+
+// CHECK: #map = affine_map<(d0, d1, d2, d3, d4) -> (d0, d3, d2 + d4)>
+// CHECK: #map1 = affine_map<(d0, d1, d2, d3, d4) -> (d1, d3, d4)>
+// CHECK: #map2 = affine_map<(d0, d1, d2, d3, d4) -> (d0, d1, d2)>
+// CHECK: module {
+// CHECK:   func.func @conv_1d_ncw_fcw(%arg0: tensor<?x?x?xf32>, %arg1: tensor<?x?x?xf32>, %arg2: tensor<?x?x?xf32>) -> tensor<?x?x?xf32> {
+// CHECK:     %0 = linalg.generic {indexing_maps = [#map, #map1, #map2], iterator_types = ["parallel", "parallel", "parallel", "reduction", "reduction"]} ins(%arg0, %arg1 : tensor<?x?x?xf32>, tensor<?x?x?xf32>) outs(%arg2 : tensor<?x?x?xf32>) {
+// CHECK:     ^bb0(%in: f32, %in_0: f32, %out: f32):
+// CHECK:       %1 = arith.mulf %in, %in_0 : f32
+// CHECK:       %2 = arith.addf %out, %1 : f32
+// CHECK:       linalg.yield %2 : f32
+// CHECK:     } -> tensor<?x?x?xf32>
+// CHECK:     return %0 : tensor<?x?x?xf32>
+// CHECK:   }
+// CHECK: }
+func.func @conv_1d_ncw_fcw(%input: tensor<?x?x?xf32>, %filter: tensor<?x?x?xf32>, %init: tensor<?x?x?xf32>) -> tensor<?x?x?xf32> {
+  %0 = linalg.conv_1d_ncw_fcw {dilations = dense<1> : tensor<1xi64>,
----------------
ubfx wrote:

This test is designed to make sure that we don't lose the possibility to represent any of the "old" ops, and also to make sure that the generalization of the resulting new op leads to the correct `generic` representation. The `-test-linalg-new-conv` pass in the test pipeline first converts the old op to the new op. Then the result is generalized and compared to an expected result.

We should definitely have more fine-grained tests in the future as well - this one is an end-to-end test in an attempt to verify the compatibility to the old ops.

https://github.com/llvm/llvm-project/pull/117688


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