[Mlir-commits] [mlir] 2bd6af8 - [MLIR][NFC] Fix SYCL spelling (#113060)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Wed Nov 13 09:53:10 PST 2024
Author: Ronan Keryell
Date: 2024-11-13T12:53:05-05:00
New Revision: 2bd6af8cbc75ba67c20382757e03b85829d77a32
URL: https://github.com/llvm/llvm-project/commit/2bd6af8cbc75ba67c20382757e03b85829d77a32
DIFF: https://github.com/llvm/llvm-project/commit/2bd6af8cbc75ba67c20382757e03b85829d77a32.diff
LOG: [MLIR][NFC] Fix SYCL spelling (#113060)
See https://www.khronos.org/sycl/ for the official spelling of the
Khronos Group standard.
Also fix MLIR spelling in the neighborhood.
Added:
Modified:
mlir/CMakeLists.txt
Removed:
################################################################################
diff --git a/mlir/CMakeLists.txt b/mlir/CMakeLists.txt
index 1e80daabddec1c..2880dc30bca91f 100644
--- a/mlir/CMakeLists.txt
+++ b/mlir/CMakeLists.txt
@@ -127,11 +127,11 @@ else()
set(MLIR_ENABLE_ROCM_CONVERSIONS 0)
endif()
-set(MLIR_ENABLE_CUDA_RUNNER 0 CACHE BOOL "Enable building the mlir CUDA runner")
-set(MLIR_ENABLE_ROCM_RUNNER 0 CACHE BOOL "Enable building the mlir ROCm runner")
-set(MLIR_ENABLE_SYCL_RUNNER 0 CACHE BOOL "Enable building the mlir Sycl runner")
-set(MLIR_ENABLE_SPIRV_CPU_RUNNER 0 CACHE BOOL "Enable building the mlir SPIR-V cpu runner")
-set(MLIR_ENABLE_VULKAN_RUNNER 0 CACHE BOOL "Enable building the mlir Vulkan runner")
+set(MLIR_ENABLE_CUDA_RUNNER 0 CACHE BOOL "Enable building the MLIR CUDA runner")
+set(MLIR_ENABLE_ROCM_RUNNER 0 CACHE BOOL "Enable building the MLIR ROCm runner")
+set(MLIR_ENABLE_SYCL_RUNNER 0 CACHE BOOL "Enable building the MLIR SYCL runner")
+set(MLIR_ENABLE_SPIRV_CPU_RUNNER 0 CACHE BOOL "Enable building the MLIR SPIR-V cpu runner")
+set(MLIR_ENABLE_VULKAN_RUNNER 0 CACHE BOOL "Enable building the MLIR Vulkan runner")
set(MLIR_ENABLE_NVPTXCOMPILER 0 CACHE BOOL
"Statically link the nvptxlibrary instead of calling ptxas as a subprocess \
for compiling PTX to cubin")
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