[Mlir-commits] [mlir] bf51a9e - [mlir][spirv] Upgrade spirv group op syntax in tests
Jakub Kuderski
llvmlistbot at llvm.org
Wed Nov 13 09:37:35 PST 2024
Author: Jakub Kuderski
Date: 2024-11-13T12:37:19-05:00
New Revision: bf51a9e744fe2acdbd709e10f6aec3b5aa2f3ab3
URL: https://github.com/llvm/llvm-project/commit/bf51a9e744fe2acdbd709e10f6aec3b5aa2f3ab3
DIFF: https://github.com/llvm/llvm-project/commit/bf51a9e744fe2acdbd709e10f6aec3b5aa2f3ab3.diff
LOG: [mlir][spirv] Upgrade spirv group op syntax in tests
Fixing forward a missed test from
https://github.com/llvm/llvm-project/pull/115662.
Added:
Modified:
mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir
Removed:
################################################################################
diff --git a/mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir b/mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir
index ab937b2c7c620e..e81048792c45de 100644
--- a/mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir
+++ b/mlir/test/Conversion/SPIRVToLLVM/non-uniform-ops-to-llvm.mlir
@@ -29,7 +29,7 @@
// CHECK: llvm.return %[[VAL_3]] : i32
// CHECK: }
spirv.func @non_uniform_iadd(%arg0: i32) -> i32 "None" {
- %0 = spirv.GroupNonUniformIAdd "Subgroup" "Reduce" %arg0 : i32
+ %0 = spirv.GroupNonUniformIAdd <Subgroup> <Reduce> %arg0 : i32 -> i32
spirv.ReturnValue %0 : i32
}
@@ -43,7 +43,7 @@ spirv.func @non_uniform_iadd(%arg0: i32) -> i32 "None" {
// CHECK: }
spirv.func @non_uniform_fadd(%arg0: f32) -> f32 "None" {
%0 = spirv.Constant 16 : i32
- %1 = spirv.GroupNonUniformFAdd "Subgroup" "ClusteredReduce" %arg0 cluster_size(%0) : f32
+ %1 = spirv.GroupNonUniformFAdd <Subgroup> <ClusteredReduce> %arg0 cluster_size(%0) : f32, i32 -> f32
spirv.ReturnValue %1 : f32
}
@@ -57,7 +57,7 @@ spirv.func @non_uniform_fadd(%arg0: f32) -> f32 "None" {
// CHECK: }
spirv.func @non_uniform_imul(%arg0: i32) -> i32 "None" {
%0 = spirv.Constant 16 : i32
- %1 = spirv.GroupNonUniformIMul "Subgroup" "ClusteredReduce" %arg0 cluster_size(%0) : i32
+ %1 = spirv.GroupNonUniformIMul <Subgroup> <ClusteredReduce> %arg0 cluster_size(%0) : i32, i32 -> i32
spirv.ReturnValue %1 : i32
}
@@ -69,7 +69,7 @@ spirv.func @non_uniform_imul(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : f32
// CHECK: }
spirv.func @non_uniform_fmul(%arg0: f32) -> f32 "None" {
- %0 = spirv.GroupNonUniformFMul "Subgroup" "Reduce" %arg0 : f32
+ %0 = spirv.GroupNonUniformFMul <Subgroup> <Reduce> %arg0 : f32 -> f32
spirv.ReturnValue %0 : f32
}
@@ -81,7 +81,7 @@ spirv.func @non_uniform_fmul(%arg0: f32) -> f32 "None" {
// CHECK: llvm.return %[[VAL_3]] : i32
// CHECK: }
spirv.func @non_uniform_smin(%arg0: i32) -> i32 "None" {
- %0 = spirv.GroupNonUniformSMin "Subgroup" "Reduce" %arg0 : i32
+ %0 = spirv.GroupNonUniformSMin <Subgroup> <Reduce> %arg0 : i32 -> i32
spirv.ReturnValue %0 : i32
}
@@ -93,7 +93,7 @@ spirv.func @non_uniform_smin(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : i32
// CHECK: }
spirv.func @non_uniform_umin(%arg0: i32) -> i32 "None" {
- %0 = spirv.GroupNonUniformUMin "Subgroup" "Reduce" %arg0 : i32
+ %0 = spirv.GroupNonUniformUMin <Subgroup> <Reduce> %arg0 : i32 -> i32
spirv.ReturnValue %0 : i32
}
@@ -105,7 +105,7 @@ spirv.func @non_uniform_umin(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : f32
// CHECK: }
spirv.func @non_uniform_fmin(%arg0: f32) -> f32 "None" {
- %0 = spirv.GroupNonUniformFMin "Subgroup" "Reduce" %arg0 : f32
+ %0 = spirv.GroupNonUniformFMin <Subgroup> <Reduce> %arg0 : f32 -> f32
spirv.ReturnValue %0 : f32
}
@@ -119,7 +119,7 @@ spirv.func @non_uniform_fmin(%arg0: f32) -> f32 "None" {
// CHECK: }
spirv.func @non_uniform_fmin_cluster(%arg0: f32) -> f32 "None" {
%0 = spirv.Constant 16 : i32
- %1 = spirv.GroupNonUniformFMin "Subgroup" "ClusteredReduce" %arg0 cluster_size(%0) : f32
+ %1 = spirv.GroupNonUniformFMin <Subgroup> <ClusteredReduce> %arg0 cluster_size(%0) : f32, i32 -> f32
spirv.ReturnValue %1 : f32
}
@@ -131,7 +131,7 @@ spirv.func @non_uniform_fmin_cluster(%arg0: f32) -> f32 "None" {
// CHECK: llvm.return %[[VAL_3]] : i32
// CHECK: }
spirv.func @non_uniform_smax(%arg0: i32) -> i32 "None" {
- %0 = spirv.GroupNonUniformSMax "Subgroup" "Reduce" %arg0 : i32
+ %0 = spirv.GroupNonUniformSMax <Subgroup> <Reduce> %arg0 : i32 -> i32
spirv.ReturnValue %0 : i32
}
@@ -143,7 +143,7 @@ spirv.func @non_uniform_smax(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : i32
// CHECK: }
spirv.func @non_uniform_umax(%arg0: i32) -> i32 "None" {
- %0 = spirv.GroupNonUniformUMax "Subgroup" "Reduce" %arg0 : i32
+ %0 = spirv.GroupNonUniformUMax <Subgroup> <Reduce> %arg0 : i32 -> i32
spirv.ReturnValue %0 : i32
}
@@ -155,7 +155,7 @@ spirv.func @non_uniform_umax(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : f32
// CHECK: }
spirv.func @non_uniform_fmax(%arg0: f32) -> f32 "None" {
- %0 = spirv.GroupNonUniformFMax "Subgroup" "Reduce" %arg0 : f32
+ %0 = spirv.GroupNonUniformFMax <Subgroup> <Reduce> %arg0 : f32 -> f32
spirv.ReturnValue %0 : f32
}
@@ -169,7 +169,7 @@ spirv.func @non_uniform_fmax(%arg0: f32) -> f32 "None" {
// CHECK: }
spirv.func @non_uniform_smax_cluster(%arg0: i32) -> i32 "None" {
%0 = spirv.Constant 16 : i32
- %1 = spirv.GroupNonUniformSMax "Subgroup" "ClusteredReduce" %arg0 cluster_size(%0) : i32
+ %1 = spirv.GroupNonUniformSMax <Subgroup> <ClusteredReduce> %arg0 cluster_size(%0) : i32, i32 -> i32
spirv.ReturnValue %1 : i32
}
@@ -181,7 +181,7 @@ spirv.func @non_uniform_smax_cluster(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : i32
// CHECK: }
spirv.func @non_uniform_bitwise_and(%arg0: i32) -> i32 "None" {
- %0 = spirv.GroupNonUniformBitwiseAnd "Subgroup" "Reduce" %arg0 : i32
+ %0 = spirv.GroupNonUniformBitwiseAnd <Subgroup> <Reduce> %arg0 : i32 -> i32
spirv.ReturnValue %0 : i32
}
@@ -193,7 +193,7 @@ spirv.func @non_uniform_bitwise_and(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : i32
// CHECK: }
spirv.func @non_uniform_bitwise_or(%arg0: i32) -> i32 "None" {
- %0 = spirv.GroupNonUniformBitwiseOr "Subgroup" "Reduce" %arg0 : i32
+ %0 = spirv.GroupNonUniformBitwiseOr <Subgroup> <Reduce> %arg0 : i32 -> i32
spirv.ReturnValue %0 : i32
}
@@ -205,7 +205,7 @@ spirv.func @non_uniform_bitwise_or(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : i32
// CHECK: }
spirv.func @non_uniform_bitwise_xor(%arg0: i32) -> i32 "None" {
- %0 = spirv.GroupNonUniformBitwiseXor "Subgroup" "Reduce" %arg0 : i32
+ %0 = spirv.GroupNonUniformBitwiseXor <Subgroup> <Reduce> %arg0 : i32 -> i32
spirv.ReturnValue %0 : i32
}
@@ -217,7 +217,7 @@ spirv.func @non_uniform_bitwise_xor(%arg0: i32) -> i32 "None" {
// CHECK: llvm.return %[[VAL_3]] : i1
// CHECK: }
spirv.func @non_uniform_logical_and(%arg0: i1) -> i1 "None" {
- %0 = spirv.GroupNonUniformLogicalAnd "Subgroup" "Reduce" %arg0 : i1
+ %0 = spirv.GroupNonUniformLogicalAnd <Subgroup> <Reduce> %arg0 : i1 -> i1
spirv.ReturnValue %0 : i1
}
@@ -229,7 +229,7 @@ spirv.func @non_uniform_logical_and(%arg0: i1) -> i1 "None" {
// CHECK: llvm.return %[[VAL_3]] : i1
// CHECK: }
spirv.func @non_uniform_logical_or(%arg0: i1) -> i1 "None" {
- %0 = spirv.GroupNonUniformLogicalOr "Subgroup" "Reduce" %arg0 : i1
+ %0 = spirv.GroupNonUniformLogicalOr <Subgroup> <Reduce> %arg0 : i1 -> i1
spirv.ReturnValue %0 : i1
}
@@ -241,7 +241,6 @@ spirv.func @non_uniform_logical_or(%arg0: i1) -> i1 "None" {
// CHECK: llvm.return %[[VAL_3]] : i1
// CHECK: }
spirv.func @non_uniform_logical_xor(%arg0: i1) -> i1 "None" {
- %0 = spirv.GroupNonUniformLogicalXor "Subgroup" "Reduce" %arg0 : i1
+ %0 = spirv.GroupNonUniformLogicalXor <Subgroup> <Reduce> %arg0 : i1 -> i1
spirv.ReturnValue %0 : i1
}
-
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