[Mlir-commits] [mlir] [MLIR][LLVM] Add `llvm.experimental.constrained.fptrunc` operation (PR #86260)

Tobias Gysi llvmlistbot at llvm.org
Fri Mar 22 05:41:47 PDT 2024


================
@@ -862,6 +862,29 @@ llvm::CallInst *mlir::LLVM::detail::createIntrinsicCall(
   return builder.CreateCall(llvmIntr, args);
 }
 
+llvm::CallInst *mlir::LLVM::detail::createConstrainedIntrinsicCall(
+    llvm::IRBuilderBase &builder, ModuleTranslation &moduleTranslation,
+    Operation *intrOp, llvm::Intrinsic::ID intrinsic) {
+  llvm::Module *module = builder.GetInsertBlock()->getModule();
+  SmallVector<llvm::Type *> overloadedTypes{
+      moduleTranslation.convertType(intrOp->getResult(0).getType()),
+      moduleTranslation.convertType(intrOp->getOperand(0).getType())};
+  llvm::Function *callee =
+      llvm::Intrinsic::getDeclaration(module, intrinsic, overloadedTypes);
+  SmallVector<llvm::Value *> args =
+      moduleTranslation.lookupValues(intrOp->getOperands());
+  std::optional<llvm::RoundingMode> rounding;
+  if (auto roundingModeOp = dyn_cast<RoundingModeOpInterface>(intrOp)) {
----------------
gysit wrote:

I would probably implement a `translateRoundingMode` and `translateExceptionBehavior` function similar to `translateExpression` and keep the main logic in the tablegen builder. A bit similar to LLVM_DbgIntrOp. That way you could probably use the hasRoundingMode flag during code generation. 

https://github.com/llvm/llvm-project/pull/86260


More information about the Mlir-commits mailing list