[Mlir-commits] [llvm] [mlir] [ADT] Add signed and unsigned mulHi and mulLo to APInt (PR #84719)

[Simon Pilgrim]

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@@ -3094,3 +3094,19 @@ void llvm::LoadIntFromMemory(APInt &IntVal, const uint8_t *Src,
     memcpy(Dst + sizeof(uint64_t) - LoadBytes, Src, LoadBytes);
   }
 }
+
+APInt APIntOps::mulhs(const APInt &C1, const APInt &C2) {
+  assert(C1.getBitWidth() == C2.getBitWidth());
+  unsigned FullWidth = C1.getBitWidth() * 2;
+  APInt C1Ext = C1.sext(FullWidth);
+  APInt C2Ext = C2.sext(FullWidth);
+  return (C1Ext * C2Ext).extractBits(C1.getBitWidth(), C1.getBitWidth());
+}
+
+APInt APIntOps::mulhu(const APInt &C1, const APInt &C2) {
+  assert(C1.getBitWidth() == C2.getBitWidth());
----------------
RKSimon wrote:

(style) Assertion message: `assert(C1.getBitWidth() == C2.getBitWidth() && "Unequal bitwidths");`

https://github.com/llvm/llvm-project/pull/84719