[Mlir-commits] [llvm] [mlir] [ADT] Add signed and unsigned mulHi and mulLo to APInt (PR #84719)
Simon Pilgrim
llvmlistbot at llvm.org
Wed Mar 13 03:14:35 PDT 2024
================
@@ -3094,3 +3094,19 @@ void llvm::LoadIntFromMemory(APInt &IntVal, const uint8_t *Src,
memcpy(Dst + sizeof(uint64_t) - LoadBytes, Src, LoadBytes);
}
}
+
+APInt APIntOps::mulhs(const APInt &C1, const APInt &C2) {
+ assert(C1.getBitWidth() == C2.getBitWidth());
----------------
RKSimon wrote:
(style) Assertion message: `assert(C1.getBitWidth() == C2.getBitWidth() && "Unequal bitwidths");`
https://github.com/llvm/llvm-project/pull/84719
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