[Mlir-commits] [mlir] [mlir] [memref] Compile-time memref.alloc Scheduling/Merging optimization (PR #95882)

[donald chen]

cxy-1993 wrote:

> > In your analysis, does %0 has inference liveness with %1? In walk order, the answer should be no. But it actually does inference.
> 
> We don't support `cf` ops. We are targeting `scf` for control flow. If an unrecognized op with a scope accesses memory, an error will be throw by the pass.

OK, I see.To meet the constraint, we need to exclude all ops with branch semantics (or directly require all block size must be 1 in all regions)?

https://github.com/llvm/llvm-project/pull/95882