[Mlir-commits] [mlir] [mlir] [memref] Compile-time memref.alloc Scheduling/Merging optimization (PR #95882)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Tue Jun 25 23:44:30 PDT 2024


Menooker wrote:

> In your analysis, does %0 has inference liveness with %1? In walk order, the answer should be no. But it actually does inference.

We don't support `cf` ops. We are targeting `scf` for control flow. If an unrecognized op with a scope accesses memory, an error will be throw by the pass.

https://github.com/llvm/llvm-project/pull/95882


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