[Mlir-commits] [mlir] [mlir][LinAlg] Vectorize reverse-like ops using vector.gather ops. (PR #83205)

Han-Chung Wang llvmlistbot at llvm.org
Wed Feb 28 09:29:08 PST 2024


================
@@ -891,8 +891,7 @@ static bool isContiguousLoadIdx(LinalgOp &linalgOp, Value &val,
 
   // Conservatively reject Ops that could lead to indices with stride other
   // than 1.
-  if (!isa<arith::AddIOp, arith::SubIOp, arith::ConstantOp, linalg::IndexOp>(
-          ancestor))
+  if (!isa<arith::AddIOp, arith::ConstantOp, linalg::IndexOp>(ancestor))
----------------
hanhanW wrote:

SGTM, if one of you approve the PR, I'll land it. Thanks!

https://github.com/llvm/llvm-project/pull/83205


More information about the Mlir-commits mailing list