[Mlir-commits] [mlir] [mlir][spirv][webgpu] Add lowering of IAddCarry to IAdd (PR #68495)

Finn Plummer llvmlistbot at llvm.org
Tue Oct 10 09:50:29 PDT 2023


================
@@ -133,6 +133,48 @@ Value lowerExtendedMultiplication(Operation *mulOp, PatternRewriter &rewriter,
       loc, mulOp->getResultTypes().front(), llvm::ArrayRef({low, high}));
 }
 
+Value lowerCarryAddition(Operation *addOp, PatternRewriter &rewriter, Value lhs,
+                         Value rhs) {
+  Location loc = addOp->getLoc();
+  Type argTy = lhs.getType();
+  // Emulate 64-bit addition by splitting each input element of type i32 to
+  // i16 similar to above in lowerExtendedMultiplication. We then expand
+  // to 3 additions:
----------------
inbelic wrote:

It was checked before we call the function, but I would support having the type check be more local. As such, I have inlined `lowerCarryAddition` directly to the `matchAndRewrite`.

It should be safe as we can assume that all the integer types have been promoted or demoted to i32 before invoking the transform, sourced from here:
https://github.com/llvm/llvm-project/blob/main/mlir/lib/Dialect/SPIRV/Transforms/SPIRVWebGPUTransforms.cpp#L150C5-L150C5

https://github.com/llvm/llvm-project/pull/68495


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