[Mlir-commits] [mlir] [MLIR][Transforms] Fix Mem2Reg removal order to respect dominance (PR #68687)
Tobias Gysi
llvmlistbot at llvm.org
Tue Oct 10 04:34:27 PDT 2023
================
@@ -516,14 +518,16 @@ void MemorySlotPromoter::computeReachingDefInRegion(Region *region,
}
void MemorySlotPromoter::removeBlockingUses() {
- llvm::SetVector<Operation *> usersToRemoveUses;
- for (auto &user : llvm::make_first_range(info.userToBlockingUses))
- usersToRemoveUses.insert(user);
- SetVector<Operation *> sortedUsersToRemoveUses =
- mlir::topologicalSort(usersToRemoveUses);
+ llvm::SmallVector<Operation *> usersToRemoveUses(
+ llvm::make_first_range(info.userToBlockingUses));
+ // The uses need to be traversed in *reverse dominance* order to ensure that
+ // transitive replacements are performed correctly.
+ llvm::sort(usersToRemoveUses, [&](Operation *a, Operation *b) {
+ return dominance.properlyDominates(b, a);
+ });
----------------
gysit wrote:
```suggestion
llvm::sort(usersToRemoveUses, [&](Operation *lhs, Operation *rhs) {
return dominance.properlyDominates(rhs, lhs);
});
```
nit:
https://github.com/llvm/llvm-project/pull/68687
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