[Mlir-commits] [mlir] 478c71b - [mlir][amx] add doc to AMX dialect
Aart Bik
llvmlistbot at llvm.org
Wed Aug 4 08:46:40 PDT 2021
Author: Aart Bik
Date: 2021-08-04T08:46:30-07:00
New Revision: 478c71bf95d2e88297e01d450e0c10c847cb8037
URL: https://github.com/llvm/llvm-project/commit/478c71bf95d2e88297e01d450e0c10c847cb8037
DIFF: https://github.com/llvm/llvm-project/commit/478c71bf95d2e88297e01d450e0c10c847cb8037.diff
LOG: [mlir][amx] add doc to AMX dialect
Making sure the AMX dialect webpage reads better with a short introduction on the purpose of this dialect.
Reviewed By: grosul1, bondhugula
Differential Revision: https://reviews.llvm.org/D107419
Added:
Modified:
mlir/include/mlir/Dialect/AMX/AMX.td
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/AMX/AMX.td b/mlir/include/mlir/Dialect/AMX/AMX.td
index 85611affa80c1..7dbbc888dad08 100644
--- a/mlir/include/mlir/Dialect/AMX/AMX.td
+++ b/mlir/include/mlir/Dialect/AMX/AMX.td
@@ -8,7 +8,7 @@
//
// This file defines the basic operations for the AMX dialect.
//
-// The Intel Advanced Matrix Extensions (AMX) provides a tile matrix
+// The Intel Advanced Matrix Extensions (AMX) provide a tile matrix
// multiply unit (TMUL), a tile control register (TILECFG), and eight
// tile registers TMM0 through TMM7 (TILEDATA).
//
@@ -38,6 +38,23 @@ include "mlir/Interfaces/SideEffectInterfaces.td"
def AMX_Dialect : Dialect {
let name = "amx";
let cppNamespace = "::mlir::amx";
+ let description = [{
+ The Intel Advanced Matrix Extensions (AMX) provide a tile matrix
+ multiply unit (TMUL), a tile control register (TILECFG), and eight
+ tile registers TMM0 through TMM7 (TILEDATA).
+
+ This `AMX` dialect provides a bridge between MLIR concepts such as
+ vectors and memrefs and the lower level LLVM IR support of AMX.
+ The dialect is split into user-facing AMX ops (AMX_Op) and
+ backend-facing intrinsic ops (AMX_IntrOp).
+
+ Note that since configuration changes (implicit at dialect level) are
+ costly, it is highly recommended to use the AMX dialect on same-shaped
+ vectors, at least within a single method.
+
+ For details, see the Intel documentation:
+ https://software.intel.com/content/www/us/en/develop/articles/intel-sdm.html
+ }];
}
//===----------------------------------------------------------------------===//
@@ -203,7 +220,7 @@ def TileMulIOp : AMX_Op<"tile_muli", [NoSideEffect, AllTypesMatch<["acc", "res"]
Example:
```mlir
- %0 = amx.tile_muli %a zext, %b zext, %c
+ %0 = amx.tile_muli %a zext, %b zext, %c
: vector<16x64xi8>, vector<16x64xi8>, vector<16x16xi32>
```
}];
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