[llvm-testresults] Cron <andrewl at fenris> sh /home/andrewl/llvm-alpha.sh
Cron Daemon
root at fenris.cs.uiuc.edu
Sun Mar 26 09:00:02 PST 2006
DEJAGNU TEST RESULTS:
FAIL: /localhome/andrewl/test-alpha/llvm/test/Regression/CFrontend/2003-08-18-SigSetJmp.c:
FAIL: /localhome/andrewl/test-alpha/llvm/test/Regression/CodeGen/Generic/fp_to_int.ll:
FAIL: /localhome/andrewl/test-alpha/llvm/test/Regression/CodeGen/Generic/vector.ll:
DEJAGNU STATISTICS:
# of expected passes 1295
# of unexpected failures 3
# of expected failures 37
ADDED WARNINGS:
lib/Target/PowerPC/PPCISelLowering.cpp:: warning: 'ValSizeInBytes' may be used uninitialized in this function
lib/Target/PowerPC/PPCISelLowering.cpp:: warning: 'Value' may be used uninitialized in this function
cvs history: CVS password file /home/andrewl/.cvspass does not exist - creating a new file
USERS WHO COMMITTED:
evancheng
jlaskey
lattner
ADDED FILES:
llvm/include/llvm/IntrinsicsPowerPC.td
llvm/include/llvm/IntrinsicsX86.td
llvm/lib/Target/PowerPC/PPCInstrAltivec.td
llvm/test/Regression/CodeGen/X86/vec_set.ll
CHANGED FILES:
llvm/include/llvm/Assembly/AutoUpgrade.h
llvm/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/include/llvm/Intrinsics.h
llvm/include/llvm/Intrinsics.td
llvm/lib/CodeGen/RegAllocLinearScan.cpp
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCInstrAltivec.td
llvm/lib/Target/PowerPC/PPCInstrFormats.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCRegisterInfo.td
llvm/lib/Target/PowerPC/README.txt
llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
llvm/lib/Target/TargetSelectionDAG.td
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/X86/X86InstrInfo.td
llvm/lib/Target/X86/X86InstrSSE.td
llvm/lib/Transforms/Scalar/InstructionCombining.cpp
llvm/lib/VMCore/AutoUpgrade.cpp
llvm/lib/VMCore/Function.cpp
llvm/lib/VMCore/Instructions.cpp
llvm/test/Regression/CodeGen/PowerPC/eqv-andc-orc-nor.ll
llvm/test/Regression/CodeGen/PowerPC/vec_spat.ll
llvm/utils/TableGen/DAGISelEmitter.cpp
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