[llvm-dev] [SelectionDAG][RISCV] i32 type illegal in 64-bit target is really a good design in RISCV?

[Zeson via llvm-dev]

Hi, all.

Considering the issue to leverage i32 series instructions, https://reviews.llvm.org/D107658. Also some other target DAG combine actions such as combining any_ext node to leverage ADDW/SUBW/... 
 I think those effects are caused by originally and naturally treating i32 type illegal in 64-bit target for RISCV. And it makes much following work to add patches.
Is it really a good way to handle i32 type in 64-bit mode RISCV target? 
Could it be just like what PowerPC does that make both i32 and i64 are legal in DAG selection phase?



Regards,
Zeson
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