[llvm-dev] Address of instruction in codegen

Krzysztof Parzyszek via llvm-dev llvm-dev at lists.llvm.org
Wed Jun 23 12:23:17 PDT 2021

Check if MachineInstr::[sg]etPreInstrSymbol do what you need.

Krzysztof Parzyszek  kparzysz at quicinc.com   AI tools development

-----Original Message-----
From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of David Greene via llvm-dev
Sent: Wednesday, June 23, 2021 2:18 PM
To: llvm-dev <llvm-dev at lists.llvm.org>
Subject: [EXT] [llvm-dev] Address of instruction in codegen

Hi everyone,

I have a need to generate the address of an instruction during codegen.
Is there any way to do this?  I was hoping that I could split the basic block very late and then use an MO_BlockAddress MachineOperand, but apparently generating such a thing requires a BlockAddress object, which in turn would force splitting the basic block very early, at the IR level.

I don't actually need the address until just before regalloc.  In fact, generating a BlockAddress early would probably result in a dead Instruction as I wouldn't have anything to actually connect it to as a user.  I suppose I could use a dummy target intrinsic as a user but that seems very hacky.

I also thought about doing this extremely late and encoding the address generation during binary streaming in the MC layer but that also seems very hacky and difficult to maintain, requiring various pseudo-instructions to live until asm or object writing.

Any brilliant ideas out there?

LLVM Developers mailing list
llvm-dev at lists.llvm.org

More information about the llvm-dev mailing list