[llvm-dev] RFC: New mechanism for hard register operands to inline asm

David Chisnall via llvm-dev llvm-dev at lists.llvm.org
Wed Jun 23 01:39:26 PDT 2021

On 22/06/2021 16:54, Anirudh Prasad via llvm-dev wrote:
> Hi All,
> We wanted to bring up the possibility of introducing a new inline asm constraint for all targets. This new constraint is meant to be used as a replacement for the register asm construct. Part of the motivation behind this proposal is to come up with something that is a bit nicer and more obvious to use. The new inline asm constraint would be as follows:
> {“<register-name>”} (operand name) ...
> The constraint will try to tie the particular inline asm operand to a specific register.
> This is also proposed as an RFC in the GCC mailing lists (https://gcc.gnu.org/pipermail/gcc/2021-June/236269.html). We would ideally like to maintain consistency with GCC.

It looks as if you're proposing a new representation of *C* inline 
assembly, not LLVM IR inline assembly.  As such, the only LLVM component 
that need to be modified to support it is Clang.  If you post this on 
the Clang developers list, you are likely to get feedback from the right 
set of people.


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