[llvm-dev] Hexagon instruction naming

[Krzysztof Parzyszek via llvm-dev]

Hi,

There is no naming convention outside of the prefix "XY_".  Hexagon assembly doesn't have mnemonics in the same sense as other architectures, and two different hardware instructions may look the same if you remove the operands.  To distinguish them in the internal architecture tools/sources/documentation, each such instruction gets a distinct (but less user-friendly) name, which is what you're seeing in the Hexagon backend.  Those names are invented by the architecture developers, and while they can share some similarity with other related instructions, there is no global convention that applies to all instructions.

The prefix XY_ doesn't have any fixed meaning either, except that every name (so far) has it.  There are some trends there, however: for example, all HVX instructions start with V6_.  The PS_ prefix was invented (by the compiler developers) to indicate pseudo-instructions, they only exist in the LLVM backend and should not have any encoding bits.


-- 
Krzysztof Parzyszek  kparzysz at quicinc.com   AI tools development

-----Original Message-----
From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of unisono via llvm-dev
Sent: Sunday, June 6, 2021 6:20 AM
To: llvm-dev at lists.llvm.org
Subject: [EXT] [llvm-dev] Hexagon instruction naming

Hi,

I update the rizin Hexagon disassembler and use the llvm src for that.

Unfortunately I do not really understand how the naming convention of the instructions are meant, specifically the first two letters.


M2_mpyud_acc_ll_s0 seems to mean:

M2 -> ? destination description ?

mpyud -> uses mpyu(), but what does the "d" means?

acc -> accumulates by +=

ll -> access lower bits of both registers

s0 -> shifts 0bits


"M2_mpyud_acc_ll_s0" seems to map roughly to:

M2_<operation>_<assign_type>_<reg_access>_<shift>


But for instruction names like

"PS_loadriabs" which maps to  "$Rd32 = memw(#$Ii)" this doesn't makes sense.


Is there a source which explains the instruction naming convention?

_______________________________________________
LLVM Developers mailing list
llvm-dev at lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev