[llvm-dev] Hexagon instruction naming

unisono via llvm-dev llvm-dev at lists.llvm.org
Sun Jun 6 04:20:03 PDT 2021


I update the rizin Hexagon disassembler and use the llvm src for that.

Unfortunately I do not really understand how the naming convention of 
the instructions are meant, specifically the first two letters.

M2_mpyud_acc_ll_s0 seems to mean:

M2 -> ? destination description ?

mpyud -> uses mpyu(), but what does the "d" means?

acc -> accumulates by +=

ll -> access lower bits of both registers

s0 -> shifts 0bits

"M2_mpyud_acc_ll_s0" seems to map roughly to:


But for instruction names like

"PS_loadriabs" which maps to  "$Rd32 = memw(#$Ii)" this doesn't makes sense.

Is there a source which explains the instruction naming convention?

More information about the llvm-dev mailing list